120 lines
4.6 KiB
Markdown
120 lines
4.6 KiB
Markdown
**LISTING 25.2 L25-2.ASM**
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; Program to illustrate operation of Map Mask register when drawing
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; to memory that already contains data.
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; By Michael Abrash.
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;
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stack segment para stack ‘STACK'
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db 512 dup(?)
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stack ends
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;
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EGA_VIDEO_SEGMENT equ 0a000h ;EGA display memory segment
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;
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; EGA register equates.
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;
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SC_INDEX equ 3c4h ;SC index register
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SC_MAP_MASK equ 2 ;SC map mask register
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;
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; Macro to set indexed register INDEX of SC chip to SETTING.
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;
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SETSC macro INDEX, SETTING
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mov dx,SC_INDEX
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mov al,INDEX
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out dx,al
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inc dx
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mov al,SETTING
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out dx,al
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dec dx
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endm
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;
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cseg segment para public ‘CODE#146;
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assume cs:cseg
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start proc near
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;
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; Select 640x480 graphics mode.
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;
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mov ax,012h
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int 10h
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;
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mov ax,EGA_VIDEO_SEGMENT
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mov es,ax ;point to video memory
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;
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; Draw 24 10-scan-line high horizontal bars in green, 10 scan lines apart.
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;
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SETSC SC_MAP_MASK,02h ;map mask setting enables only
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; plane 1, the green plane
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sub di,di ;start at beginning of video memory
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mov al,0ffh
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mov bp,24 ;# bars to draw
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HorzBarLoop:
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mov cx,80*10 ;# bytes per horizontal bar
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rep stosb ;draw bar
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add di,80*10 ;point to start of next bar
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dec bp
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jnz HorzBarLoop
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;
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; Fill screen with blue, using Map Mask register to enable writes
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; to blue plane only.
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;
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SETSC SC_MAP_MASK,01h ;map mask setting enables only
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; plane 0, the blue plane
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sub di,di
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mov cx,80*480 ;# bytes per screen
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mov al,0ffh
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rep stosb ;perform fill (affects only
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; plane 0, the blue plane)
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;
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; Wait for a keystroke.
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;
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mov ah,1
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int 21h
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;
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; Restore text mode.
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;
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mov ax,03h
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int 10h
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;
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; Exit to DOS.
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;
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mov ah,4ch
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int 21h
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start endp
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cseg ends
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end start
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#### Setting All Planes to a Single Color {#Heading6}
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The set/reset circuitry can be used to force some planes to 0-bits and
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others to 1-bits during a single write, while letting CPU data go to
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still other planes, and so provides an efficient way to set all planes
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to a desired color. The set/reset circuitry works as follows:
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For each of the bits 0-3 in the Enable Set/Reset register (Graphics
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Controller register 1) that is 1, the corresponding bit in the Set/Reset
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register (GC register 0) is extended to a byte (0 or 0FFH) and replaces
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the CPU data for the corresponding plane. For each of the bits in the
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Enable Set/Reset register that is 0, the CPU data is used unchanged for
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that plane (normal operation). For example, if the Enable Set/Reset
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register is set to 01H and the Set/Reset register is set to 05H, then
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the CPU data is replaced for plane 0 only (the blue plane), and the
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value it is replaced with is 0FFH (bit 0 of the Set/Reset register
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extended to a byte). Note that in this case, bits 1-3 of the Set/Reset
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register have no effect.
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It is important to understand that the set/reset circuitry directly
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replaces CPU data in Graphics Controller data flow. Refer back to Figure
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25.3 to see that the output of the set/reset circuitry passes through
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(and may be transformed by) the ALU and the bit mask before being
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written to memory, and even then the Map Mask register must enable the
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write. When using set/reset, it is generally desirable to set the Map
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Mask register to enable all planes the set/reset circuitry is
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controlling, since those memory planes which are disabled by the Map
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Mask register cannot be modified, and the purpose of enabling set/reset
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for a plane is to force that plane to be set by the set/reset circuitry.
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Listing 25.3 illustrates the use of set/reset to force a specific color
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to be written. This program is the same as that of Listing 25.2, except
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that set/reset rather than the Map Mask register is used to control
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color. The preexisting pattern is completely overwritten this time,
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because the set/reset circuitry writes 0-bytes to planes that must be
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off as well as 0FFH-bytes to planes that must be on.
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