76 lines
3.8 KiB
Markdown
76 lines
3.8 KiB
Markdown
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[Previous](27-05.html) [Table of Contents](index.html) [Next](28-02.html)
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Chapter 28\
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Reading VGA Memory {#Heading1}
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-------------------
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### Read Modes 0 and 1, and the Color Don’t Care Register {#Heading2}
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Well, it’s taken five chapters, but we’ve finally covered the data write
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path and all four write modes of the VGA. Now it’s time to tackle the
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VGA’s two read modes. While the read modes aren’t as complex as the
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write modes, they’re nothing to sneeze at. In particular, read mode 1
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(also known as color compare mode) is rather unusual and not at all
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intuitive.
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You may well ask, isn’t *anything* about programming the VGA
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straightforward? Well...no. But then, clearing up the mysteries of VGA
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programming is what this part of the book is all about, so let’s get
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started.
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### Read Mode 0 {#Heading3}
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Read mode 0 is actually relatively uncomplicated, given that you
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understand the four-plane nature of the VGA. (If you don’t understand
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the four-plane nature of the VGA, I strongly urge you to read Chapters
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23-27 before continuing with this chapter.) Read mode 0, the read mode
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counterpart of write mode 0, lets you read from one (and only one) plane
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of VGA memory at any one time.
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Read mode 0 is selected by setting bit 3 of the Graphics Mode register
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(Graphics Controller register 5) to 0. When read mode 0 is active, the
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plane that supplies the data when the CPU reads VGA memory is the plane
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selected by bits 1 and 0 of the Read Map register (Graphics Controller
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register 4). When the Read Map register is set to 0, CPU reads come from
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plane 0 (the plane that normally contains blue pixel data). When the
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Read Map register is set to 1, CPU reads come from plane 1; when the
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Read Map register is 2, CPU reads come from plane 2; and when the Read
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Map register is 3, CPU reads come from plane 3.
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That all seems simple enough; in read mode 0, the Read Map register acts
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as a selector among the four planes, determining which one of the planes
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will supply the value returned to the CPU. There is a slight
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complication, however, in that the value written to the Read Map
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register in order to read from a given plane is not the same as the
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value written to the Map Mask register (Sequence Controller register 2)
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in order to write to that plane.
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Why is that? Well, in read mode 0, one and only one plane can be read at
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a time, so there are only four possible settings of the Read Map
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register: 0, 1, 2, or 3, to select reads from plane 0, 1, 2, or 3. In
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write mode 0, by contrast (in fact, in any write mode), any or all
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planes may be written to at once, since the byte written by the CPU can
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“fan out” to multiple planes. Consequently, there are not four but
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sixteen possible settings of the Map Mask register. The setting of the
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Map Mask register to write only to plane 0 is 1; to write only to plane
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1 is 2; to write only to plane 2 is 4; and to write only to plane 3 is
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8.
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As you can see, the settings of the Read Map and Map Mask registers for
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accessing a given plane don’t match. The code in Listing 28.1
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illustrates this. Listing 28.1 simply copies a sixteen-color image from
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system memory to VGA memory, one plane at a time, then animates by
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repeatedly copying the image back to system memory, again one plane at a
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time, clearing the old image, and copying the image to a new location in
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VGA memory. Note the differing settings of the Read Map and Map Mask
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registers.
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------------------------ --------------------------------- --------------------
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[Previous](27-05.html) [Table of Contents](index.html) [Next](28-02.html)
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------------------------ --------------------------------- --------------------
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* * * * *
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Graphics Programming Black Book © 2001 Michael Abrash
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