103 lines
5.6 KiB
Markdown
103 lines
5.6 KiB
Markdown
---
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title: Michael Abrash's Graphics Programming Black Book, Special Edition
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author: Michael Abrash
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date: '1997-07-01'
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isbn: '1576101746'
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publisher: The Coriolis Group
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category: 'Web and Software Development: Game Development,Web and Software Development:
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Graphics and Multimedia Development'
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chapter: '25'
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pages: 470-472
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---
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It's worth pointing out again that the bit mask operates on the data in
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the latches, not on the data in display memory. This makes the bit mask
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a flexible resource that with a little imagination can be used for some
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interesting purposes. For example, you could fill the latches with a
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solid background color (by writing the color somewhere in display
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memory, then reading that location to load the latches), and then use
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the Bit Mask register (or write mode 3, as we'll see later) as a mask
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through which to draw a foreground color stencilled into the background
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color *without* reading display memory first. This only works for
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writing whole bytes at a time (clipped bytes require the use of the bit
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mask; unfortunately, we're already using it for stencilling in this
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case), but it completely eliminates reading display memory and does
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foreground-plus-background drawing in one blurry-fast pass.
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> 
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> This last-described example is a good illustration of how I'd suggest
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> you approach the VGA: As a rich collection of hardware resources that
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> can profitably be combined in some non-obvious ways. Don't let yourself
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> be limited by the obvious applications for the latches, bit mask, write
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> modes, read modes, map mask, ALUs, and set/reset circuitry. Instead, try
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> to imagine how they could work together to perform whatever task you
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> happen to need done at any given time. I've made my code as much as four
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> times faster by doing this, as the discussion of Mode X in Chapters
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> 47-49 demonstrates.
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The example code in Listing 25.1 is designed to illustrate the use of
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the Data Rotate and Bit Mask registers, and is not as fast or as
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complete as it might be. The case where text *is* byte-aligned could be
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detected and performed much faster, without the use of the Bit Mask or
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Data Rotate registers and with only one display memory access per font
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byte (to write the font byte), rather than four (to read display memory
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and write the font byte to each of the two bytes the character spans).
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Likewise, non-aligned text drawing could be streamlined to one display
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memory access per byte by having the CPU rotate and combine the font
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data directly, rather than setting up the VGA's hardware to do it.
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(Listing 25.1 was designed to illustrate VGA data rotation and bit
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masking rather than the fastest way to draw text. We'll see faster
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text-drawing code soon.) One excellent rule of thumb is to minimize
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display memory accesses of all types, especially reads, which tend to be
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considerably slower than writes. Also, in Listing 25.1 it would be
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faster to use a table lookup to calculate the bit masks for the two
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halves of each character rather than the shifts used in the example.
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For another (and more complex) example of drawing bit-mapped text on the
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VGA, see John Cockerham's article, "Pixel Alignment of EGA Fonts," *PC
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Tech Journal*, January, 1987. Parenthetically, I'd like to pass along
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John's comment about the VGA: "When programming the VGA, *everything* is
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complex."
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He's got a point there.
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### The VGA's Set/Reset Circuitry {#Heading5}
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At last we come to the final aspect of data flow through the GC on write
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mode 0 writes: the set/reset circuitry. Figure 25.3 shows data flow on a
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write mode 0 write. The only difference between this figure and Figure
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25.1 is that on its way to each plane potentially the rotated CPU data
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passes through the set/reset circuitry, which may or may not replace the
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CPU data with set/reset data. Briefly put, the set/reset circuitry
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enables the programmer to elect to independently replace the CPU data
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for each plane with either 00 or 0FFH.
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What is the use of such a feature? Well, the standard way to control
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color is to set the Map Mask register to enable writes to only those
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planes that need to be set to produce the desired color. For example,
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the Map Mask register would be set to 09H to draw in high-intensity
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blue; here, bits 0 and 3 are set to 1, so only the blue plane (plane 0)
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and the intensity plane (plane 3) are written to.
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Remember, though, that planes that are disabled by the Map Mask register
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are not written to or modified in any way. This means that the above
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approach works only if the memory being written to is zeroed; if,
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however, the memory already contains non-zero data, that data will
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remain in the planes disabled by the Map Mask, and the end result will
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be that some planes contain the data just written and other planes
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contain old data. In short, color control using the Map Mask does not
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force all planes to contain the desired color. In particular, it is not
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possible to force some planes to zero and other planes to one in a
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single write with the Map Mask register.
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The program in Listing 25.2 illustrates this problem. A green pattern
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(plane 1 set to 1, planes 0, 2, and 3 set to 0) is first written to
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display memory. Display memory is then filled with blue (only plane 0
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set to 1), with a Map Mask setting of 01H. Where the blue crosses the
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green, cyan is produced, rather than blue, because the Map Mask register
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setting of 01H that produces blue leaves the green plane (plane 1)
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unchanged. In order to generate blue unconditionally, it would be
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necessary to set the Map Mask register to 0FH, clear memory, and then
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set the Map Mask register to 01H and fill with blue.
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