pcjs/devices/pc/bios/5170/1985-11-15.map

132 lines
4.4 KiB
Text

F000:0050 @ POST1_TEST01 ; TEST.01: 286 PROCESSOR TEST (REAL MODE)
F000:0187 @ POST1_TEST02 ; TEST.02: ROM CHECKSUM TEST
F000:01A3 @ POST1_TEST03 ; TEST.03: VERIFY CMOS SHUTDOWN BYTE
F000:01C9 @ POST1_TEST04 ; TEST.04: 8254 CHECK TIMER 1 (ALL BITS ON)
F000:01F7 @ POST1_TEST05 ; TEST.05: 8254 CHECK TIMER 1 (ALL BITS OFF)
F000:021D @ POST1_TEST06 ; TEST.06: 8237 DMA 0 INITIALIZATION
F000:025F @ POST1_TEST07 ; TEST.07: 8237 DMA 1 INITIALIZATION
F000:02D4 @ POST1_TEST08 ; TEST.08: DMA PAGE REGISTER TEST
F000:0327 @ POST1_TEST09 ; TEST.09: STORAGE REFRESH TEST
F000:033D @ POST1_TEST10 ; TEST.10: 8042 INTERFACE TEST
F000:03B7 @ POST1_TEST11 ; TEST.11: BASE 64K R/W STORAGE TEST
F000:05D6 @ POST1_TEST11A ; TEST.11A: VERIFY GDT/IDT INSTRUCTIONS
F000:06BE @ POST1_TEST12 ; TEST.12: VERIFY CMOS CHECKSUM
F000:0780 @ POST1_TEST13 ; TEST.13: PROTECTED MODE TEST
F000:086E @ POST1_TEST13A ; TEST.13A: MEMORY SIZE TEST (ABOVE 1024K)
F000:0A99 @ POST1_TEST14 ; TEST.14: INITIALIZE CRT CONTROLLER
F000:0B0D @ POST1_TEST15 ; TEST.15: VIDEO LINE TEST
F000:0B1D @ POST1_TEST16 ; TEST.16: CRT INTERFACE LINES TEST
F000:0C25 @ MFG_BOOT ; MANUFACTURING BOOT TEST CODE ROUTINE
;
; IBM's 11/15/85 ROM BIOS listing shows POST2 located at offset 0C96; it's actual location is 0C94.
;
0C94 +
F000:0000 @ POST2
F000:0868 @ POST2_CHK_HFNUM ; CHECK FOR SECOND FIXED DISK PRESENT BUT NOT DEFINED
;
; IBM's 11/15/85 ROM BIOS listing shows POST3 located at offset 1671; it's actual location is 1675.
;
1675 +
F000:0000 @ POST3
;
; IBM's 11/15/85 ROM BIOS listing shows POST4 located at offset 1941; it's actual location is 1945.
;
1945 +
F000:0000 @ POST4
F000:0000 @ CMOS_READ
F000:001A @ CMOS_WRITE
F000:0034 @ DDS
F000:003C @ E_MSG
F000:0071 @ ERR_BEEP
F000:00AF @ BEEP
F000:00F5 @ WAITF ; FIXED TIME WAIT (CX = COUNT OF 15.085737us INTERVALS TO WAIT)
F000:0104 @ CONFIG_BAD
F000:0118 @ XPC_BYTE
F000:012F @ PRT_SEG
F000:0144 @ PROT_PRT
F000:0170 @ ROM_CHECKSUM
F000:017C @ ROM_CHECK
F000:01AE @ KBD_RESET
F000:01D9 @ BLINK_INT
F000:01E7 @ SET_TOD
;
; IBM's 11/15/85 ROM BIOS listing shows POST5 located at offset 1C38; it's actual location is 1C3E.
;
1C3E +
F000:0000 @ POST5
;
; IBM's 11/15/85 ROM BIOS listing shows POST6 located at offset 1EB5; it's actual location is 1EBB.
;
1EBB +
F000:0000 @ POST6
F000:012C @ XMIT_8042
F000:016D @ BOOT_STRAP_1
;
; IBM's 11/15/85 ROM BIOS listing shows DISKETTE_IO_1 located at offset 2143; it's actual location is 2149.
;
20E9 +
F000:0060 @ DISKETTE_IO_1
F000:00E7 @ DISK_RESET
F000:013C @ DISK_STATUS
F000:0148 @ DISK_READ
F000:0154 @ DISK_WRITE
F000:0160 @ DISK_VERF
F000:016C @ DISK_FORMAT
F000:00E7 @ DISK_RESET
F000:01D2 @ DISK_PARMS
F000:02AD @ DISK_CHANGE ; RETURNS THE STATE OF THE DISK CHANGE LINE
F000:02D8 @ FORMAT_SET
F000:028B @ DISK_TYPE
F000:0339 @ SET_MEDIA
F000:03AC @ DR_TYPE_CHECK
F000:03CC @ SEND_SPEC
F000:0403 @ XLAT_NEW
F000:0429 @ XLAT_OLD
F000:07F5 @ SETUP_END
F000:080F @ SETUP_DBL ; CHECK DOUBLE STEP
F000:0873 @ READ_ID
F000:0888 @ CMOS_TYPE
F000:08B6 @ MOTOR_ON
F000:0994 @ NEC_OUTPUT
F000:09C0 @ SEEK
F000:0A85 @ RESULTS
F000:0AC4 @ READ_DSKCHNG
F000:0A5D @ WAIT_INT
F000:0AF5 @ DISK_INT_1
F000:0B0C @ DSKETTE_SETUP
F000:0B60 @ DISK_SETUP
F000:0D09 @ DISK_IO
2C69 +
F000:0000 @ HDISK_SETUP
F000:0104 @ HD_RESET_1
F000:017C @ SET_FAIL
F000:018A @ POD_TCHK
F000:01A9 @ HDISK_IO
F000:0225 @ HDISK_IO_CONT
F000:02C1 @ HDISK_RESET
F000:0315 @ HDISK_STATUS
F000:031E @ HDISK_READ
F000:0325 @ HDISK_WRITE
F000:032C @ HDISK_VERF
F000:033E @ FMT_TRK
F000:0353 @ READ_DASD
F000:0393 @ GET_PARM
F000:03F1 @ INIT_DRV
F000:0423 @ RD_LONG
F000:042A @ WR_LONG
F000:0431 @ DISK_SEEK
F000:044F @ TST_RDY ; TEST HARD DISK READY (AH = 0x10)
F000:0466 @ HDISK_RECAL
F000:048E @ CTLR_DIAGNOSTIC
F000:04C6 @ COMMANDI
F000:0505 @ COMMANDO
F000:055C @ COMMAND
F000:055C @ WAIT
F000:05F3 @ NOT_BUSY
F000:061A @ WAIT_DRQ
F000:0630 @ CHECK_STATUS
F000:0642 @ CHECK_ST
F000:0676 @ CHECK_ER
F000:06A1 @ CHECK_DMA
F000:06C4 @ GET_VEC
F000:06DA @ HD_INT