pcjs/devices/pc8080/machine/exerciser
Repository files (latest commit first)
Filename Latest commit message Latest commit date
2016-11-21 13:16:38 -08:00
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machine-8080ex1.xml Starting work on 1.30.4 and some additional PDP-11 hardware support 2016-11-21 13:16:38 -08:00
machine-8080pre.xml Starting work on 1.30.4 and some additional PDP-11 hardware support 2016-11-21 13:16:38 -08:00
machine-cputest.xml Starting work on 1.30.4 and some additional PDP-11 hardware support 2016-11-21 13:16:38 -08:00
machine-test.xml Starting work on 1.30.4 and some additional PDP-11 hardware support 2016-11-21 13:16:38 -08:00
machine.xml Starting work on 1.30.4 and some additional PDP-11 hardware support 2016-11-21 13:16:38 -08:00
README.md Updated PC8080 and PDPjs to support RAM images, eliminating the need for the old "writable ROM" kludge; RAM images can include their own load and exec addresses as part of the JSON file, but the RAM component can provide explicit overrides (if no load address is specified either way, the default load address is the starting RAM address) 2016-10-17 11:01:32 -07:00

layout title permalink redirect_from machines
page 8080 Exerciser Test Machine /devices/pc8080/machine/exerciser/
/devices/pc8080/machine/test/
type id debugger
pc8080 test8080 true

8080 Exerciser Test Machine

This is a test of PC8080, a new 8080-based machine emulator recently added to the PCjs Project.

The test machine below loads a copy of the 8080 Exerciser (specifically, 8080EX1) and intercepts the exerciser's CP/M console calls so that you can see its progress in the Control Panel window. This is a "headless" test machine (no keyboard or display), so that's all you get.

The good news: PC8080 passes all the 8080 Exerciser tests. And it doesn't do it by using all sorts of weird "flags tables" that most other 8080 emulators seem to fall back on.

Like all the other CPU emulations in the PCjs Project, PC8080 never "calculates" the flags unless/until they are actually required, which considerably speeds up all arithmetic operations.

Of particular note are the 8080's subtract, compare, and decrement operations, which actually perform addition, not subtraction, by using two's complement arithmetic in "stages": the first stage (inverting the source operand) occurs before the addition, and the second stage (incrementing the inverted operand) occurs after the addition. And it appears to be the result of the first stage, not the second, that determines the state of the Auxiliary Carry flag (AF).

At 2Mhz, the 8080 Exerciser tests take quite a while, but you can click the speed button while the machine is running to increase the simulated speed; it will revert to 2Mhz when you exceed the maximum speed that your system supports.

NOTE: The original 8080 Exerciser website is currently unavailable, so we refer you to the copy on archive.org. The 8080 Exerciser source code has also been "forked" on GitHub.

{% include machine.html id="test8080" %}

8080 Online Resources

8080 Opcode Map