1266 lines
39 KiB
JavaScript
1266 lines
39 KiB
JavaScript
/**
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* @fileoverview Implements PDP11 device support.
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* @author <a href="mailto:Jeff@pcjs.org">Jeff Parsons</a>
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* @copyright © Jeff Parsons 2012-2017
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*
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* This file is part of PCjs, a computer emulation software project at <http://pcjs.org/>.
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*
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* It has been adapted from the JavaScript PDP 11/70 Emulator written by Paul Nankervis
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* (paulnank@hotmail.com) at <http://skn.noip.me/pdp11/pdp11.html>. This code may be used
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* freely provided the original authors are acknowledged in any modified source code.
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*
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* PCjs is free software: you can redistribute it and/or modify it under the terms of the
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* GNU General Public License as published by the Free Software Foundation, either version 3
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* of the License, or (at your option) any later version.
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*
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* PCjs is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without
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* even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCjs. If not,
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* see <http://www.gnu.org/licenses/gpl.html>.
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*
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* You are required to include the above copyright notice in every modified copy of this work
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* and to display that copyright notice when the software starts running; see COPYRIGHT in
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* <http://pcjs.org/modules/shared/lib/defines.js>.
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*
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* Some PCjs files also attempt to load external resource files, such as character-image files,
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* ROM files, and disk image files. Those external resource files are not considered part of PCjs
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* for purposes of the GNU General Public License, and the author does not claim any copyright
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* as to their contents.
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*/
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"use strict";
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if (NODE) {
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var Str = require("../../shared/lib/strlib");
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var Web = require("../../shared/lib/weblib");
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var Component = require("../../shared/lib/component");
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var State = require("../../shared/lib/state");
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var PDP11 = require("./defines");
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var BusPDP11 = require("./bus");
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var MemoryPDP11 = require("./memory");
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var MessagesPDP11 = require("./messages");
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var PC11 = require("./pc11");
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var RL11 = require("./rl11");
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var RK11 = require("./rk11");
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}
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class DevicePDP11 extends Component {
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/**
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* DevicePDP11(parmsDevice)
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*
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* The Device component implements the following "default" devices:
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*
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* KW11 (KW11-L Line Time Clock)
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*
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* as well providing access to all the MMU and CPU registers, PSW, etc.
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*
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* @param {Object} parmsDevice
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*/
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constructor(parmsDevice)
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{
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super("Device", parmsDevice, MessagesPDP11.DEVICE);
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this.kw11 = { // KW11 registers
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lks: PDP11.KW11.LKS.MON,
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timer: -1 // initBus() will initialize this timer ID
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};
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}
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/**
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* initBus(cmp, bus, cpu, dbg)
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*
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* @this {DevicePDP11}
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* @param {ComputerPDP11} cmp
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* @param {BusPDP11} bus
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* @param {CPUStatePDP11} cpu
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* @param {DebuggerPDP11} dbg
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*/
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initBus(cmp, bus, cpu, dbg)
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{
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this.bus = bus;
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this.cmp = cmp;
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this.cpu = cpu;
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this.dbg = dbg;
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var device = this;
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this.kw11.timer = cpu.addTimer(function() {
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device.interruptKW11();
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});
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this.kw11.irq = cpu.addIRQ(PDP11.KW11.VEC, PDP11.KW11.PRI, MessagesPDP11.KW11);
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bus.addIOTable(this, DevicePDP11.UNIBUS_IOTABLE);
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bus.addResetHandler(this.reset.bind(this));
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if (DEBUGGER && dbg) {
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dbg.messageDump(MessagesPDP11.MMU, function onDumpMMU(asArgs) {
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device.dumpMMU(asArgs);
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});
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}
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this.setReady();
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}
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/**
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* dumpMMU(asArgs)
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*
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* @this {DevicePDP11}
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* @param {Array.<string>} asArgs
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*/
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dumpMMU(asArgs)
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{
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if (DEBUGGER) {
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var cpu = this.cpu;
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this.dumpRegs("KIPDR", cpu.regsPDR[0], 0, asArgs[0]);
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this.dumpRegs("KDPDR", cpu.regsPDR[0], 8, asArgs[0]);
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this.dumpRegs("KIPAR", cpu.regsPAR[0], 0, asArgs[0]);
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this.dumpRegs("KDPAR", cpu.regsPAR[0], 8, asArgs[0], true);
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this.dumpRegs("SIPDR", cpu.regsPDR[1], 0, asArgs[0]);
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this.dumpRegs("SDPDR", cpu.regsPDR[1], 8, asArgs[0]);
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this.dumpRegs("SIPAR", cpu.regsPAR[1], 0, asArgs[0]);
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this.dumpRegs("SDPAR", cpu.regsPAR[1], 8, asArgs[0], true);
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this.dumpRegs("UIPDR", cpu.regsPDR[3], 0, asArgs[0]);
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this.dumpRegs("UDPDR", cpu.regsPDR[3], 8, asArgs[0]);
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this.dumpRegs("UIPAR", cpu.regsPAR[3], 0, asArgs[0]);
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this.dumpRegs("UDPAR", cpu.regsPAR[3], 8, asArgs[0], true);
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if (cpu.regMMR3 & PDP11.MMR3.UNIBUS_MAP) {
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this.dumpRegs("UNIMAP", cpu.regsUniMap, -1, asArgs[0]);
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}
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}
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}
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/**
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* dumpRegs(sName, aRegs, offset, sFilter, fBreak)
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*
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* @this {DevicePDP11}
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* @param {string} sName
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* @param {Array.<number>} aRegs
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* @param {number} offset
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* @param {string} sFilter
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* @param {boolean} [fBreak]
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*/
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dumpRegs(sName, aRegs, offset, sFilter, fBreak)
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{
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if (DEBUGGER) {
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var dbg = this.dbg;
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if (sFilter && sName.indexOf(sFilter.toUpperCase()) < 0) return;
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var nRegs = 8;
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var sDump = "";
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var fIndex = false;
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var nBytes = 0;
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var nWidth = 8;
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if (offset < 0) {
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nRegs = aRegs.length;
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offset = 0;
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fIndex = true;
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nBytes = 3;
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nWidth = 4;
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}
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for (var i = 0; i < nRegs; i++) {
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if (i % nWidth == 0) {
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if (sDump) sDump += '\n';
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sDump += sName + (fIndex? ('[' + Str.toDec(i, 2) + ']') : '') + ':';
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}
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sDump += ' ' + dbg.toStrBase(aRegs[offset + i], nBytes);
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}
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dbg.println(sDump + (fBreak? '\n' : ''));
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}
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}
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/**
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* powerUp(data, fRepower)
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*
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* @this {DevicePDP11}
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* @param {Object|null} data
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* @param {boolean} [fRepower]
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* @return {boolean} true if successful, false if failure
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*/
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powerUp(data, fRepower)
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{
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if (!fRepower) {
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if (!data) {
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this.reset();
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} else {
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if (!this.restore(data)) return false;
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}
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}
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return true;
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}
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/**
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* powerDown(fSave, fShutdown)
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*
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* @this {DevicePDP11}
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* @param {boolean} [fSave]
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* @param {boolean} [fShutdown]
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* @return {Object|boolean} component state if fSave; otherwise, true if successful, false if failure
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*/
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powerDown(fSave, fShutdown)
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{
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return fSave? this.save() : true;
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}
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/**
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* reset()
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*
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* @this {DevicePDP11}
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*/
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reset()
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{
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this.kw11.lks = PDP11.KW11.LKS.MON;
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this.cpu.setTimer(this.kw11.timer, 1000/60, true);
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}
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/**
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* save()
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*
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* This implements save support for the DevicePDP11 component.
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*
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* @this {DevicePDP11}
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* @return {Object}
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*/
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save()
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{
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var state = new State(this);
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state.set(0, [
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this.kw11.lks
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]);
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return state.data();
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}
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/**
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* restore(data)
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*
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* This implements restore support for the DevicePDP11 component.
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*
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* @this {DevicePDP11}
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* @param {Object} data
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* @return {boolean} true if successful, false if failure
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*/
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restore(data)
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{
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/*
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* ES6 ALERT: A handy destructuring assignment, which makes it easy to perform the inverse
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* of what save() does when it collects a bunch of object properties into an array.
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*/
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[
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this.kw11.lks
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] = data[0];
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return true;
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}
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/**
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* interruptKW11()
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*
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* We used to call this function only when the the KW11's "Interrupt Enable" bit was set,
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* but now we call it at 60Hz regardless. In part, this was so we could piggy-back on it
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* to drive display updates, but more importantly, the KW11's "Monitor" bit is supposed to
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* be set at the "line frequency" independent of whether KW11 interrupts are enabled or not.
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*
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* @this {DevicePDP11}
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*/
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interruptKW11()
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{
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this.kw11.lks |= PDP11.KW11.LKS.MON;
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if (this.kw11.lks & PDP11.KW11.LKS.IE) {
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this.cpu.setIRQ(this.kw11.irq);
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}
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if (this.cmp) this.cmp.updateDisplays(1);
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this.cpu.setTimer(this.kw11.timer, 1000/60);
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}
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/**
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* readLKS(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.LKS or 177546)
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* @return {number}
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*/
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readLKS(addr)
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{
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/*
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* NOTE: The original code always cleared LKS.MON (bit 7) after snapping the value for the read,
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* but based on DEC's "Non-Interrupt Mode" programming examples, it's clear that's not how LKS.MON
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* operates; if the caller wants to clear it, they must explicitly clear it with a write.
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*/
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return this.kw11.lks;
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}
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/**
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* writeLKS(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.LKS or 177546)
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*/
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writeLKS(data, addr)
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{
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/*
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* NOTE: The original code always cleared LKS.MON (bit 7) as part of any write, but based on DEC's
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* "Non-Interrupt Mode" programming examples, which explicitly CLRB after TSTB reveals LKS.MON is set,
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* I think that was wrong, and that all a write should do is mask off all the other (non-writable) bits.
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*/
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this.kw11.lks = data & PDP11.KW11.LKS.MASK;
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if (!(this.kw11.lks & PDP11.KW11.LKS.IE)) this.cpu.clearIRQ(this.kw11.irq);
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}
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/**
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* readMMR0(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.MMR0 or 177572)
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* @return {number}
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*/
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readMMR0(addr)
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{
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return this.cpu.getMMR0();
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}
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/**
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* writeMMR0(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.MMR0 or 177572)
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*/
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writeMMR0(data, addr)
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{
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this.cpu.setMMR0((data & ~PDP11.MMR0.COMPLETED) | (this.cpu.regMMR0 & PDP11.MMR0.COMPLETED));
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}
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/**
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* readMMR1(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.MMR1 or 177574)
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* @return {number}
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*/
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readMMR1(addr)
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{
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return this.cpu.getMMR1();
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}
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/**
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* readMMR2(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.MMR2 or 177576)
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* @return {number}
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*/
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readMMR2(addr)
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{
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return this.cpu.getMMR2();
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}
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/**
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* readMMR3(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.MMR3 or 172516)
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* @return {number}
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*/
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readMMR3(addr)
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{
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return this.cpu.getMMR3();
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}
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/**
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* writeMMR3(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.MMR3 or 172516)
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*/
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writeMMR3(data, addr)
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{
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this.cpu.setMMR3(data);
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}
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/**
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* readUNIMAP(addr)
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*
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* NOTE: The UNIBUS map ("UNIMAP") is 32 registers spread across 64 words, so we first calculate the word index.
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.UNIMAP)
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* @return {number}
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*/
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readUNIMAP(addr)
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{
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var word = (addr >> 1) & 0x3f, reg = word >> 1;
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var data = this.cpu.regsUniMap[reg];
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return (word & 1)? (data >> 16) : (data & 0xffff);
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}
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/**
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* writeUNIMAP(data, addr)
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*
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* NOTE: The UNIBUS map ("UNIMAP") is 32 registers spread across 64 words, so we first calculate the word index.
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.UNIMAP)
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*/
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writeUNIMAP(data, addr)
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{
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var word = (addr >> 1) & 0x3f, reg = word >> 1;
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if (word & 1) {
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this.cpu.regsUniMap[reg] = (this.cpu.regsUniMap[reg] & 0xffff) | ((data & 0x003f) << 16);
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} else {
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this.cpu.regsUniMap[reg] = (this.cpu.regsUniMap[reg] & ~0xffff) | (data & 0xfffe);
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}
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}
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/**
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* readSIPDR(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.SIPDR0--SIPDR7 or 172200--172216)
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* @return {number}
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*/
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readSIPDR(addr)
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{
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var reg = (addr >> 1) & 7;
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return this.cpu.regsPDR[1][reg];
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}
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/**
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* writeSIPDR(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.SIPDR0--SIPDR7 or 172200--172216)
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*/
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writeSIPDR(data, addr)
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{
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var reg = (addr >> 1) & 7;
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this.cpu.regsPDR[1][reg] = data & 0xff0f;
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}
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/**
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* readSDPDR(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.SDPDR0--SDPDR7 or 172220--172236)
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* @return {number}
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*/
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readSDPDR(addr)
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{
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var reg = ((addr >> 1) & 7) + 8;
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return this.cpu.regsPDR[1][reg];
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}
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/**
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* writeSDPDR(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.SDPDR0--SDPDR7 or 172220--172236)
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*/
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writeSDPDR(data, addr)
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{
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var reg = ((addr >> 1) & 7) + 8;
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this.cpu.regsPDR[1][reg] = data & 0xff0f;
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}
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/**
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* readSIPAR(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.SIPAR0--SIPAR7 or 172240--172256)
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* @return {number}
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*/
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readSIPAR(addr)
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{
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var reg = (addr >> 1) & 7;
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return this.cpu.regsPAR[1][reg];
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}
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|
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/**
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* writeSIPAR(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.SIPAR0--SIPAR7 or 172240--172256)
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*/
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writeSIPAR(data, addr)
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{
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var reg = (addr >> 1) & 7;
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this.cpu.regsPAR[1][reg] = data;
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this.cpu.regsPDR[1][reg] &= 0xff0f;
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}
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|
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/**
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* readSDPAR(addr)
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*
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* @this {DevicePDP11}
|
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* @param {number} addr (eg, PDP11.UNIBUS.SDPAR0--SDPAR7 or 172260--172276)
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* @return {number}
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*/
|
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readSDPAR(addr)
|
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{
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var reg = ((addr >> 1) & 7) + 8;
|
|
return this.cpu.regsPAR[1][reg];
|
|
}
|
|
|
|
/**
|
|
* writeSDPAR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.SDPAR0--SDPAR7 or 172260--172276)
|
|
*/
|
|
writeSDPAR(data, addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
this.cpu.regsPAR[1][reg] = data;
|
|
this.cpu.regsPDR[1][reg] &= 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readKIPDR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KIPDR0--KIPDR7 or 172300--172316)
|
|
* @return {number}
|
|
*/
|
|
readKIPDR(addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
return this.cpu.regsPDR[0][reg];
|
|
}
|
|
|
|
/**
|
|
* writeKIPDR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KIPDR0--KIPDR7 or 172300--172316)
|
|
*/
|
|
writeKIPDR(data, addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
this.cpu.regsPDR[0][reg] = data & 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readKDPDR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KDPDR0--KDPDR7 or 172320--172336)
|
|
* @return {number}
|
|
*/
|
|
readKDPDR(addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
return this.cpu.regsPDR[0][reg];
|
|
}
|
|
|
|
/**
|
|
* writeKDPDR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KDPDR0--KDPDR7 or 172320--172336)
|
|
*/
|
|
writeKDPDR(data, addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
this.cpu.regsPDR[0][reg] = data & 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readKIPAR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KIPAR0--KIPAR7 or 172340--172356)
|
|
* @return {number}
|
|
*/
|
|
readKIPAR(addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
return this.cpu.regsPAR[0][reg];
|
|
}
|
|
|
|
/**
|
|
* writeKIPAR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KIPAR0--KIPAR7 or 172340--172356)
|
|
*/
|
|
writeKIPAR(data, addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
this.cpu.regsPAR[0][reg] = data;
|
|
this.cpu.regsPDR[0][reg] &= 0xff0f;
|
|
|
|
}
|
|
|
|
/**
|
|
* readKDPAR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KDPAR0--KDPAR7 or 172360--172376)
|
|
* @return {number}
|
|
*/
|
|
readKDPAR(addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
return this.cpu.regsPAR[0][reg];
|
|
}
|
|
|
|
/**
|
|
* writeKDPAR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.KDPAR0--KDPAR7 or 172360--172376)
|
|
*/
|
|
writeKDPAR(data, addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
this.cpu.regsPAR[0][reg] = data;
|
|
this.cpu.regsPDR[0][reg] &= 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readUIPDR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UIPDR0--UIPDR7 or 177600--177616)
|
|
* @return {number}
|
|
*/
|
|
readUIPDR(addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
return this.cpu.regsPDR[3][reg];
|
|
}
|
|
|
|
/**
|
|
* writeUIPDR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UIPDR0--UIPDR7 or 177600--177616)
|
|
*/
|
|
writeUIPDR(data, addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
this.cpu.regsPDR[3][reg] = data & 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readUDPDR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UDPDR0--UDPDR7 or 177620--177636)
|
|
* @return {number}
|
|
*/
|
|
readUDPDR(addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
return this.cpu.regsPDR[3][reg];
|
|
}
|
|
|
|
/**
|
|
* writeUDPDR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UDPDR0--UDPDR7 or 177620--177636)
|
|
*/
|
|
writeUDPDR(data, addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
this.cpu.regsPDR[3][reg] = data & 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readUIPAR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UIPAR0--UIPAR7 or 177640--177656)
|
|
* @return {number}
|
|
*/
|
|
readUIPAR(addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
return this.cpu.regsPAR[3][reg];
|
|
}
|
|
|
|
/**
|
|
* writeUIPAR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UIPAR0--UIPAR7 or 177640--177656)
|
|
*/
|
|
writeUIPAR(data, addr)
|
|
{
|
|
var reg = (addr >> 1) & 7;
|
|
this.cpu.regsPAR[3][reg] = data;
|
|
this.cpu.regsPDR[3][reg] &= 0xff0f;
|
|
|
|
}
|
|
|
|
/**
|
|
* readUDPAR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UDPAR0--UDPAR7 or 177660--177676)
|
|
* @return {number}
|
|
*/
|
|
readUDPAR(addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
return this.cpu.regsPAR[3][reg];
|
|
}
|
|
|
|
/**
|
|
* writeUDPAR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.UDPAR0--UDPAR7 or 177660--177676)
|
|
*/
|
|
writeUDPAR(data, addr)
|
|
{
|
|
var reg = ((addr >> 1) & 7) + 8;
|
|
this.cpu.regsPAR[3][reg] = data;
|
|
this.cpu.regsPDR[3][reg] &= 0xff0f;
|
|
}
|
|
|
|
/**
|
|
* readRSET0(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R0SET0--R5SET0 or 177700--177705)
|
|
* @return {number}
|
|
*/
|
|
readRSET0(addr)
|
|
{
|
|
var data;
|
|
var reg = addr & 7;
|
|
if (this.cpu.regPSW & PDP11.PSW.REGSET) {
|
|
data = this.cpu.regsAlt[reg];
|
|
} else {
|
|
data = this.cpu.regsGen[reg];
|
|
}
|
|
return data;
|
|
}
|
|
|
|
/**
|
|
* writeRSET0(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R0SET0--R5SET0 or 177700--177705)
|
|
*/
|
|
writeRSET0(data, addr)
|
|
{
|
|
var reg = addr & 7;
|
|
if (this.cpu.regPSW & PDP11.PSW.REGSET) {
|
|
this.cpu.regsAlt[reg] = data;
|
|
} else {
|
|
this.cpu.regsGen[reg] = data;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* readR6KERNEL(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R6KERNEL or 177706)
|
|
* @return {number}
|
|
*/
|
|
readR6KERNEL(addr)
|
|
{
|
|
var data;
|
|
if (!(this.cpu.regPSW & PDP11.PSW.CMODE)) { // Kernel Mode
|
|
data = this.cpu.regsGen[6];
|
|
} else {
|
|
data = this.cpu.regsAltStack[0];
|
|
}
|
|
return data;
|
|
}
|
|
|
|
/**
|
|
* writeR6KERNEL(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R6KERNEL or 177706)
|
|
*/
|
|
writeR6KERNEL(data, addr)
|
|
{
|
|
if (!(this.cpu.regPSW & PDP11.PSW.CMODE)) { // Kernel Mode
|
|
this.cpu.regsGen[6] = data;
|
|
} else {
|
|
this.cpu.regsAltStack[0] = data;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* readR7KERNEL(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R7KERNEL or 177707)
|
|
* @return {number}
|
|
*/
|
|
readR7KERNEL(addr)
|
|
{
|
|
return this.cpu.regsGen[7];
|
|
}
|
|
|
|
/**
|
|
* writeR7KERNEL(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R7KERNEL or 177707)
|
|
*/
|
|
writeR7KERNEL(data, addr)
|
|
{
|
|
this.cpu.regsGen[7] = data;
|
|
}
|
|
|
|
/**
|
|
* readRSET1(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R0SET1--R5SET1 or 177710--177715)
|
|
* @return {number}
|
|
*/
|
|
readRSET1(addr)
|
|
{
|
|
var data;
|
|
var reg = addr & 7;
|
|
if (this.cpu.regPSW & PDP11.PSW.REGSET) {
|
|
data = this.cpu.regsGen[reg];
|
|
} else {
|
|
data = this.cpu.regsAlt[reg];
|
|
}
|
|
return data;
|
|
}
|
|
|
|
/**
|
|
* writeRSET1(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R0SET1--R5SET1 or 177710--177715)
|
|
*/
|
|
writeRSET1(data, addr)
|
|
{
|
|
var reg = addr & 7;
|
|
if (this.cpu.regPSW & PDP11.PSW.REGSET) {
|
|
this.cpu.regsGen[reg] = data;
|
|
} else {
|
|
this.cpu.regsAlt[reg] = data;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* readR6SUPER(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R6SUPER or 177716)
|
|
* @return {number}
|
|
*/
|
|
readR6SUPER(addr)
|
|
{
|
|
var data;
|
|
if (((this.cpu.regPSW & PDP11.PSW.CMODE) >> PDP11.PSW.SHIFT.CMODE) == PDP11.MODE.SUPER) {
|
|
data = this.cpu.regsGen[6];
|
|
} else {
|
|
data = this.cpu.regsAltStack[1];
|
|
}
|
|
return data;
|
|
}
|
|
|
|
/**
|
|
* writeR6SUPER(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R6SUPER or 177716)
|
|
*/
|
|
writeR6SUPER(data, addr)
|
|
{
|
|
if (((this.cpu.regPSW & PDP11.PSW.CMODE) >> PDP11.PSW.SHIFT.CMODE) == PDP11.MODE.SUPER) {
|
|
this.cpu.regsGen[6] = data;
|
|
} else {
|
|
this.cpu.regsAltStack[1] = data;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* readR6USER(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R6USER or 177717)
|
|
* @return {number}
|
|
*/
|
|
readR6USER(addr)
|
|
{
|
|
var data;
|
|
if (((this.cpu.regPSW & PDP11.PSW.CMODE) >> PDP11.PSW.SHIFT.CMODE) == PDP11.MODE.USER) {
|
|
data = this.cpu.regsGen[6];
|
|
} else {
|
|
data = this.cpu.regsAltStack[3];
|
|
}
|
|
return data;
|
|
}
|
|
|
|
/**
|
|
* writeR6USER(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.R6USER or 177717)
|
|
*/
|
|
writeR6USER(data, addr)
|
|
{
|
|
if (((this.cpu.regPSW & PDP11.PSW.CMODE) >> PDP11.PSW.SHIFT.CMODE) == PDP11.MODE.USER) {
|
|
this.cpu.regsGen[6] = data;
|
|
} else {
|
|
this.cpu.regsAltStack[3] = data;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* readCTRL(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.LAERR--UNDEF2 or 177740--177756)
|
|
* @return {number}
|
|
*/
|
|
readCTRL(addr)
|
|
{
|
|
var reg = (addr - PDP11.UNIBUS.CTRL) >> 1;
|
|
return this.cpu.regsControl[reg];
|
|
}
|
|
|
|
/**
|
|
* writeCTRL(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.LAERR--UNDEF2 or 177740--177756)
|
|
*/
|
|
writeCTRL(data, addr)
|
|
{
|
|
var reg = (addr - PDP11.UNIBUS.CTRL) >> 1;
|
|
this.cpu.regsControl[reg] = data;
|
|
}
|
|
|
|
/**
|
|
* readSIZE(addr)
|
|
*
|
|
* We're adhering to DEC's documentation, which says:
|
|
*
|
|
* This read-only register specifies the memory size of the system. It is defined to indicate the
|
|
* last addressable block of 32 words in memory (bit 0 is equivalent to bit 6 of the Physical Address).
|
|
*
|
|
* Looking at the Memory Clear "toggle-in" code in /devices/pdp11/machine/1170/panel/debugger/README.md, the
|
|
* memory loop gives up when the block number stored in KIPAR0 is >= LSIZE, suggesting that LSIZE is actually
|
|
* the total number of 64-byte blocks, rather than the block number of the last block. But that code is
|
|
* not conclusive, since it writes 8192 bytes at a time rather than 64, so it doesn't really matter if LSIZE
|
|
* is off by one.
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.LSIZE--HSIZE or 177760--177762)
|
|
* @return {number}
|
|
*/
|
|
readSIZE(addr)
|
|
{
|
|
return addr == PDP11.UNIBUS.LSIZE? ((this.bus.getMemoryLimit(MemoryPDP11.TYPE.RAM) >> 6) - 1) : 0;
|
|
}
|
|
|
|
/**
|
|
* writeSIZE(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.LSIZE--HSIZE or 177760--177762)
|
|
*/
|
|
writeSIZE(data, addr)
|
|
{
|
|
}
|
|
|
|
/**
|
|
* readSYSID(addr)
|
|
*
|
|
* TODO: For SYSID, we currently ignore writes and return 1 on reads
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.SYSID or 177764)
|
|
* @return {number}
|
|
*/
|
|
readSYSID(addr)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
/**
|
|
* writeSYSID(data, addr)
|
|
*
|
|
* TODO: For SYSID, we currently ignore writes and return 1 on reads
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.SYSID or 177764)
|
|
*/
|
|
writeSYSID(data, addr)
|
|
{
|
|
}
|
|
|
|
/**
|
|
* readCPUERR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.CPUERR or 177766)
|
|
* @return {number}
|
|
*/
|
|
readCPUERR(addr)
|
|
{
|
|
return this.cpu.regErr;
|
|
}
|
|
|
|
/**
|
|
* writeCPUERR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.CPUERR or 177766)
|
|
*/
|
|
writeCPUERR(data, addr)
|
|
{
|
|
this.cpu.regErr = 0; // TODO: Confirm that writes always zero the register
|
|
}
|
|
|
|
/**
|
|
* readMBR(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.MB or 177770)
|
|
* @return {number}
|
|
*/
|
|
readMBR(addr)
|
|
{
|
|
return this.cpu.regMBR;
|
|
}
|
|
|
|
/**
|
|
* writeMBR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.MB or 177770)
|
|
*/
|
|
writeMBR(data, addr)
|
|
{
|
|
if (!(addr & 0x1)) {
|
|
data &= 0xff; // required for KB11-CM without MFPT instruction
|
|
}
|
|
this.cpu.regMBR = data;
|
|
}
|
|
|
|
/**
|
|
* readPIR(addr, fPreWrite)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.PIR or 177772)
|
|
* @param {boolean} [fPreWrite]
|
|
* @return {number}
|
|
*/
|
|
readPIR(addr, fPreWrite)
|
|
{
|
|
if (fPreWrite) return 0;
|
|
return this.cpu.getPIR();
|
|
}
|
|
|
|
/**
|
|
* writePIR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.PIR or 177772)
|
|
*/
|
|
writePIR(data, addr)
|
|
{
|
|
this.cpu.setPIR(data);
|
|
}
|
|
|
|
/**
|
|
* readSLR(addr, fPreWrite)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.SL or 177774)
|
|
* @param {boolean} [fPreWrite]
|
|
* @return {number}
|
|
*/
|
|
readSLR(addr, fPreWrite)
|
|
{
|
|
if (fPreWrite) return 0;
|
|
return this.cpu.getSLR();
|
|
}
|
|
|
|
/**
|
|
* writeSLR(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.SL or 177774)
|
|
*/
|
|
writeSLR(data, addr)
|
|
{
|
|
this.cpu.setSLR(data);
|
|
}
|
|
|
|
/**
|
|
* readPSW(addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} addr (eg, PDP11.UNIBUS.PSW or 177776)
|
|
* @return {number}
|
|
*/
|
|
readPSW(addr)
|
|
{
|
|
return this.cpu.getPSW();
|
|
}
|
|
|
|
/**
|
|
* writePSW(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr (eg, PDP11.UNIBUS.PSW or 177776)
|
|
*/
|
|
writePSW(data, addr)
|
|
{
|
|
/*
|
|
* pdp11.js disallowed PSW.TF in addition to PSW.UNUSED, but DEC's "TRAP TEST" expects the
|
|
* following instruction to trap:
|
|
*
|
|
* 004174: 052767 000020 173574 BIS #20,177776
|
|
*
|
|
* Since that test was written for the PDP-11/20, it's possible that newer machines have a different
|
|
* behavior, but for now, we assume that all machines allow setting PSW.TF.
|
|
*
|
|
* Moreover, we have changed setPSW() to disallow the setting of any bits not supported by the current
|
|
* CPU model, so it seems rather pointless to do any masking of bits here.
|
|
*/
|
|
this.cpu.setPSW(data);
|
|
}
|
|
|
|
/**
|
|
* writeIgnored(data, addr)
|
|
*
|
|
* @this {DevicePDP11}
|
|
* @param {number} data
|
|
* @param {number} addr
|
|
*/
|
|
writeIgnored(data, addr)
|
|
{
|
|
if (this.messageEnabled()) {
|
|
this.printMessage("writeIgnored(" + Str.toOct(addr) + "): " + Str.toOct(data), true, true);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* DevicePDP11.init()
|
|
*
|
|
* This function operates on every HTML element of class "device", extracting the
|
|
* JSON-encoded parameters for the DevicePDP11 constructor from the element's "data-value"
|
|
* attribute, invoking the constructor to create a DevicePDP11 component, and then binding
|
|
* any associated HTML controls to the new component.
|
|
*/
|
|
static init()
|
|
{
|
|
var aeDevice = Component.getElementsByClass(document, PDP11.APPCLASS, "device");
|
|
for (var iDevice = 0; iDevice < aeDevice.length; iDevice++) {
|
|
var device;
|
|
var eDevice = aeDevice[iDevice];
|
|
var parmsDevice = Component.getComponentParms(eDevice);
|
|
switch(parmsDevice['type']) {
|
|
case 'default':
|
|
device = new DevicePDP11(parmsDevice);
|
|
Component.bindComponentControls(device, eDevice, PDP11.APPCLASS);
|
|
break;
|
|
case 'pc11':
|
|
device = new PC11(parmsDevice);
|
|
Component.bindComponentControls(device, eDevice, PDP11.APPCLASS);
|
|
break;
|
|
case 'rl11':
|
|
device = new RL11(parmsDevice);
|
|
Component.bindComponentControls(device, eDevice, PDP11.APPCLASS);
|
|
break;
|
|
case 'rk11':
|
|
device = new RK11(parmsDevice);
|
|
Component.bindComponentControls(device, eDevice, PDP11.APPCLASS);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* ES6 ALERT: As you can see below, I've finally started using computed property names.
|
|
*/
|
|
DevicePDP11.UNIBUS_IOTABLE = {
|
|
[PDP11.UNIBUS.UNIMAP]: /* 170200 */ [null, null, DevicePDP11.prototype.readUNIMAP, DevicePDP11.prototype.writeUNIMAP, "UNIMAP", 64, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.SIPDR0]: /* 172200 */ [null, null, DevicePDP11.prototype.readSIPDR, DevicePDP11.prototype.writeSIPDR, "SIPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.SDPDR0]: /* 172220 */ [null, null, DevicePDP11.prototype.readSDPDR, DevicePDP11.prototype.writeSDPDR, "SDPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.SIPAR0]: /* 172240 */ [null, null, DevicePDP11.prototype.readSIPAR, DevicePDP11.prototype.writeSIPAR, "SIPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.SDPAR0]: /* 172260 */ [null, null, DevicePDP11.prototype.readSDPAR, DevicePDP11.prototype.writeSDPAR, "SDPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.KIPDR0]: /* 172300 */ [null, null, DevicePDP11.prototype.readKIPDR, DevicePDP11.prototype.writeKIPDR, "KIPDR", 8, PDP11.MODEL_1140, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.KDPDR0]: /* 172320 */ [null, null, DevicePDP11.prototype.readKDPDR, DevicePDP11.prototype.writeKDPDR, "KDPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.KIPAR0]: /* 172340 */ [null, null, DevicePDP11.prototype.readKIPAR, DevicePDP11.prototype.writeKIPAR, "KIPAR", 8, PDP11.MODEL_1140, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.KDPAR0]: /* 172360 */ [null, null, DevicePDP11.prototype.readKDPAR, DevicePDP11.prototype.writeKDPAR, "KDPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.MMR3]: /* 172516 */ [null, null, DevicePDP11.prototype.readMMR3, DevicePDP11.prototype.writeMMR3, "MMR3", 1, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.LKS]: /* 177546 */ [null, null, DevicePDP11.prototype.readLKS, DevicePDP11.prototype.writeLKS, "LKS"],
|
|
[PDP11.UNIBUS.MMR0]: /* 177572 */ [null, null, DevicePDP11.prototype.readMMR0, DevicePDP11.prototype.writeMMR0, "MMR0", 1, PDP11.MODEL_1140, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.MMR1]: /* 177574 */ [null, null, DevicePDP11.prototype.readMMR1, DevicePDP11.prototype.writeIgnored, "MMR1", 1, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.MMR2]: /* 177576 */ [null, null, DevicePDP11.prototype.readMMR2, DevicePDP11.prototype.writeIgnored, "MMR2", 1, PDP11.MODEL_1140, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.UIPDR0]: /* 177600 */ [null, null, DevicePDP11.prototype.readUIPDR, DevicePDP11.prototype.writeUIPDR, "UIPDR", 8, PDP11.MODEL_1140, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.UDPDR0]: /* 177620 */ [null, null, DevicePDP11.prototype.readUDPDR, DevicePDP11.prototype.writeUDPDR, "UDPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.UIPAR0]: /* 177640 */ [null, null, DevicePDP11.prototype.readUIPAR, DevicePDP11.prototype.writeUIPAR, "UIPAR", 8, PDP11.MODEL_1140, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.UDPAR0]: /* 177660 */ [null, null, DevicePDP11.prototype.readUDPAR, DevicePDP11.prototype.writeUDPAR, "UDPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
|
|
[PDP11.UNIBUS.R0SET0]: /* 177700 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R0SET0"],
|
|
[PDP11.UNIBUS.R1SET0]: /* 177701 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R1SET0"],
|
|
[PDP11.UNIBUS.R2SET0]: /* 177702 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R2SET0"],
|
|
[PDP11.UNIBUS.R3SET0]: /* 177703 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R3SET0"],
|
|
[PDP11.UNIBUS.R4SET0]: /* 177704 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R4SET0"],
|
|
[PDP11.UNIBUS.R5SET0]: /* 177705 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R5SET0"],
|
|
[PDP11.UNIBUS.R6KERNEL]:/* 177706 */ [null, null, DevicePDP11.prototype.readR6KERNEL,DevicePDP11.prototype.writeR6KERNEL,"R6KERNEL"],
|
|
[PDP11.UNIBUS.R7KERNEL]:/* 177707 */ [null, null, DevicePDP11.prototype.readR7KERNEL,DevicePDP11.prototype.writeR7KERNEL,"R7KERNEL"],
|
|
[PDP11.UNIBUS.R0SET1]: /* 177710 */ [null, null, DevicePDP11.prototype.readRSET1, DevicePDP11.prototype.writeRSET1, "R0SET1", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R1SET1]: /* 177711 */ [null, null, DevicePDP11.prototype.readRSET1, DevicePDP11.prototype.writeRSET1, "R1SET1", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R2SET1]: /* 177712 */ [null, null, DevicePDP11.prototype.readRSET1, DevicePDP11.prototype.writeRSET1, "R2SET1", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R3SET1]: /* 177713 */ [null, null, DevicePDP11.prototype.readRSET1, DevicePDP11.prototype.writeRSET1, "R3SET1", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R4SET1]: /* 177714 */ [null, null, DevicePDP11.prototype.readRSET1, DevicePDP11.prototype.writeRSET1, "R4SET1", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R5SET1]: /* 177715 */ [null, null, DevicePDP11.prototype.readRSET1, DevicePDP11.prototype.writeRSET1, "R5SET1", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R6SUPER]: /* 177716 */ [null, null, DevicePDP11.prototype.readR6SUPER, DevicePDP11.prototype.writeR6SUPER, "R6SUPER", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.R6USER]: /* 177717 */ [null, null, DevicePDP11.prototype.readR6USER, DevicePDP11.prototype.writeR6USER, "R6USER", 1, PDP11.MODEL_1145],
|
|
[PDP11.UNIBUS.CTRL]: /* 177740 */ [null, null, DevicePDP11.prototype.readCTRL, DevicePDP11.prototype.writeCTRL, "CTRL", 8, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.LSIZE]: /* 177760 */ [null, null, DevicePDP11.prototype.readSIZE, DevicePDP11.prototype.writeSIZE, "LSIZE", 1, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.HSIZE]: /* 177762 */ [null, null, DevicePDP11.prototype.readSIZE, DevicePDP11.prototype.writeSIZE, "HSIZE", 1, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.SYSID]: /* 177764 */ [null, null, DevicePDP11.prototype.readSYSID, DevicePDP11.prototype.writeSYSID, "SYSID", 1, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.CPUERR]: /* 177766 */ [null, null, DevicePDP11.prototype.readCPUERR, DevicePDP11.prototype.writeCPUERR, "ERR", 1, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.MB]: /* 177770 */ [null, null, DevicePDP11.prototype.readMBR, DevicePDP11.prototype.writeMBR, "MBR", 1, PDP11.MODEL_1170],
|
|
[PDP11.UNIBUS.PIR]: /* 177772 */ [null, null, DevicePDP11.prototype.readPIR, DevicePDP11.prototype.writePIR, "PIR"],
|
|
[PDP11.UNIBUS.SL]: /* 177774 */ [null, null, DevicePDP11.prototype.readSLR, DevicePDP11.prototype.writeSLR, "SLR"],
|
|
[PDP11.UNIBUS.PSW]: /* 177776 */ [null, null, DevicePDP11.prototype.readPSW, DevicePDP11.prototype.writePSW, "PSW"]
|
|
};
|
|
|
|
/*
|
|
* Initialize all the DevicePDP11 modules on the page.
|
|
*/
|
|
Web.onInit(DevicePDP11.init);
|
|
|
|
if (NODE) module.exports = DevicePDP11;
|