1430 lines
41 KiB
JavaScript
1430 lines
41 KiB
JavaScript
/**
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* @fileoverview Implements the PC6502 CPU component.
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* @author <a href="mailto:Jeff@pcjs.org">Jeff Parsons</a>
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* @copyright © Jeff Parsons 2012-2016
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*
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* This file is part of PCjs, a computer emulation software project at <http://pcjs.org/>.
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*
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* PCjs is free software: you can redistribute it and/or modify it under the terms of the
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* GNU General Public License as published by the Free Software Foundation, either version 3
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* of the License, or (at your option) any later version.
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*
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* PCjs is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without
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* even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCjs. If not,
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* see <http://www.gnu.org/licenses/gpl.html>.
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*
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* You are required to include the above copyright notice in every modified copy of this work
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* and to display that copyright notice when the software starts running; see COPYRIGHT in
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* <http://pcjs.org/modules/shared/lib/defines.js>.
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*
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* Some PCjs files also attempt to load external resource files, such as character-image files,
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* ROM files, and disk image files. Those external resource files are not considered part of PCjs
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* for purposes of the GNU General Public License, and the author does not claim any copyright
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* as to their contents.
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*/
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"use strict";
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if (NODE) {
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var str = require("../../shared/lib/strlib");
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var web = require("../../shared/lib/weblib");
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var Component = require("../../shared/lib/component");
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var Messages = require("./messages");
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var Memory = require("./memory");
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var State = require("./state");
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var CPU = require("./cpu");
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var CPUDef = require("./cpudef");
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}
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/**
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* CPUState(parmsCPU)
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*
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* The CPUState class uses the following (parmsCPU) properties:
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*
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* model: a string (eg, "8080") that should match one of the CPUDef.MODEL_* values
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*
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* This extends the CPU class and passes any remaining parmsCPU properties to the CPU class
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* constructor, along with a default speed (cycles per second) based on the specified (or default)
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* CPU model number.
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*
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* The CPUState class was initially written to simulate a 8080 microprocessor, although over time
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* it may evolved to support other microprocessors (eg, the Zilog Z80).
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*
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* @constructor
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* @extends CPU
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* @param {Object} parmsCPU
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*/
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function CPUState(parmsCPU)
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{
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this.model = +parmsCPU['model'] || CPUDef.MODEL_8080;
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var nCyclesDefault = 0;
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switch(this.model) {
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case CPUDef.MODEL_8080:
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default:
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nCyclesDefault = 1000000;
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break;
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}
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CPU.call(this, parmsCPU, nCyclesDefault);
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/*
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* Initialize processor operation to match the requested model
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*/
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this.initProcessor();
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/*
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* A variety of stepCPU() state variables that don't strictly need to be initialized before the first
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* stepCPU() call, but it's good form to do so.
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*/
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this.resetCycles();
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this.flags.complete = this.flags.debugCheck = false;
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/*
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* If there are no live registers to display, then updateStatus() can skip a bit....
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*/
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this.cLiveRegs = 0;
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/*
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* Array of halt handlers, if any (see addHaltCheck)
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*/
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this.afnHalt = [];
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this.addrReset = 0x0000;
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/*
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* This initial resetRegs() call is important to create all the registers, so that if/when we call restore(),
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* it will have something to fill in.
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*/
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this.resetRegs();
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}
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Component.subclass(CPUState, CPU);
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/**
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* addHaltCheck(fn)
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*
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* Records a function that will be called during HLT opcode processing.
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*
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* @this {CPUState}
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* @param {function(number)} fn
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*/
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CPUState.prototype.addHaltCheck = function(fn)
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{
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this.afnHalt.push(fn);
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};
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/**
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* initProcessor()
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*
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* Interestingly, if I dynamically generate aOps as an array of functions bound to "this", using the bind()
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* method, overall performance is worse. You would think that eliminating the need to use the call() method
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* on every opcode function invocation would be helpful, but it's not. I'm not sure exactly why yet; perhaps
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* a Closure Compiler optimization is defeated when generating the function array at run-time instead of at
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* compile-time.
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*
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* @this {CPUState}
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*/
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CPUState.prototype.initProcessor = function()
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{
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/*
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* This 256-entry array of opcode functions is at the heart of the CPU engine: step(n).
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*
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* It might be worth trying a switch() statement instead, to see how the performance compares,
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* but I suspect that will vary quite a bit across JavaScript engines; for now, I'm putting my
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* money on array lookup.
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*/
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this.aOpcodeFuncs = [
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CPUDef.opBRK, // 0x00
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CPUDef.opORAindx, // 0x01
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CPUDef.opSim, // 0x02
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CPUDef.opUndefined, // 0x03
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CPUDef.opUndefined, // 0x04
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CPUDef.opORAzp, // 0x05
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CPUDef.opASLzp, // 0x06
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CPUDef.opUndefined, // 0x07
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CPUDef.opPHP, // 0x08
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CPUDef.opORAimm, // 0x09
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CPUDef.opASLacc, // 0x0a
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CPUDef.opUndefined, // 0x0b
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CPUDef.opUndefined, // 0x0c
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CPUDef.opORAabs, // 0x0d
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CPUDef.opASLabs, // 0x0e
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CPUDef.opUndefined, // 0x0f
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CPUDef.opBPL, // 0x10
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CPUDef.opORAindy, // 0x11
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CPUDef.opUndefined, // 0x12
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CPUDef.opUndefined, // 0x13
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CPUDef.opUndefined, // 0x14
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CPUDef.opORAzpx, // 0x15
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CPUDef.opASLzpx, // 0x16
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CPUDef.opUndefined, // 0x17
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CPUDef.opCLC, // 0x18
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CPUDef.opORAabsy, // 0x19
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CPUDef.opUndefined, // 0x1a
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CPUDef.opUndefined, // 0x1b
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CPUDef.opUndefined, // 0x1c
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CPUDef.opORAabsx, // 0x1d
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CPUDef.opASLabsx, // 0x1e
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CPUDef.opUndefined, // 0x1f
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CPUDef.opJSRabs, // 0x20
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CPUDef.opANDindx, // 0x21
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CPUDef.opUndefined, // 0x22
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CPUDef.opUndefined, // 0x23
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CPUDef.opBITzp, // 0x24
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CPUDef.opANDzp, // 0x25
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CPUDef.opROLzp, // 0x26
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CPUDef.opUndefined, // 0x27
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CPUDef.opPLP, // 0x28
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CPUDef.opANDimm, // 0x29
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CPUDef.opROLacc, // 0x2a
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CPUDef.opUndefined, // 0x2b
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CPUDef.opBITabs, // 0x2c
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CPUDef.opANDabs, // 0x2d
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CPUDef.opROLabs, // 0x2e
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CPUDef.opUndefined, // 0x2f
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CPUDef.opBMI, // 0x30
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CPUDef.opANDindy, // 0x31
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CPUDef.opUndefined, // 0x32
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CPUDef.opUndefined, // 0x33
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CPUDef.opUndefined, // 0x34
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CPUDef.opANDzpx, // 0x35
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CPUDef.opROLzpx, // 0x36
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CPUDef.opUndefined, // 0x37
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CPUDef.opSEC, // 0x38
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CPUDef.opANDabsy, // 0x39
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CPUDef.opUndefined, // 0x3a
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CPUDef.opUndefined, // 0x3b
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CPUDef.opUndefined, // 0x3c
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CPUDef.opANDabsx, // 0x3d
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CPUDef.opROLabsx, // 0x3e
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CPUDef.opUndefined, // 0x3f
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CPUDef.opRTI, // 0x40
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CPUDef.opEORindx, // 0x41
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CPUDef.opUndefined, // 0x42
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CPUDef.opUndefined, // 0x43
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CPUDef.opUndefined, // 0x44
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CPUDef.opEORzp, // 0x45
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CPUDef.opLSRzp, // 0x46
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CPUDef.opUndefined, // 0x47
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CPUDef.opPHA, // 0x48
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CPUDef.opEORimm, // 0x49
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CPUDef.opLSRacc, // 0x4a
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CPUDef.opUndefined, // 0x4b
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CPUDef.opJMPimm16, // 0x4c
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CPUDef.opEORabs, // 0x4d
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CPUDef.opLSRabs, // 0x4e
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CPUDef.opUndefined, // 0x4f
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CPUDef.opBVC, // 0x50
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CPUDef.opEORindy, // 0x51
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CPUDef.opUndefined, // 0x52
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CPUDef.opUndefined, // 0x53
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CPUDef.opUndefined, // 0x54
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CPUDef.opEORzpx, // 0x55
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CPUDef.opLSRzpx, // 0x56
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CPUDef.opUndefined, // 0x57
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CPUDef.opCLI, // 0x58
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CPUDef.opEORabsy, // 0x59
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CPUDef.opUndefined, // 0x5a
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CPUDef.opUndefined, // 0x5b
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CPUDef.opUndefined, // 0x5c
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CPUDef.opEORabsx, // 0x5d
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CPUDef.opLSRabsx, // 0x5e
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CPUDef.opUndefined, // 0x5f
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CPUDef.opRTS, // 0x60
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CPUDef.opADCindx, // 0x61
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CPUDef.opUndefined, // 0x62
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CPUDef.opUndefined, // 0x63
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CPUDef.opUndefined, // 0x64
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CPUDef.opADCzp, // 0x65
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CPUDef.opRORzp, // 0x66
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CPUDef.opUndefined, // 0x67
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CPUDef.opPLA, // 0x68
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CPUDef.opADCimm, // 0x69
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CPUDef.opRORacc, // 0x6a
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CPUDef.opUndefined, // 0x6b
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CPUDef.opJMPabs16, // 0x6c
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CPUDef.opADCabs, // 0x6d
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CPUDef.opRORabs, // 0x6e
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CPUDef.opUndefined, // 0x6f
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CPUDef.opBVS, // 0x70
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CPUDef.opADCindy, // 0x71
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CPUDef.opUndefined, // 0x72
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CPUDef.opUndefined, // 0x73
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CPUDef.opUndefined, // 0x74
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CPUDef.opADCzpx, // 0x75
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CPUDef.opRORzpx, // 0x76
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CPUDef.opUndefined, // 0x77
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CPUDef.opSEI, // 0x78
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CPUDef.opADCabsy, // 0x79
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CPUDef.opUndefined, // 0x7a
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CPUDef.opUndefined, // 0x7b
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CPUDef.opUndefined, // 0x7c
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CPUDef.opADCabsx, // 0x7d
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CPUDef.opRORabsx, // 0x7e
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CPUDef.opUndefined, // 0x7f
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CPUDef.opUndefined, // 0x80
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CPUDef.opSTAindx, // 0x81
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CPUDef.opUndefined, // 0x82
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CPUDef.opUndefined, // 0x83
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CPUDef.opSTYzp, // 0x84
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CPUDef.opSTAzp, // 0x85
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CPUDef.opSTXzp, // 0x86
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CPUDef.opUndefined, // 0x87
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CPUDef.opDEY, // 0x88
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CPUDef.opUndefined, // 0x89
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CPUDef.opTXA, // 0x8a
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CPUDef.opUndefined, // 0x8b
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CPUDef.opSTYabs, // 0x8c
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CPUDef.opSTAabs, // 0x8d
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CPUDef.opSTXabs, // 0x8e
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CPUDef.opUndefined, // 0x8f
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CPUDef.opBCC, // 0x90
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CPUDef.opSTAindy, // 0x91
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CPUDef.opUndefined, // 0x92
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CPUDef.opUndefined, // 0x93
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CPUDef.opSTYzpx, // 0x94
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CPUDef.opSTAzpx, // 0x95
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CPUDef.opSTXzpy, // 0x96
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CPUDef.opUndefined, // 0x97
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CPUDef.opTYA, // 0x98
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CPUDef.opSTAabsy, // 0x99
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CPUDef.opTXS, // 0x9a
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CPUDef.opUndefined, // 0x9b
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CPUDef.opUndefined, // 0x9c
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CPUDef.opSTAabsx, // 0x9d
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CPUDef.opUndefined, // 0x9e
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CPUDef.opUndefined, // 0x9f
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CPUDef.opLDYimm, // 0xa0
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CPUDef.opLDAindx, // 0xa1
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CPUDef.opLDXimm, // 0xa2
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CPUDef.opUndefined, // 0xa3
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CPUDef.opLDYzp, // 0xa4
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CPUDef.opLDAzp, // 0xa5
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CPUDef.opLDXzp, // 0xa6
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CPUDef.opUndefined, // 0xa7
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CPUDef.opTAY, // 0xa8
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CPUDef.opLDAimm, // 0xa9
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CPUDef.opTAX, // 0xaa
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CPUDef.opUndefined, // 0xab
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CPUDef.opLDYabs, // 0xac
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CPUDef.opLDAabs, // 0xad
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CPUDef.opLDXabs, // 0xae
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CPUDef.opUndefined, // 0xaf
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CPUDef.opBCS, // 0xb0
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CPUDef.opLDAindy, // 0xb1
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CPUDef.opUndefined, // 0xb2
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CPUDef.opUndefined, // 0xb3
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CPUDef.opLDYzpx, // 0xb4
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CPUDef.opLDAzpx, // 0xb5
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CPUDef.opLDXzpy, // 0xb6
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CPUDef.opUndefined, // 0xb7
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CPUDef.opCLV, // 0xb8
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CPUDef.opLDAabsy, // 0xb9
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CPUDef.opTSX, // 0xba
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CPUDef.opUndefined, // 0xbb
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CPUDef.opLDYabsx, // 0xbc
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CPUDef.opLDAabsx, // 0xbd
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CPUDef.opLDXabsy, // 0xbe
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CPUDef.opUndefined, // 0xbf
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CPUDef.opCPYimm, // 0xc0
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CPUDef.opCMPindx, // 0xc1
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CPUDef.opUndefined, // 0xc2
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CPUDef.opUndefined, // 0xc3
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CPUDef.opCPYzp, // 0xc4
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CPUDef.opCMPzp, // 0xc5
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CPUDef.opDECzp, // 0xc6
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CPUDef.opUndefined, // 0xc7
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CPUDef.opINY, // 0xc8
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CPUDef.opCMPimm, // 0xc9
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CPUDef.opDEX, // 0xca
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CPUDef.opUndefined, // 0xcb
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CPUDef.opCPYabs, // 0xcc
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CPUDef.opCMPabs, // 0xcd
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CPUDef.opDECabs, // 0xce
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CPUDef.opUndefined, // 0xcf
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CPUDef.opBNE, // 0xd0
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CPUDef.opCMPindy, // 0xd1
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CPUDef.opUndefined, // 0xd2
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CPUDef.opUndefined, // 0xd3
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CPUDef.opUndefined, // 0xd4
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CPUDef.opCMPzpx, // 0xd5
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CPUDef.opDECzpx, // 0xd6
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CPUDef.opUndefined, // 0xd7
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CPUDef.opCLD, // 0xd8
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CPUDef.opCMPabsy, // 0xd9
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CPUDef.opUndefined, // 0xda
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CPUDef.opUndefined, // 0xdb
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CPUDef.opUndefined, // 0xdc
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CPUDef.opCMPabsx, // 0xdd
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CPUDef.opDECabsx, // 0xde
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CPUDef.opUndefined, // 0xdf
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CPUDef.opCPXimm, // 0xe0
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CPUDef.opSBCindx, // 0xe1
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CPUDef.opUndefined, // 0xe2
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CPUDef.opUndefined, // 0xe3
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CPUDef.opCPXzp, // 0xe4
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CPUDef.opSBCzp, // 0xe5
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CPUDef.opINCzp, // 0xe6
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CPUDef.opUndefined, // 0xe7
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CPUDef.opINX, // 0xe8
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CPUDef.opSBCimm, // 0xe9
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CPUDef.opNOP, // 0xea
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CPUDef.opUndefined, // 0xeb
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CPUDef.opCPXabs, // 0xec
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CPUDef.opSBCabs, // 0xed
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CPUDef.opINCabs, // 0xee
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CPUDef.opUndefined, // 0xef
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CPUDef.opBEQ, // 0xf0
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CPUDef.opSBCindy, // 0xf1
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CPUDef.opUndefined, // 0xf2
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CPUDef.opUndefined, // 0xf3
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CPUDef.opUndefined, // 0xf4
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CPUDef.opSBCzpx, // 0xf5
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CPUDef.opINCzpx, // 0xf6
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CPUDef.opUndefined, // 0xf7
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CPUDef.opSED, // 0xf8
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CPUDef.opSBCabsy, // 0xf9
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CPUDef.opUndefined, // 0xfa
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CPUDef.opUndefined, // 0xfb
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CPUDef.opUndefined, // 0xfc
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CPUDef.opSBCabsx, // 0xfd
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CPUDef.opINCabsx, // 0xfe
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CPUDef.opUndefined // 0xff
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];
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};
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/**
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* reset()
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*
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* @this {CPUState}
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*/
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CPUState.prototype.reset = function()
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{
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if (this.flags.running) this.stopCPU();
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this.resetRegs();
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this.resetCycles();
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this.clearError(); // clear any fatal error/exception that setError() may have flagged
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this.parent.reset.call(this);
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};
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/**
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* resetRegs()
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*
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* @this {CPUState}
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*/
|
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CPUState.prototype.resetRegs = function()
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{
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this.regA = 0;
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this.regB = 0;
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this.regC = 0;
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this.regD = 0;
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this.regE = 0;
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this.regH = 0;
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this.regL = 0;
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this.setSP(0);
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this.setPC(this.addrReset);
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/*
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* This resets the Processor Status flags (regPS), along with all the internal "result registers".
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*/
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this.setPS(0);
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|
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/*
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* intFlags contains some internal states we use to indicate whether a hardware interrupt (INTFLAG.INTR) or
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* Trap software interrupt (INTR.TRAP) has been requested, as well as when we're in a "HLT" state (INTFLAG.HALT)
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* that requires us to wait for a hardware interrupt (INTFLAG.INTR) before continuing execution.
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*/
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this.intFlags = CPUDef.INTFLAG.NONE;
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};
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|
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/**
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* setReset(addr)
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*
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* @this {CPUState}
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* @param {number} addr
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*/
|
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CPUState.prototype.setReset = function(addr)
|
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{
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this.addrReset = addr;
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this.setPC(addr);
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};
|
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|
|
/**
|
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* getChecksum()
|
|
*
|
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* @this {CPUState}
|
|
* @return {number} a 32-bit summation of key elements of the current CPU state (used by the CPU checksum code)
|
|
*/
|
|
CPUState.prototype.getChecksum = function()
|
|
{
|
|
var sum = (this.regA + this.regB + this.regC + this.regD + this.regE + this.regH + this.regL)|0;
|
|
sum = (sum + this.getSP() + this.getPC() + this.getPS())|0;
|
|
return sum;
|
|
};
|
|
|
|
/**
|
|
* save()
|
|
*
|
|
* This implements save support for the CPUState component.
|
|
*
|
|
* @this {CPUState}
|
|
* @return {Object|null}
|
|
*/
|
|
CPUState.prototype.save = function()
|
|
{
|
|
var state = new State(this);
|
|
state.set(0, [this.regA, this.regB, this.regC, this.regD, this.regE, this.regH, this.regL, this.getSP(), this.getPC(), this.getPS()]);
|
|
state.set(1, [this.intFlags, this.nTotalCycles, this.getSpeed()]);
|
|
state.set(2, this.bus.saveMemory());
|
|
return state.data();
|
|
};
|
|
|
|
/**
|
|
* restore(data)
|
|
*
|
|
* This implements restore support for the CPUState component.
|
|
*
|
|
* @this {CPUState}
|
|
* @param {Object} data
|
|
* @return {boolean} true if restore successful, false if not
|
|
*/
|
|
CPUState.prototype.restore = function(data)
|
|
{
|
|
var a = data[0];
|
|
this.regA = a[0];
|
|
this.regB = a[1];
|
|
this.regC = a[2];
|
|
this.regD = a[3];
|
|
this.regE = a[4];
|
|
this.regH = a[5];
|
|
this.regL = a[6];
|
|
this.setSP(a[7]);
|
|
this.setPC(a[8]);
|
|
this.setPS(a[9]);
|
|
a = data[1];
|
|
this.intFlags = a[0];
|
|
this.nTotalCycles = a[1];
|
|
this.setSpeed(a[3]);
|
|
return this.bus.restoreMemory(data[2]);
|
|
};
|
|
|
|
/**
|
|
* setBinding(sHTMLType, sBinding, control, sValue)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {string|null} sHTMLType is the type of the HTML control (eg, "button", "list", "text", "submit", "textarea", "canvas")
|
|
* @param {string} sBinding is the value of the 'binding' parameter stored in the HTML control's "data-value" attribute (eg, "AX")
|
|
* @param {Object} control is the HTML control DOM object (eg, HTMLButtonElement)
|
|
* @param {string} [sValue] optional data value
|
|
* @return {boolean} true if binding was successful, false if unrecognized binding request
|
|
*/
|
|
CPUState.prototype.setBinding = function(sHTMLType, sBinding, control, sValue)
|
|
{
|
|
var fBound = false;
|
|
switch (sBinding) {
|
|
case "A":
|
|
case "B":
|
|
case "C":
|
|
case "BC":
|
|
case "D":
|
|
case "E":
|
|
case "DE":
|
|
case "H":
|
|
case "L":
|
|
case "HL":
|
|
case "SP":
|
|
case "PC":
|
|
case "PS":
|
|
case "IF":
|
|
case "SF":
|
|
case "ZF":
|
|
case "AF":
|
|
case "PF":
|
|
case "CF":
|
|
this.bindings[sBinding] = control;
|
|
this.cLiveRegs++;
|
|
fBound = true;
|
|
break;
|
|
default:
|
|
fBound = this.parent.setBinding.call(this, sHTMLType, sBinding, control);
|
|
break;
|
|
}
|
|
return fBound;
|
|
};
|
|
|
|
/**
|
|
* getBC()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getBC = function()
|
|
{
|
|
return (this.regB << 8) | this.regC;
|
|
};
|
|
|
|
/**
|
|
* setBC(w)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} w
|
|
*/
|
|
CPUState.prototype.setBC = function(w)
|
|
{
|
|
this.regB = (w >> 8) & 0xff;
|
|
this.regC = w & 0xff;
|
|
};
|
|
|
|
/**
|
|
* getDE()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getDE = function()
|
|
{
|
|
return (this.regD << 8) | this.regE;
|
|
};
|
|
|
|
/**
|
|
* setDE(w)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} w
|
|
*/
|
|
CPUState.prototype.setDE = function(w)
|
|
{
|
|
this.regD = (w >> 8) & 0xff;
|
|
this.regE = w & 0xff;
|
|
};
|
|
|
|
/**
|
|
* getHL()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getHL = function()
|
|
{
|
|
return (this.regH << 8) | this.regL;
|
|
};
|
|
|
|
/**
|
|
* setHL(w)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} w
|
|
*/
|
|
CPUState.prototype.setHL = function(w)
|
|
{
|
|
this.regH = (w >> 8) & 0xff;
|
|
this.regL = w & 0xff;
|
|
};
|
|
|
|
/**
|
|
* getSP()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getSP = function()
|
|
{
|
|
return this.regSP;
|
|
};
|
|
|
|
/**
|
|
* setSP(off)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} off
|
|
*/
|
|
CPUState.prototype.setSP = function(off)
|
|
{
|
|
this.regSP = off & 0xffff;
|
|
};
|
|
|
|
/**
|
|
* getPC()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getPC = function()
|
|
{
|
|
return this.regPC;
|
|
};
|
|
|
|
/**
|
|
* offPC()
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} off
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.offPC = function(off)
|
|
{
|
|
return (this.regPC + off) & 0xffff;
|
|
};
|
|
|
|
/**
|
|
* setPC(off)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} off
|
|
*/
|
|
CPUState.prototype.setPC = function(off)
|
|
{
|
|
this.regPC = off & 0xffff;
|
|
};
|
|
|
|
/**
|
|
* clearCF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearCF = function()
|
|
{
|
|
this.resultZeroCarry &= 0xff;
|
|
};
|
|
|
|
/**
|
|
* getCF()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} 0 or 1 (CPUDef.PS.CF)
|
|
*/
|
|
CPUState.prototype.getCF = function()
|
|
{
|
|
return (this.resultZeroCarry & 0x100)? CPUDef.PS.CF : 0;
|
|
};
|
|
|
|
/**
|
|
* setCF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.setCF = function()
|
|
{
|
|
this.resultZeroCarry |= 0x100;
|
|
};
|
|
|
|
/**
|
|
* updateCF(CF)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} CF (0x000 or 0x100)
|
|
*/
|
|
CPUState.prototype.updateCF = function(CF)
|
|
{
|
|
this.resultZeroCarry = (this.resultZeroCarry & 0xff) | CF;
|
|
};
|
|
|
|
/**
|
|
* clearPF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearPF = function()
|
|
{
|
|
if (this.getPF()) this.resultParitySign ^= 0x1;
|
|
};
|
|
|
|
/**
|
|
* getPF()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} 0 or CPUDef.PS.PF
|
|
*/
|
|
CPUState.prototype.getPF = function()
|
|
{
|
|
return (CPUDef.PARITY[this.resultParitySign & 0xff])? CPUDef.PS.PF : 0;
|
|
};
|
|
|
|
/**
|
|
* setPF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.setPF = function()
|
|
{
|
|
if (!this.getPF()) this.resultParitySign ^= 0x1;
|
|
};
|
|
|
|
/**
|
|
* clearAF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearAF = function()
|
|
{
|
|
this.resultAuxOverflow = (this.resultParitySign & 0x10) | (this.resultAuxOverflow & ~0x10);
|
|
};
|
|
|
|
/**
|
|
* getAF()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} 0 or CPUDef.PS.AF
|
|
*/
|
|
CPUState.prototype.getAF = function()
|
|
{
|
|
return ((this.resultParitySign ^ this.resultAuxOverflow) & 0x10)? CPUDef.PS.AF : 0;
|
|
};
|
|
|
|
/**
|
|
* setAF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.setAF = function()
|
|
{
|
|
this.resultAuxOverflow = (~this.resultParitySign & 0x10) | (this.resultAuxOverflow & ~0x10);
|
|
};
|
|
|
|
/**
|
|
* clearZF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearZF = function()
|
|
{
|
|
this.resultZeroCarry |= 0xff;
|
|
};
|
|
|
|
/**
|
|
* getZF()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} 0 or CPUDef.PS.ZF
|
|
*/
|
|
CPUState.prototype.getZF = function()
|
|
{
|
|
return (this.resultZeroCarry & 0xff)? 0 : CPUDef.PS.ZF;
|
|
};
|
|
|
|
/**
|
|
* setZF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.setZF = function()
|
|
{
|
|
this.resultZeroCarry &= ~0xff;
|
|
};
|
|
|
|
/**
|
|
* clearSF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearSF = function()
|
|
{
|
|
if (this.getSF()) this.resultParitySign ^= 0xc0;
|
|
};
|
|
|
|
/**
|
|
* getSF()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} 0 or CPUDef.PS.SF
|
|
*/
|
|
CPUState.prototype.getSF = function()
|
|
{
|
|
return (this.resultParitySign & 0x80)? CPUDef.PS.SF : 0;
|
|
};
|
|
|
|
/**
|
|
* setSF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.setSF = function()
|
|
{
|
|
if (!this.getSF()) this.resultParitySign ^= 0xc0;
|
|
};
|
|
|
|
/**
|
|
* clearIF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearIF = function()
|
|
{
|
|
this.regPS &= ~CPUDef.PS.IF;
|
|
};
|
|
|
|
/**
|
|
* getIF()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} 0 or CPUDef.PS.IF
|
|
*/
|
|
CPUState.prototype.getIF = function()
|
|
{
|
|
return (this.regPS & CPUDef.PS.IF);
|
|
};
|
|
|
|
/**
|
|
* setIF()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.setIF = function()
|
|
{
|
|
this.regPS |= CPUDef.PS.IF;
|
|
};
|
|
|
|
/**
|
|
* getPS()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getPS = function()
|
|
{
|
|
return (this.regPS & ~CPUDef.PS.RESULT) | (this.getSF() | this.getZF() | this.getAF() | this.getPF() | this.getCF());
|
|
};
|
|
|
|
/**
|
|
* setPS(regPS)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} regPS
|
|
*/
|
|
CPUState.prototype.setPS = function(regPS)
|
|
{
|
|
this.resultZeroCarry = this.resultParitySign = this.resultAuxOverflow = 0;
|
|
if (regPS & CPUDef.PS.CF) this.resultZeroCarry |= 0x100;
|
|
if (!(regPS & CPUDef.PS.PF)) this.resultParitySign |= 0x01;
|
|
if (regPS & CPUDef.PS.AF) this.resultAuxOverflow |= 0x10;
|
|
if (!(regPS & CPUDef.PS.ZF)) this.resultZeroCarry |= 0xff;
|
|
if (regPS & CPUDef.PS.SF) this.resultParitySign ^= 0xc0;
|
|
this.regPS = (this.regPS & ~(CPUDef.PS.RESULT | CPUDef.PS.INTERNAL)) | (regPS & CPUDef.PS.INTERNAL) | CPUDef.PS.SET;
|
|
Component.assert((regPS & CPUDef.PS.RESULT) == (this.getPS() & CPUDef.PS.RESULT));
|
|
};
|
|
|
|
/**
|
|
* getPSW()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.getPSW = function()
|
|
{
|
|
return (this.getPS() & CPUDef.PS.MASK) | (this.regA << 8);
|
|
};
|
|
|
|
/**
|
|
* setPSW(w)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} w
|
|
*/
|
|
CPUState.prototype.setPSW = function(w)
|
|
{
|
|
this.setPS((w & CPUDef.PS.MASK) | (this.regPS & ~CPUDef.PS.MASK));
|
|
this.regA = w >> 8;
|
|
};
|
|
|
|
/**
|
|
* addByte(src)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA + src
|
|
*/
|
|
CPUState.prototype.addByte = function(src)
|
|
{
|
|
this.resultAuxOverflow = this.regA ^ src;
|
|
return this.resultParitySign = (this.resultZeroCarry = this.regA + src) & 0xff;
|
|
};
|
|
|
|
/**
|
|
* addByteCarry(src)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA + src + carry
|
|
*/
|
|
CPUState.prototype.addByteCarry = function(src)
|
|
{
|
|
this.resultAuxOverflow = this.regA ^ src;
|
|
return this.resultParitySign = (this.resultZeroCarry = this.regA + src + ((this.resultZeroCarry & 0x100)? 1 : 0)) & 0xff;
|
|
};
|
|
|
|
/**
|
|
* andByte(src)
|
|
*
|
|
* Ordinarily, one would expect the Auxiliary Carry flag (AF) to be clear after this operation,
|
|
* but apparently the 8080 will set AF if bit 3 in either operand is set.
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA & src
|
|
*/
|
|
CPUState.prototype.andByte = function(src)
|
|
{
|
|
this.resultZeroCarry = this.resultParitySign = this.resultAuxOverflow = this.regA & src;
|
|
if ((this.regA | src) & 0x8) this.resultAuxOverflow ^= 0x10; // set AF by inverting bit 4 in resultAuxOverflow
|
|
return this.resultZeroCarry;
|
|
};
|
|
|
|
/**
|
|
* decByte(b)
|
|
*
|
|
* We perform this operation using 8-bit two's complement arithmetic, by negating and then adding
|
|
* the implied src of 1. This appears to mimic how the 8080 manages the Auxiliary Carry flag (AF).
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} b
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.decByte = function(b)
|
|
{
|
|
this.resultAuxOverflow = b ^ 0xff;
|
|
b = this.resultParitySign = (b + 0xff) & 0xff;
|
|
this.resultZeroCarry = (this.resultZeroCarry & ~0xff) | b;
|
|
return b;
|
|
};
|
|
|
|
/**
|
|
* incByte(b)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} b
|
|
* @return {number}
|
|
*/
|
|
CPUState.prototype.incByte = function(b)
|
|
{
|
|
this.resultAuxOverflow = b;
|
|
b = this.resultParitySign = (b + 1) & 0xff;
|
|
this.resultZeroCarry = (this.resultZeroCarry & ~0xff) | b;
|
|
return b;
|
|
};
|
|
|
|
/**
|
|
* orByte(src)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA | src
|
|
*/
|
|
CPUState.prototype.orByte = function(src)
|
|
{
|
|
return this.resultParitySign = this.resultZeroCarry = this.resultAuxOverflow = this.regA | src;
|
|
};
|
|
|
|
/**
|
|
* subByte(src)
|
|
*
|
|
* We perform this operation using 8-bit two's complement arithmetic, by inverting src, adding
|
|
* src + 1, and then inverting the resulting carry (resultZeroCarry ^ 0x100). This appears to mimic
|
|
* how the 8080 manages the Auxiliary Carry flag (AF).
|
|
*
|
|
* This function is also used as a cmpByte() function; compare instructions simply ignore the
|
|
* return value.
|
|
*
|
|
* Example: A=66, SUI $10
|
|
*
|
|
* If we created the two's complement of 0x10 by negating it, there would just be one addition:
|
|
*
|
|
* 0110 0110 (0x66)
|
|
* + 1111 0000 (0xF0) (ie, -0x10)
|
|
* ---------
|
|
* 1 0101 0110 (0x56)
|
|
*
|
|
* But in order to mimic the 8080's AF flag, we must perform the two's complement of src in two steps,
|
|
* inverting it before the add, and then incrementing after the add; eg:
|
|
*
|
|
* 0110 0110 (0x66)
|
|
* + 1110 1111 (0xEF) (ie, ~0x10)
|
|
* ---------
|
|
* 1 0101 0101 (0x55)
|
|
* + 0000 0001 (0x01)
|
|
* ---------
|
|
* 1 0101 0110 (0x56)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA - src
|
|
*/
|
|
CPUState.prototype.subByte = function(src)
|
|
{
|
|
src ^= 0xff;
|
|
this.resultAuxOverflow = this.regA ^ src;
|
|
return this.resultParitySign = (this.resultZeroCarry = (this.regA + src + 1) ^ 0x100) & 0xff;
|
|
};
|
|
|
|
/**
|
|
* subByteBorrow(src)
|
|
*
|
|
* We perform this operation using 8-bit two's complement arithmetic, using logic similar to subByte(),
|
|
* but changing the final increment to a conditional increment, because if the Carry flag (CF) is set, then
|
|
* we don't need to perform the increment at all.
|
|
*
|
|
* This mimics the behavior of subByte() when the Carry flag (CF) is clear, and hopefully also mimics how the
|
|
* 8080 manages the Auxiliary Carry flag (AF) when the Carry flag (CF) is set.
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA - src - carry
|
|
*/
|
|
CPUState.prototype.subByteBorrow = function(src)
|
|
{
|
|
src ^= 0xff;
|
|
this.resultAuxOverflow = this.regA ^ src;
|
|
return this.resultParitySign = (this.resultZeroCarry = (this.regA + src + ((this.resultZeroCarry & 0x100)? 0 : 1)) ^ 0x100) & 0xff;
|
|
};
|
|
|
|
/**
|
|
* xorByte(src)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} src
|
|
* @return {number} regA ^ src
|
|
*/
|
|
CPUState.prototype.xorByte = function(src)
|
|
{
|
|
return this.resultParitySign = this.resultZeroCarry = this.resultAuxOverflow = this.regA ^ src;
|
|
};
|
|
|
|
/**
|
|
* getByte(addr)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} addr is a linear address
|
|
* @return {number} byte (8-bit) value at that address
|
|
*/
|
|
CPUState.prototype.getByte = function(addr)
|
|
{
|
|
return this.bus.getByte(addr);
|
|
};
|
|
|
|
/**
|
|
* getWord(addr)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} addr is a linear address
|
|
* @return {number} word (16-bit) value at that address
|
|
*/
|
|
CPUState.prototype.getWord = function(addr)
|
|
{
|
|
return this.bus.getShort(addr);
|
|
};
|
|
|
|
/**
|
|
* setByte(addr, b)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} addr is a linear address
|
|
* @param {number} b is the byte (8-bit) value to write (which we truncate to 8 bits; required by opSTOSb)
|
|
*/
|
|
CPUState.prototype.setByte = function(addr, b)
|
|
{
|
|
this.bus.setByte(addr, b);
|
|
};
|
|
|
|
/**
|
|
* setWord(addr, w)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} addr is a linear address
|
|
* @param {number} w is the word (16-bit) value to write (which we truncate to 16 bits to be safe)
|
|
*/
|
|
CPUState.prototype.setWord = function(addr, w)
|
|
{
|
|
this.bus.setShort(addr, w);
|
|
};
|
|
|
|
/**
|
|
* getPCByte()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} byte at the current PC; PC advanced by 1
|
|
*/
|
|
CPUState.prototype.getPCByte = function()
|
|
{
|
|
var b = this.getByte(this.regPC);
|
|
this.setPC(this.regPC + 1);
|
|
return b;
|
|
};
|
|
|
|
/**
|
|
* getPCWord()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} word at the current PC; PC advanced by 2
|
|
*/
|
|
CPUState.prototype.getPCWord = function()
|
|
{
|
|
var w = this.getWord(this.regPC);
|
|
this.setPC(this.regPC + 2);
|
|
return w;
|
|
};
|
|
|
|
/**
|
|
* popWord()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {number} word popped from the current SP; SP increased by 2
|
|
*/
|
|
CPUState.prototype.popWord = function()
|
|
{
|
|
var w = this.getWord(this.regSP);
|
|
this.setSP(this.regSP + 2);
|
|
return w;
|
|
};
|
|
|
|
/**
|
|
* pushWord(w)
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} w is the word (16-bit) value to push at current SP; SP decreased by 2
|
|
*/
|
|
CPUState.prototype.pushWord = function(w)
|
|
{
|
|
this.setSP(this.regSP - 2);
|
|
this.setWord(this.regSP, w);
|
|
};
|
|
|
|
/**
|
|
* checkINTR()
|
|
*
|
|
* @this {CPUState}
|
|
* @return {boolean} true if h/w interrupt has just been acknowledged, false if not
|
|
*/
|
|
CPUState.prototype.checkINTR = function()
|
|
{
|
|
if ((this.intFlags & CPUDef.INTFLAG.INTR) && this.getIF()) {
|
|
var bRST = CPUDef.OPCODE.RST0 | ((this.intFlags & CPUDef.INTFLAG.INTL) << 3);
|
|
this.clearINTR();
|
|
this.clearIF();
|
|
this.aOps[bRST].call(this);
|
|
return true;
|
|
}
|
|
return false;
|
|
};
|
|
|
|
/**
|
|
* clearINTR()
|
|
*
|
|
* @this {CPUState}
|
|
*/
|
|
CPUState.prototype.clearINTR = function()
|
|
{
|
|
this.intFlags &= ~(CPUDef.INTFLAG.INTL | CPUDef.INTFLAG.INTR);
|
|
};
|
|
|
|
/**
|
|
* requestINTR(nLevel)
|
|
*
|
|
* This is called by any component that wants to request a h/w interrupt.
|
|
*
|
|
* NOTE: We allow INTR to be set regardless of the current state of interrupt flag (IF), on the theory
|
|
* that if/when the CPU briefly turns interrupts off, it shouldn't lose the last h/w interrupt requested.
|
|
* So instead of ignoring INTR here, checkINTR() ignores INTR as long as the interrupt flag (IF) is clear.
|
|
*
|
|
* The downside is that, as long as the CPU has interrupts disabled, an active INTR state will slow stepCPU()
|
|
* down slightly. We could avoid that by introducing a two-stage interrupt tracking system, where a separate
|
|
* variable keeps track of the last interrupt requested whenever the interrupt flag (IF) is clear, and when
|
|
* setIF() finally occurs, that interrupt is propagated to intFlags. But for now, we're going to assume that
|
|
* scenario is rare.
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} nLevel (0-7)
|
|
*/
|
|
CPUState.prototype.requestINTR = function(nLevel)
|
|
{
|
|
this.intFlags = (this.intFlags & ~CPUDef.INTFLAG.INTL) | nLevel | CPUDef.INTFLAG.INTR;
|
|
};
|
|
|
|
/**
|
|
* updateReg(sReg, nValue, cch)
|
|
*
|
|
* This function helps updateStatus() by massaging the register names and values according to
|
|
* CPU type before passing the call to displayValue(); in the "old days", updateStatus() called
|
|
* displayValue() directly (although then it was called displayReg()).
|
|
*
|
|
* @this {CPUState}
|
|
* @param {string} sReg
|
|
* @param {number} nValue
|
|
* @param {number} [cch] (default is 2 hex digits)
|
|
*/
|
|
CPUState.prototype.updateReg = function(sReg, nValue, cch)
|
|
{
|
|
this.displayValue(sReg, nValue, cch || 2);
|
|
};
|
|
|
|
/**
|
|
* updateStatus(fForce)
|
|
*
|
|
* This provides periodic Control Panel updates (eg, a few times per second; see STATUS_UPDATES_PER_SECOND).
|
|
* this is where we take care of any DOM updates (eg, register values) while the CPU is running.
|
|
*
|
|
* Any high-frequency updates should be performed in updateVideo(), which should avoid DOM updates, since updateVideo()
|
|
* can be called up to 60 times per second (see VIDEO_UPDATES_PER_SECOND).
|
|
*
|
|
* @this {CPUState}
|
|
* @param {boolean} [fForce] (true will display registers even if the CPU is running and "live" registers are not enabled)
|
|
*/
|
|
CPUState.prototype.updateStatus = function(fForce)
|
|
{
|
|
if (this.cLiveRegs) {
|
|
if (fForce || !this.flags.running || this.flags.displayLiveRegs) {
|
|
this.updateReg("A", this.regA);
|
|
this.updateReg("B", this.regB);
|
|
this.updateReg("C", this.regC);
|
|
this.updateReg("BC", this.getBC(), 4);
|
|
this.updateReg("D", this.regD);
|
|
this.updateReg("E", this.regE);
|
|
this.updateReg("DE", this.getDE(), 4);
|
|
this.updateReg("H", this.regH);
|
|
this.updateReg("L", this.regL);
|
|
this.updateReg("HL", this.getHL(), 4);
|
|
this.updateReg("SP", this.getSP(), 4);
|
|
this.updateReg("PC", this.getPC(), 4);
|
|
var regPS = this.getPS();
|
|
this.updateReg("PS", regPS, 4);
|
|
this.updateReg("IF", (regPS & CPUDef.PS.IF)? 1 : 0, 1);
|
|
this.updateReg("SF", (regPS & CPUDef.PS.SF)? 1 : 0, 1);
|
|
this.updateReg("ZF", (regPS & CPUDef.PS.ZF)? 1 : 0, 1);
|
|
this.updateReg("AF", (regPS & CPUDef.PS.AF)? 1 : 0, 1);
|
|
this.updateReg("PF", (regPS & CPUDef.PS.PF)? 1 : 0, 1);
|
|
this.updateReg("CF", (regPS & CPUDef.PS.CF)? 1 : 0, 1);
|
|
}
|
|
}
|
|
var controlSpeed = this.bindings["speed"];
|
|
if (controlSpeed) controlSpeed.textContent = this.getSpeedCurrent();
|
|
};
|
|
|
|
/**
|
|
* stepCPU(nMinCycles)
|
|
*
|
|
* NOTE: Single-stepping should not be confused with the Trap flag; single-stepping is a Debugger
|
|
* operation that's completely independent of Trap status. The CPU can go in and out of Trap mode,
|
|
* in and out of h/w interrupt service routines (ISRs), etc, but from the Debugger's perspective,
|
|
* they're all one continuous stream of instructions that can be stepped or run at will. Moreover,
|
|
* stepping vs. running should never change the behavior of the simulation.
|
|
*
|
|
* As a result, the Debugger's complete independence means you can run other 8086/8088 debuggers
|
|
* (eg, DEBUG) inside the simulation without interference; you can even "debug" them with the Debugger.
|
|
*
|
|
* @this {CPUState}
|
|
* @param {number} nMinCycles (0 implies a single-step, and therefore breakpoints should be ignored)
|
|
* @return {number} of cycles executed; 0 indicates a pre-execution condition (ie, an execution breakpoint
|
|
* was hit), -1 indicates a post-execution condition (eg, a read or write breakpoint was hit), and a positive
|
|
* number indicates successful completion of that many cycles (which should always be >= nMinCycles).
|
|
*/
|
|
CPUState.prototype.stepCPU = function(nMinCycles)
|
|
{
|
|
/*
|
|
* The Debugger uses fComplete to determine if the instruction completed (true) or was interrupted
|
|
* by a breakpoint or some other exceptional condition (false). NOTE: this does NOT include JavaScript
|
|
* exceptions, which stepCPU() expects the caller to catch using its own exception handler.
|
|
*
|
|
* The CPU relies on the use of stopCPU() rather than fComplete, because the CPU never single-steps
|
|
* (ie, nMinCycles is always some large number), whereas the Debugger does. And conversely, when the
|
|
* Debugger is single-stepping (even when performing multiple single-steps), fRunning is never set,
|
|
* so stopCPU() would have no effect as far as the Debugger is concerned.
|
|
*/
|
|
this.flags.complete = true;
|
|
|
|
/*
|
|
* fDebugCheck is true if we need to "check" every instruction with the Debugger.
|
|
*/
|
|
var fDebugCheck = this.flags.debugCheck = (DEBUGGER && this.dbg && this.dbg.checksEnabled());
|
|
|
|
/*
|
|
* nDebugState is checked only when fDebugCheck is true, and its sole purpose is to tell the first call
|
|
* to checkInstruction() that it can skip breakpoint checks, and that will be true ONLY when fStarting is
|
|
* true OR nMinCycles is zero (the latter means the Debugger is single-stepping).
|
|
*
|
|
* Once we snap fStarting, we clear it, because technically, we've moved beyond "starting" and have
|
|
* officially "started" now.
|
|
*/
|
|
var nDebugState = (!nMinCycles)? -1 : (this.flags.starting? 0 : 1);
|
|
this.flags.starting = false;
|
|
|
|
/*
|
|
* We move the minimum cycle count to nStepCycles (the number of cycles left to step), so that other
|
|
* functions have the ability to force that number to zero (eg, stopCPU()), and thus we don't have to check
|
|
* any other criteria to determine whether we should continue stepping or not.
|
|
*/
|
|
this.nBurstCycles = this.nStepCycles = nMinCycles;
|
|
|
|
do {
|
|
if (this.intFlags) {
|
|
if (this.checkINTR()) {
|
|
if (!nMinCycles) {
|
|
this.assert(DEBUGGER); // nMinCycles of zero should be generated ONLY by the Debugger
|
|
if (DEBUGGER) {
|
|
this.println("interrupt dispatched");
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else if (this.intFlags & CPUDef.INTFLAG.HALT) {
|
|
/*
|
|
* As discussed in opHLT(), the CPU is never REALLY halted by a HLT instruction; instead,
|
|
* opHLT() sets CPUDef.INTFLAG.HALT, signalling to us that we're free to end the current burst
|
|
* AND that we should not execute any more instructions until checkINTR() indicates a hardware
|
|
* interrupt has been requested.
|
|
*
|
|
* One downside to this approach is that it *might* appear to the careful observer that we
|
|
* executed a full complement of instructions during bursts where CPUDef.INTFLAG.HALT was set,
|
|
* when in fact we did not. However, the steady advance of the overall cycle count, and thus
|
|
* the steady series calls to stepCPU(), is needed to ensure that timer updates, video updates,
|
|
* etc, all continue to occur at the expected rates.
|
|
*
|
|
* If necessary, we can add another bookkeeping cycle counter (eg, one that keeps tracks of the
|
|
* number of cycles during which we did not actually execute any instructions).
|
|
*/
|
|
this.nStepCycles = 0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (DEBUGGER && fDebugCheck) {
|
|
if (this.dbg.checkInstruction(this.regPC, nDebugState)) {
|
|
this.stopCPU();
|
|
break;
|
|
}
|
|
nDebugState = 1;
|
|
}
|
|
|
|
this.aOps[this.getPCByte()].call(this);
|
|
|
|
} while (this.nStepCycles > 0);
|
|
|
|
return (this.flags.complete? this.nBurstCycles - this.nStepCycles : (this.flags.complete === undefined? 0 : -1));
|
|
};
|
|
|
|
/**
|
|
* CPUState.init()
|
|
*
|
|
* This function operates on every HTML element of class "cpu", extracting the
|
|
* JSON-encoded parameters for the CPUState constructor from the element's "data-value"
|
|
* attribute, invoking the constructor (which in turn invokes the CPU constructor)
|
|
* to create a CPUState component, and then binding any associated HTML controls to the
|
|
* new component.
|
|
*/
|
|
CPUState.init = function()
|
|
{
|
|
var aeCPUs = Component.getElementsByClass(document, APPCLASS, "cpu");
|
|
for (var iCPU = 0; iCPU < aeCPUs.length; iCPU++) {
|
|
var eCPU = aeCPUs[iCPU];
|
|
var parmsCPU = Component.getComponentParms(eCPU);
|
|
var cpu = new CPUState(parmsCPU);
|
|
Component.bindComponentControls(cpu, eCPU, APPCLASS);
|
|
}
|
|
};
|
|
|
|
/*
|
|
* Initialize every CPU module on the page
|
|
*/
|
|
web.onInit(CPUState.init);
|
|
|
|
if (NODE) module.exports = CPUState;
|