Author	SHA1	Message	Date
Jeff	e2e018af67	More MACRO-10 support	2017-03-11 23:30:06 -08:00
Jeff	52bd554cf1	Updated PDP-10 README files	2017-03-10 11:22:51 -08:00
Jeff	fcee8a2838	Added support for future PDP-10 MACRO-10 assembler	2017-03-10 10:28:32 -08:00
Jeff	3a9cd5cf04	Code cleanup	2017-03-09 17:49:54 -08:00
Jeff	0dc6b7276b	Added lots of PDP-10 compare/increment/decrement/skip/jump instructions	2017-03-09 12:30:51 -08:00
Jeff	70cd954974	Debuggers need to handle negative values a bit better	2017-03-08 16:48:25 -08:00
Jeff	7e207db2a1	Added PDP-10 JSP and JFCL operations (which seem to be the simplest means of getting and setting the processor flags)	2017-03-07 13:44:43 -08:00
Jeff	38a598d21e	Added PDP-10 ADD operations	2017-03-06 23:36:48 -08:00
Jeff	ffb7fa1221	New improved PDP-10 processor flag handling	2017-03-04 21:07:56 -08:00
Jeff	b8a38c8ac6	Finished PDP-10 logical operations	2017-03-03 15:58:15 -08:00
Jeff	616f9d4cda	Started work on PDP-10 logical operations	2017-03-03 11:30:34 -08:00
Jeff	25aa95cec8	First cut at PDP-10 byte instructions	2017-03-02 23:10:24 -08:00
Jeff	affaa1075c	Finished the PDP-10 Move Magnitude opcodes, along with the Push Down and Pop Up opcodes (uncovering some SIMH weirdness along the way)	2017-03-02 16:38:00 -08:00
Jeff	84f8cece67	All PDP-10 MOVN (Move Negative) opcodes implemented	2017-03-02 10:19:37 -08:00
Jeff	e870fd6eec	Fixed the accumulator update logic in all the PDP-10 half-word self-mode instructions, and started work on EXCH, BLT, and MOVE instructions (the BLT is a real odd-ball, and SIMH does some very strange things with the accumulator used by BLT, which we do NOT attempt to replicate; the strangeness is most noticeable when the accumulator is part of the range being transferred)	2017-03-01 16:00:48 -08:00
Jeff	3508b1050e	Started work on v1.34.2: More PDP-10 opcode handlers	2017-03-01 12:26:57 -08:00
Jeff Parsons	a1dba6a679	Added support for assembling PDP-10 I/O instructions	2017-02-28 09:14:56 -08:00
Jeff Parsons	c4f7262e71	Cleaned up the integer base conversion code, and expanded the PDP-10 register dump	2017-02-27 19:18:19 -08:00
Jeff Parsons	caa5fd6c86	Tighten up disassembler output	2017-02-27 18:20:34 -08:00
Jeff Parsons	8863f1127c	Added rudimentary PDP-10 assembler capability to the built-in debugger	2017-02-27 18:06:08 -08:00
Jeff Parsons	06324dd499	Minor PDP-10 debugger alignment change	2017-02-27 12:27:23 -08:00
Jeff Parsons	6cf141baf9	getOpcode() can now handle infinite indirections without starving the emulator	2017-02-26 12:17:21 -08:00
Jeff Parsons	ed4c031035	Implemented my first 4 PDP-10 opcodes (HLL, HLLI, HLLM, HLLS)	2017-02-26 10:51:49 -08:00
Jeff Parsons	3e30bde786	Some PDP-10 disassembler clean-up	2017-02-25 21:19:41 -08:00
Jeff Parsons	cb4d054ead	Added preliminary first-order opcode dispatch table	2017-02-25 16:21:21 -08:00
Jeff Parsons	b628219f5c	Used the new PDP-10 disassembler in test mode to help generate the cpuops.js skeleton	2017-02-25 13:28:47 -08:00
Jeff Parsons	10181fdc45	Added I/O instructions to PDP-10 disassembler	2017-02-25 10:45:25 -08:00
Jeff Parsons	3b27f45b76	Added disassembly of basic PDP-10 operations	2017-02-24 23:15:53 -08:00
Jeff Parsons	ef70ed74b3	Added support for parsing of values (ie, integers) greater than 32 bits, and fixed PDP-10 Bus writes (parameter order differs from other emulators)	2017-02-24 13:07:38 -08:00
Jeff Parsons	c0de732f76	Changed toStrBase() to accept a number of bits rather than a number of bytes, because bytes aren't always 8 bits (see PDP-10)	2017-02-24 10:58:56 -08:00
Jeff Parsons	884b74d96f	Cleaned up PDP register dump code	2017-02-23 16:56:08 -08:00
Jeff Parsons	8320f58d44	Documentation updates to accommodate the PDP-10 work that's starting now	2017-02-23 15:14:51 -08:00
Jeff Parsons	ba7de38fbf	Created PDP-10 skeleton	2017-02-19 15:22:58 -08:00