Jeff
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e1f37c8275
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More MACRO-10 fixes
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2017-03-13 17:44:01 -07:00 |
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Jeff
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3e2b825bef
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Fixed MACRO-10 processing of literals (requires internal labels that don't conflict with MACRO-10 labels)
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2017-03-13 17:02:26 -07:00 |
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Jeff
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d591b08aea
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Added lots of MACRO-10 parsing improvements
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2017-03-13 15:41:07 -07:00 |
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Jeff
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8b1625a174
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Added support for MACRO-10 literals
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2017-03-13 10:33:22 -07:00 |
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Jeff
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5a4e6d3818
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Added support for both MACRO-10 macro defines and macro calls, including parameter substitution
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2017-03-12 20:38:25 -07:00 |
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Jeff
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9ac0ffe679
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Perform the documented encoding of SIXBIT character data for MACRO-10
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2017-03-12 11:56:15 -07:00 |
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Jeff
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05e09699dd
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Cleaned up expression evaluation for improved compatibility with MACRO-10
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2017-03-12 11:44:38 -07:00 |
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Jeff
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e2e018af67
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More MACRO-10 support
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2017-03-11 23:30:06 -08:00 |
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Jeff
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210ec50cd3
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Started work on MACRO-10 parsing
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2017-03-10 15:42:12 -08:00 |
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Jeff
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52bd554cf1
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Updated PDP-10 README files
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2017-03-10 11:22:51 -08:00 |
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Jeff
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fcee8a2838
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Added support for future PDP-10 MACRO-10 assembler
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2017-03-10 10:28:32 -08:00 |
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Jeff
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3a9cd5cf04
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Code cleanup
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2017-03-09 17:49:54 -08:00 |
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Jeff
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40b6b584f6
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Updated PDP-10 file list
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2017-03-09 15:47:01 -08:00 |
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Jeff
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a7b4321f53
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Added all the PDP-10 logical testing/modification instructions
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2017-03-09 15:37:26 -08:00 |
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Jeff
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0dc6b7276b
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Added lots of PDP-10 compare/increment/decrement/skip/jump instructions
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2017-03-09 12:30:51 -08:00 |
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Jeff
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70cd954974
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Debuggers need to handle negative values a bit better
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2017-03-08 16:48:25 -08:00 |
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Jeff
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e9d2b0ec25
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Rounded out the rest of the MUL and DIV instructions
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2017-03-08 15:52:33 -08:00 |
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Jeff
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b3982328ed
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Added a couple of doDIV() improvements
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2017-03-08 14:41:55 -08:00 |
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Jeff
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93e35dfa17
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Ported the Int36 72-bit division code to the PDP-10 component
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2017-03-08 11:38:54 -08:00 |
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Jeff
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48792873de
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Eliminate PDP-10 dependencies on the Int36 class (which is now used only for prototyping and command-line testing)
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2017-03-07 17:21:59 -08:00 |
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Jeff
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65eb821710
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Well, apparently the PDP-10 MUL instruction really DOES store the high-order word first, and it only stores the low-order word if the destination is an accumulator (weird)
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2017-03-07 14:09:24 -08:00 |
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Jeff
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7e207db2a1
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Added PDP-10 JSP and JFCL operations (which seem to be the simplest means of getting and setting the processor flags)
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2017-03-07 13:44:43 -08:00 |
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Jeff
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0e18448423
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Added PDP-10 SUB and MUL operations
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2017-03-07 10:21:17 -08:00 |
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Jeff
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38a598d21e
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Added PDP-10 ADD operations
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2017-03-06 23:36:48 -08:00 |
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Jeff
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1b4129d7ad
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Added some ASHC tests
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2017-03-06 17:18:41 -08:00 |
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Jeff
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04ae721eb6
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Updated the extended logical operations (LSHC and ROTC) to treat the result as a 71-bit result, and ASHC to treat it as a 70-bit result
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2017-03-06 16:42:29 -08:00 |
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Jeff
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3d4795bbe4
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Updated the Int36 class with support for both signed 71-bit values (my original double-length format) and 70-bit values consisting of two signed 35-bit values (DEC's double-length format)
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2017-03-06 15:48:31 -08:00 |
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Jeff
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6b68525f24
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Fixed minor ASHC bug
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2017-03-05 16:19:25 -08:00 |
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Jeff
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e885a29788
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Whitespace
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2017-03-05 14:15:24 -08:00 |
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Jeff
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286a122b05
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Implemented (but have not yet tested) ASHC opcode for PDP-10
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2017-03-05 14:14:14 -08:00 |
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Jeff
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61e64bf3fc
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Sync'ed some of the constants used in the pdp10 and int36 modules
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2017-03-05 10:19:04 -08:00 |
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Jeff
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234e8871ba
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Added "lsh" and "rot" commands to the Int36 command-line tool to mimic the PDP-10 opcodes and test their logic
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2017-03-05 10:04:18 -08:00 |
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Jeff
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ffb7fa1221
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New improved PDP-10 processor flag handling
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2017-03-04 21:07:56 -08:00 |
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Jeff
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87e17a695c
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Fixed opIO() dispatch
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2017-03-04 16:52:44 -08:00 |
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Jeff
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1ac769431f
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Added initial logic for decoding PDP-10 input-output instructions
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2017-03-04 16:47:56 -08:00 |
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Jeff
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e04bec1af4
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Typo
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2017-03-04 14:46:26 -08:00 |
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Jeff
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5d48383363
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Added logic (untested) for ASH
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2017-03-04 14:43:21 -08:00 |
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Jeff
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20c24053b9
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Simplified ROT and ROTC, converting all right (negative) rotations into left (positive) rotations
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2017-03-04 11:22:57 -08:00 |
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Jeff
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88f66f9590
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Added ROT and ROTC (albeit untested)
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2017-03-03 21:09:45 -08:00 |
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Jeff
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a08c8c30bf
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Added LSH and LSHC (albeit untested)
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2017-03-03 17:44:27 -08:00 |
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Jeff
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b8a38c8ac6
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Finished PDP-10 logical operations
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2017-03-03 15:58:15 -08:00 |
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Jeff
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616f9d4cda
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Started work on PDP-10 logical operations
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2017-03-03 11:30:34 -08:00 |
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Jeff
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796a23ce6c
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Added some "special considerations" to PDP-10 byte pointer processing
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2017-03-03 09:01:49 -08:00 |
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Jeff
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25aa95cec8
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First cut at PDP-10 byte instructions
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2017-03-02 23:10:24 -08:00 |
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Jeff
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affaa1075c
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Finished the PDP-10 Move Magnitude opcodes, along with the Push Down and Pop Up opcodes (uncovering some SIMH weirdness along the way)
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2017-03-02 16:38:00 -08:00 |
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Jeff
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84f8cece67
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All PDP-10 MOVN (Move Negative) opcodes implemented
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2017-03-02 10:19:37 -08:00 |
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Jeff
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202374dd09
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Added the PDP-10's four arithmetic flags along with a negate() function -- the first of our functions that actually needs to set those flags
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2017-03-01 17:23:54 -08:00 |
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Jeff
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e870fd6eec
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Fixed the accumulator update logic in all the PDP-10 half-word self-mode instructions, and started work on EXCH, BLT, and MOVE instructions (the BLT is a real odd-ball, and SIMH does some very strange things with the accumulator used by BLT, which we do NOT attempt to replicate; the strangeness is most noticeable when the accumulator is part of the range being transferred)
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2017-03-01 16:00:48 -08:00 |
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Jeff
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3508b1050e
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Started work on v1.34.2: More PDP-10 opcode handlers
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2017-03-01 12:26:57 -08:00 |
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Jeff Parsons
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51274c1a30
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Make sure all machines support JSON-encoded resources with either 'longs' or 'data' arrays
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2017-02-28 16:20:49 -08:00 |
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