Commit graph pcjs/apps/pdp10
Author SHA1 Message Date
Jeff
d2bb577bfd Updated the PDP-10 debugger's loadBin() function 2017-03-14 17:44:37 -07:00
Jeff
4959108512 Multiple MACRO-10 source files can now be requested and assembled together; also, restored DAKAD.MAC to its original version and put my modified version in TEST.MAC 2017-03-14 17:18:02 -07:00
Jeff
3f8705ad98 Successfully assembled my first MACRO-10 source file (DAKAD.MAC) 2017-03-14 14:44:03 -07:00
Jeff
3e2b825bef Fixed MACRO-10 processing of literals (requires internal labels that don't conflict with MACRO-10 labels) 2017-03-13 17:02:26 -07:00
Jeff
2428a27b51 Added DAKAD.MAC test file 2017-03-13 16:07:48 -07:00
Jeff
b371f9d649 Updated PDP-10 READMEs 2017-03-10 15:53:52 -08:00
Jeff
210ec50cd3 Started work on MACRO-10 parsing 2017-03-10 15:42:12 -08:00
Jeff
52bd554cf1 Updated PDP-10 README files 2017-03-10 11:22:51 -08:00
Jeff
65eb821710 Well, apparently the PDP-10 MUL instruction really DOES store the high-order word first, and it only stores the low-order word if the destination is an accumulator (weird) 2017-03-07 14:09:24 -08:00
Jeff
7e207db2a1 Added PDP-10 JSP and JFCL operations (which seem to be the simplest means of getting and setting the processor flags) 2017-03-07 13:44:43 -08:00
Jeff
25aa95cec8 First cut at PDP-10 byte instructions 2017-03-02 23:10:24 -08:00
Jeff
affaa1075c Finished the PDP-10 Move Magnitude opcodes, along with the Push Down and Pop Up opcodes (uncovering some SIMH weirdness along the way) 2017-03-02 16:38:00 -08:00
Jeff
84f8cece67 All PDP-10 MOVN (Move Negative) opcodes implemented 2017-03-02 10:19:37 -08:00
Jeff
202374dd09 Added the PDP-10's four arithmetic flags along with a negate() function -- the first of our functions that actually needs to set those flags 2017-03-01 17:23:54 -08:00
Jeff
e870fd6eec Fixed the accumulator update logic in all the PDP-10 half-word self-mode instructions, and started work on EXCH, BLT, and MOVE instructions (the BLT is a real odd-ball, and SIMH does some very strange things with the accumulator used by BLT, which we do NOT attempt to replicate; the strangeness is most noticeable when the accumulator is part of the range being transferred) 2017-03-01 16:00:48 -08:00
Jeff Parsons
f0bfe81cc9 Added more half-word opcode tests 2017-02-28 15:46:47 -08:00
Jeff Parsons
8863f1127c Added rudimentary PDP-10 assembler capability to the built-in debugger 2017-02-27 18:06:08 -08:00
Jeff Parsons
17e807ecb6 Tested a couple half-word instructions (so far, so good) 2017-02-27 12:25:13 -08:00
Jeff Parsons
0255b7b891 Implemented all four primary half-word moves (HLL, HLR, HRL, HRR) but none of the flavors (Z, O, E); need to test the primary instructions first 2017-02-27 09:50:28 -08:00
Jeff Parsons
aecd943c52 Added support for PDP-10 RAM images 2017-02-26 20:37:16 -08:00