Jeff Parsons
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cafd7c493c
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Finished writing all the half-word move permutations, now it's time to test them all (ugh)
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2017-02-28 11:02:15 -08:00 |
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Jeff Parsons
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8863f1127c
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Added rudimentary PDP-10 assembler capability to the built-in debugger
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2017-02-27 18:06:08 -08:00 |
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Jeff Parsons
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17e807ecb6
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Tested a couple half-word instructions (so far, so good)
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2017-02-27 12:25:13 -08:00 |
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Jeff Parsons
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0255b7b891
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Implemented all four primary half-word moves (HLL, HLR, HRL, HRR) but none of the flavors (Z, O, E); need to test the primary instructions first
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2017-02-27 09:50:28 -08:00 |
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Jeff Parsons
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ed4c031035
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Implemented my first 4 PDP-10 opcodes (HLL, HLLI, HLLM, HLLS)
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2017-02-26 10:51:49 -08:00 |
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Jeff Parsons
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e3ab5b1ed5
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Added preliminary PDP-10 opcode decoding
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2017-02-26 09:13:16 -08:00 |
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Jeff Parsons
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3e30bde786
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Some PDP-10 disassembler clean-up
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2017-02-25 21:19:41 -08:00 |
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Jeff Parsons
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cb4d054ead
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Added preliminary first-order opcode dispatch table
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2017-02-25 16:21:21 -08:00 |
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Jeff Parsons
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10181fdc45
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Added I/O instructions to PDP-10 disassembler
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2017-02-25 10:45:25 -08:00 |
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Jeff Parsons
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3b27f45b76
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Added disassembly of basic PDP-10 operations
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2017-02-24 23:15:53 -08:00 |
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Jeff Parsons
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c0de732f76
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Changed toStrBase() to accept a number of bits rather than a number of bytes, because bytes aren't always 8 bits (see PDP-10)
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2017-02-24 10:58:56 -08:00 |
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Jeff Parsons
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8320f58d44
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Documentation updates to accommodate the PDP-10 work that's starting now
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2017-02-23 15:14:51 -08:00 |
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Jeff Parsons
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c25ad00c41
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Minimal infrastructure for instantiating a PDP-10 test machine
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2017-02-23 11:34:19 -08:00 |
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Jeff Parsons
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ba7de38fbf
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Created PDP-10 skeleton
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2017-02-19 15:22:58 -08:00 |
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