Jeff Parsons
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cafd7c493c
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Finished writing all the half-word move permutations, now it's time to test them all (ugh)
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2017-02-28 11:02:15 -08:00 |
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Jeff Parsons
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d7b8122a40
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All HLL and HRL permutations implemented now (up next: HRR and HLR)
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2017-02-28 10:24:29 -08:00 |
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Jeff Parsons
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17e807ecb6
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Tested a couple half-word instructions (so far, so good)
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2017-02-27 12:25:13 -08:00 |
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Jeff Parsons
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0255b7b891
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Implemented all four primary half-word moves (HLL, HLR, HRL, HRR) but none of the flavors (Z, O, E); need to test the primary instructions first
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2017-02-27 09:50:28 -08:00 |
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Jeff Parsons
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6cf141baf9
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getOpcode() can now handle infinite indirections without starving the emulator
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2017-02-26 12:17:21 -08:00 |
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Jeff Parsons
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ed4c031035
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Implemented my first 4 PDP-10 opcodes (HLL, HLLI, HLLM, HLLS)
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2017-02-26 10:51:49 -08:00 |
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Jeff Parsons
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0451774bc6
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Added preliminary PDP-10 opcode decoding
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2017-02-26 09:25:44 -08:00 |
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Jeff Parsons
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e3ab5b1ed5
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Added preliminary PDP-10 opcode decoding
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2017-02-26 09:13:16 -08:00 |
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Jeff Parsons
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3e30bde786
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Some PDP-10 disassembler clean-up
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2017-02-25 21:19:41 -08:00 |
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Jeff Parsons
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cb4d054ead
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Added preliminary first-order opcode dispatch table
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2017-02-25 16:21:21 -08:00 |
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Jeff Parsons
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b628219f5c
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Used the new PDP-10 disassembler in test mode to help generate the cpuops.js skeleton
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2017-02-25 13:28:47 -08:00 |
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