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2,136 commits 4 branches 83 tags 557 MiB
Commit graph pcjs/modules
Author SHA1 Message Date
Jeff
3d4795bbe4 Updated the Int36 class with support for both signed 71-bit values (my original double-length format) and 70-bit values consisting of two signed 35-bit values (DEC's double-length format) 2017-03-06 15:48:31 -08:00
Jeff
6b68525f24 Fixed minor ASHC bug 2017-03-05 16:19:25 -08:00
Jeff
e885a29788 Whitespace 2017-03-05 14:15:24 -08:00
Jeff
286a122b05 Implemented (but have not yet tested) ASHC opcode for PDP-10 2017-03-05 14:14:14 -08:00
Jeff
61e64bf3fc Sync'ed some of the constants used in the pdp10 and int36 modules 2017-03-05 10:19:04 -08:00
Jeff
234e8871ba Added "lsh" and "rot" commands to the Int36 command-line tool to mimic the PDP-10 opcodes and test their logic 2017-03-05 10:04:18 -08:00
Jeff
ffb7fa1221 New improved PDP-10 processor flag handling 2017-03-04 21:07:56 -08:00
Jeff
87e17a695c Fixed opIO() dispatch 2017-03-04 16:52:44 -08:00
Jeff
1ac769431f Added initial logic for decoding PDP-10 input-output instructions 2017-03-04 16:47:56 -08:00
Jeff
e04bec1af4 Typo 2017-03-04 14:46:26 -08:00
Jeff
5d48383363 Added logic (untested) for ASH 2017-03-04 14:43:21 -08:00
Jeff
20c24053b9 Simplified ROT and ROTC, converting all right (negative) rotations into left (positive) rotations 2017-03-04 11:22:57 -08:00
Jeff
88f66f9590 Added ROT and ROTC (albeit untested) 2017-03-03 21:09:45 -08:00
Jeff
a08c8c30bf Added LSH and LSHC (albeit untested) 2017-03-03 17:44:27 -08:00
Jeff
b8a38c8ac6 Finished PDP-10 logical operations 2017-03-03 15:58:15 -08:00
Jeff
616f9d4cda Started work on PDP-10 logical operations 2017-03-03 11:30:34 -08:00
Jeff
796a23ce6c Added some "special considerations" to PDP-10 byte pointer processing 2017-03-03 09:01:49 -08:00
Jeff
25aa95cec8 First cut at PDP-10 byte instructions 2017-03-02 23:10:24 -08:00
Jeff
affaa1075c Finished the PDP-10 Move Magnitude opcodes, along with the Push Down and Pop Up opcodes (uncovering some SIMH weirdness along the way) 2017-03-02 16:38:00 -08:00
Jeff
84f8cece67 All PDP-10 MOVN (Move Negative) opcodes implemented 2017-03-02 10:19:37 -08:00
Jeff
202374dd09 Added the PDP-10's four arithmetic flags along with a negate() function -- the first of our functions that actually needs to set those flags 2017-03-01 17:23:54 -08:00
Jeff
e870fd6eec Fixed the accumulator update logic in all the PDP-10 half-word self-mode instructions, and started work on EXCH, BLT, and MOVE instructions (the BLT is a real odd-ball, and SIMH does some very strange things with the accumulator used by BLT, which we do NOT attempt to replicate; the strangeness is most noticeable when the accumulator is part of the range being transferred) 2017-03-01 16:00:48 -08:00
Jeff
3508b1050e Started work on v1.34.2: More PDP-10 opcode handlers 2017-03-01 12:26:57 -08:00
Jeff Parsons
51274c1a30 Make sure all machines support JSON-encoded resources with either 'longs' or 'data' arrays 2017-02-28 16:20:49 -08:00
Jeff Parsons
cafd7c493c Finished writing all the half-word move permutations, now it's time to test them all (ugh) 2017-02-28 11:02:15 -08:00
Jeff Parsons
d7b8122a40 All HLL and HRL permutations implemented now (up next: HRR and HLR) 2017-02-28 10:24:29 -08:00
Jeff Parsons
a1dba6a679 Added support for assembling PDP-10 I/O instructions 2017-02-28 09:14:56 -08:00
Jeff Parsons
c4f7262e71 Cleaned up the integer base conversion code, and expanded the PDP-10 register dump 2017-02-27 19:18:19 -08:00
Jeff Parsons
caa5fd6c86 Tighten up disassembler output 2017-02-27 18:20:34 -08:00
Jeff Parsons
8863f1127c Added rudimentary PDP-10 assembler capability to the built-in debugger 2017-02-27 18:06:08 -08:00
Jeff Parsons
06324dd499 Minor PDP-10 debugger alignment change 2017-02-27 12:27:23 -08:00
Jeff Parsons
17e807ecb6 Tested a couple half-word instructions (so far, so good) 2017-02-27 12:25:13 -08:00
Jeff Parsons
0255b7b891 Implemented all four primary half-word moves (HLL, HLR, HRL, HRR) but none of the flavors (Z, O, E); need to test the primary instructions first 2017-02-27 09:50:28 -08:00
Jeff Parsons
aecd943c52 Added support for PDP-10 RAM images 2017-02-26 20:37:16 -08:00
Jeff Parsons
6cf141baf9 getOpcode() can now handle infinite indirections without starving the emulator 2017-02-26 12:17:21 -08:00
Jeff Parsons
ed4c031035 Implemented my first 4 PDP-10 opcodes (HLL, HLLI, HLLM, HLLS) 2017-02-26 10:51:49 -08:00
Jeff Parsons
0451774bc6 Added preliminary PDP-10 opcode decoding 2017-02-26 09:25:44 -08:00
Jeff Parsons
e3ab5b1ed5 Added preliminary PDP-10 opcode decoding 2017-02-26 09:13:16 -08:00
Jeff Parsons
3e30bde786 Some PDP-10 disassembler clean-up 2017-02-25 21:19:41 -08:00
Jeff Parsons
cb4d054ead Added preliminary first-order opcode dispatch table 2017-02-25 16:21:21 -08:00
Jeff Parsons
b628219f5c Used the new PDP-10 disassembler in test mode to help generate the cpuops.js skeleton 2017-02-25 13:28:47 -08:00
Jeff Parsons
10181fdc45 Added I/O instructions to PDP-10 disassembler 2017-02-25 10:45:25 -08:00
Jeff Parsons
3b27f45b76 Added disassembly of basic PDP-10 operations 2017-02-24 23:15:53 -08:00
Jeff Parsons
da3bb4740c Fixed PDP-10 test panel updates 2017-02-24 13:09:46 -08:00
Jeff Parsons
ef70ed74b3 Added support for parsing of values (ie, integers) greater than 32 bits, and fixed PDP-10 Bus writes (parameter order differs from other emulators) 2017-02-24 13:07:38 -08:00
Jeff Parsons
c0de732f76 Changed toStrBase() to accept a number of bits rather than a number of bytes, because bytes aren't always 8 bits (see PDP-10) 2017-02-24 10:58:56 -08:00
Jeff Parsons
884b74d96f Cleaned up PDP register dump code 2017-02-23 16:56:08 -08:00
Jeff Parsons
8320f58d44 Documentation updates to accommodate the PDP-10 work that's starting now 2017-02-23 15:14:51 -08:00
Jeff Parsons
c25ad00c41 Minimal infrastructure for instantiating a PDP-10 test machine 2017-02-23 11:34:19 -08:00
Jeff
0aa88da301 Updated information on PDP timings 2017-02-23 09:02:48 -08:00