Jeff Parsons
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35f931f492
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Fixed stepCPU() so that, if a Debugger is present, it always calls checkInstruction() on at least the first instruction of a run, so that Debugger features like skipping over an initial HALT opcode works properly
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2016-10-21 23:24:27 -07:00 |
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Jeff Parsons
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5808778351
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Added getTrapStatus() so that the Debugger can display trap information whenever a trap has just occurred, updated FileDump to store 'load' and 'exec' properties in MACRO-11 listing dumps (so that the individual machine files don't have to specify hard-coded 'load' and 'exec' values themselves), and added a new SerialPort parameter (upperCase) that can be used to force all received data to upper-case
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2016-10-21 21:07:26 -07:00 |
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Jeff Parsons
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3db1439b40
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Improved Debugger focus handling, added a new zeroMemory() Bus interface, and updated the RAM component's reset() function to re-zero RAM and then restore any predefined contents
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2016-10-21 12:15:02 -07:00 |
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Jeff Parsons
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aa2a25c5ec
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Minor Debugger improvements, notes, etc, while debugging the PDP-11 BASIC
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2016-10-20 22:56:29 -07:00 |
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Jeff Parsons
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13a1dedbc7
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Supoprt for tape images in the Absolute Loader format has been moved to the RAM component, so that those images can be preloaded into RAM in the same way that raw bootstrap images can; the RAM component now provides Absolute Loader image parsing as a service to other components that need it (specifically, the PC11 tape reader)
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2016-10-19 11:10:38 -07:00 |
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Jeff Parsons
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6683c81299
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Created dedicated getOpcode() function, replaced getPCWord()
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2016-10-18 10:50:05 -07:00 |
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Jeff Parsons
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980c2ac5ab
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Updated PC8080 and PDPjs to support RAM images, eliminating the need for the old "writable ROM" kludge; RAM images can include their own load and exec addresses as part of the JSON file, but the RAM component can provide explicit overrides (if no load address is specified either way, the default load address is the starting RAM address)
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2016-10-17 11:01:32 -07:00 |
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Jeff Parsons
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2ce661e141
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Refer to all 11/45+ instructions as 11/45, rather than 11/70, since the 11/70 doesn't appear to have added any instructions to the 11/45's set
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2016-10-15 13:34:02 -07:00 |
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Jeff Parsons
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3a7b769fa3
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Added support to FileDump for generating binary dumps from MACRO11 listing (.lst) files, since I wasn't having much success with dumpobj or obj2hex.pl; note that this assumes a listing file produced by the macro11 cross-assembler written by Richard Krehbiel in 2001, updated in 2009, and maintained here: https://github.com/shattered/macro11. There are other versions of macro11 floating around, like the one in the simtools project that accompanies simh, and the one built for the Windows-based PDP11GUI app.
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2016-10-15 11:05:38 -07:00 |
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Jeff Parsons
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b1f8fca2d9
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Re-enabled source maps, at least for the PDP-11 emulators (for now)
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2016-10-14 09:30:17 -07:00 |
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Jeff Parsons
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854b40c419
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Cleaned up PDP-11/70 configs
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2016-10-13 16:35:10 -07:00 |
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Jeff Parsons
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2a1be67727
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In the spirit of the PCx86 Debugger, the PDP11 Debugger can now distinguish between virtual and physical addresses; physical addresses are specified with a leading '%'; this necessitated special CPU memory interfaces that mirror the Bus memory interfaces, which perform mapVirtualToPhysical() as needed, with traps disabled.
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2016-10-13 13:11:11 -07:00 |
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Jeff Parsons
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686396d726
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Switched interrupt management to a new set of Trigger functions and static Trigger objects, eliminating the old InterruptQueue of constantly created/destroyed InterruptEvents
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2016-10-13 10:20:11 -07:00 |
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Jeff Parsons
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58d358b51e
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Switching to new interrupt triggers
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2016-10-12 16:40:47 -07:00 |
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Jeff Parsons
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47767416a1
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Added preliminary LED support
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2016-10-11 10:20:39 -07:00 |
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Jeff Parsons
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05626a33cb
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Version number update
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2016-10-10 18:19:17 -07:00 |
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Jeff Parsons
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6514836098
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Cleaned up how memory and IOPAGE traps are triggered, how ODD byte-level IOPAGE accesses are handled, and how memory is dumped by the Debugger
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2016-10-10 17:09:29 -07:00 |
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Jeff Parsons
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ae4fbeb489
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Improved IOPAGE management
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2016-10-08 11:09:14 -07:00 |
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Jeff Parsons
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0ee3a091b4
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More device refactoring
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2016-10-07 17:37:13 -07:00 |
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Jeff Parsons
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cd8b6464a3
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Added more MMU handlers
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2016-10-07 10:58:15 -07:00 |
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Jeff Parsons
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c69ebb7bcb
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Factored out mapVirtualToPhysical() calls when MMU not enabled, and fixed HALT (it actually halts the CPU now)
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2016-10-07 09:49:02 -07:00 |
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Jeff
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e24d507aa2
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Removed useless version numbers and dates from .js file headers
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2016-10-06 16:22:24 -07:00 |
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Jeff
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1a1614a648
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Simplify the Bus and Memory interfaces slightly, by enabling WORDBUS, which treats all word accesses as aligned; the CPU is has sole responsibility for detecting unaligned word addresses and trapping appropriatelu
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2016-10-06 14:17:29 -07:00 |
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Jeff
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4e8d4e95d8
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Picked up fixes from the gh-pages rollout
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2016-10-06 10:09:41 -07:00 |
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Jeff
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086ef51588
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Cleaned up the SerialPort (formerly tty) logic a bit
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2016-10-05 12:41:14 -07:00 |
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Jeff
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795d57839b
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Cleaned up the decoding SRCMODE and DSTMODE operands, should be less confusing now
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2016-10-04 17:22:25 -07:00 |
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Jeff
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8a78eb7d6b
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No more MAX_ADDRESS hacks for "fake" register addresses
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2016-10-03 17:14:05 -07:00 |
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Jeff
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a254abc7dc
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SRC operands must be fetched before DST operands
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2016-10-03 16:50:39 -07:00 |
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Jeff
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2a065f4efc
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First stab at PDP-11 cycle times (11/70 to be precise) is more or less complete now
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2016-10-03 14:27:14 -07:00 |
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Jeff
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0b78b2885e
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Fixed MOV cycle calculation
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2016-09-30 15:43:00 -07:00 |
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Jeff
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0e0dcb29ec
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Added some PDP-11 opcodes I missed (JMP and SWAB)
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2016-09-30 15:27:53 -07:00 |
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Jeff
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af6b66d2a3
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Laying the groundwork for an attempt at PDP-11 cycle counting (it won't be exact, but it should be close)
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2016-09-30 12:00:07 -07:00 |
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Jeff
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a731313215
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Updated default PDP-11 speed
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2016-09-29 22:43:55 -07:00 |
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Jeff
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98d3700fa4
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Cleaned up OPFLAG handling
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2016-09-29 14:02:37 -07:00 |
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Jeff
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b3ba03d0a5
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Got rid of runState, implemented a solution for WAIT
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2016-09-29 11:04:33 -07:00 |
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Jeff
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44a2ec9f03
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Fixed Debugger memory editing and register handling, tidied up some flag operations, and removed more now-unnecessary address checks in cpustate
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2016-09-29 09:11:25 -07:00 |
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Jeff
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c7dbfc02be
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Fixed CPU start/stop control; runCPU is now strictly a worker function, not a control interface (PDP-11 only; other CPUs still need to be updated to match)
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2016-09-28 22:21:52 -07:00 |
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Jeff
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c858fd0699
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Codify reasons for assorted traps
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2016-09-28 15:35:22 -07:00 |
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Jeff
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0ad98dc68b
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All PDP-11 opcode decoders implemented now
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2016-09-28 13:45:36 -07:00 |
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Jeff
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ed189527d0
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Optimized branch()
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2016-09-27 21:51:24 -07:00 |
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Jeff
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b2c66b5374
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Implemented more opcode decoders
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2016-09-27 16:21:55 -07:00 |
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Jeff
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eb5aaa5d66
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Strip leading zeros from selected debugger constants (typically immediate values)
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2016-09-27 12:53:36 -07:00 |
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Jeff
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15fe831fc7
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Sanpshot the bootcode used for initial PDP-11 testing
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2016-09-27 11:40:47 -07:00 |
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Jeff
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e322c5f912
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Implemented INC/DEC opcodes
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2016-09-27 09:28:52 -07:00 |
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Jeff
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3497466113
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Cleaned up interrupt handling, register initialization, MMU initialization, etc
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2016-09-26 16:53:37 -07:00 |
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Jeff
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4b4098a5c9
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Cleaned up ACCESS defines
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2016-09-26 11:57:21 -07:00 |
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Jeff
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6af956b8f0
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Implemented branches and RTS
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2016-09-26 11:27:32 -07:00 |
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Jeff
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5b25dc91ae
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Let's stop on any un(re)implemented opcode for now
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2016-09-26 10:02:21 -07:00 |
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Jeff
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1ec60573d5
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Implemented opJSR, removed more "negative address" tests (eg, in pushWord); bad addresses should result in special exceptions, not negative return values
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2016-09-26 09:43:05 -07:00 |
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Jeff
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a4613082f8
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Converted all "short" references to "word", since word meant 16-bit in the PDP-11 world, and no one said short back then
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2016-09-26 08:53:35 -07:00 |
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