Author	SHA1	Message	Date
Jeff	90ae3f1db8	Fixed the signed 8-bit calculation of all PDP-10 shift/rotate counts; diagnostic DAKAJ now passes	2017-03-30 17:31:13 -07:00
Jeff	d0ff759684	Added MACRO-10 support for OPDEFs, which are macro-like statements used to generate words which can also be combined with addressing modifiers	2017-03-29 10:12:45 -07:00
Jeff	f8bf346eab	Renamed flags to be more consistent with DEC's names, and updated JSR and JSP to clear the BIS flag	2017-03-28 16:27:18 -07:00
Jeff	9c96ec14ad	Started executing basic PDP-10 instruction diagnostic #1	2017-03-17 00:01:49 -07:00
Jeff	3a9cd5cf04	Code cleanup	2017-03-09 17:49:54 -08:00
Jeff	0dc6b7276b	Added lots of PDP-10 compare/increment/decrement/skip/jump instructions	2017-03-09 12:30:51 -08:00
Jeff	7e207db2a1	Added PDP-10 JSP and JFCL operations (which seem to be the simplest means of getting and setting the processor flags)	2017-03-07 13:44:43 -08:00
Jeff	38a598d21e	Added PDP-10 ADD operations	2017-03-06 23:36:48 -08:00
Jeff	e885a29788	Whitespace	2017-03-05 14:15:24 -08:00
Jeff	286a122b05	Implemented (but have not yet tested) ASHC opcode for PDP-10	2017-03-05 14:14:14 -08:00
Jeff	61e64bf3fc	Sync'ed some of the constants used in the pdp10 and int36 modules	2017-03-05 10:19:04 -08:00
Jeff	234e8871ba	Added "lsh" and "rot" commands to the Int36 command-line tool to mimic the PDP-10 opcodes and test their logic	2017-03-05 10:04:18 -08:00
Jeff	ffb7fa1221	New improved PDP-10 processor flag handling	2017-03-04 21:07:56 -08:00
Jeff	1ac769431f	Added initial logic for decoding PDP-10 input-output instructions	2017-03-04 16:47:56 -08:00
Jeff	5d48383363	Added logic (untested) for ASH	2017-03-04 14:43:21 -08:00
Jeff	616f9d4cda	Started work on PDP-10 logical operations	2017-03-03 11:30:34 -08:00
Jeff	25aa95cec8	First cut at PDP-10 byte instructions	2017-03-02 23:10:24 -08:00
Jeff	affaa1075c	Finished the PDP-10 Move Magnitude opcodes, along with the Push Down and Pop Up opcodes (uncovering some SIMH weirdness along the way)	2017-03-02 16:38:00 -08:00
Jeff	202374dd09	Added the PDP-10's four arithmetic flags along with a negate() function -- the first of our functions that actually needs to set those flags	2017-03-01 17:23:54 -08:00
Jeff Parsons	cafd7c493c	Finished writing all the half-word move permutations, now it's time to test them all (ugh)	2017-02-28 11:02:15 -08:00
Jeff Parsons	8863f1127c	Added rudimentary PDP-10 assembler capability to the built-in debugger	2017-02-27 18:06:08 -08:00
Jeff Parsons	17e807ecb6	Tested a couple half-word instructions (so far, so good)	2017-02-27 12:25:13 -08:00
Jeff Parsons	0255b7b891	Implemented all four primary half-word moves (HLL, HLR, HRL, HRR) but none of the flavors (Z, O, E); need to test the primary instructions first	2017-02-27 09:50:28 -08:00
Jeff Parsons	ed4c031035	Implemented my first 4 PDP-10 opcodes (HLL, HLLI, HLLM, HLLS)	2017-02-26 10:51:49 -08:00
Jeff Parsons	e3ab5b1ed5	Added preliminary PDP-10 opcode decoding	2017-02-26 09:13:16 -08:00
Jeff Parsons	3e30bde786	Some PDP-10 disassembler clean-up	2017-02-25 21:19:41 -08:00
Jeff Parsons	cb4d054ead	Added preliminary first-order opcode dispatch table	2017-02-25 16:21:21 -08:00
Jeff Parsons	10181fdc45	Added I/O instructions to PDP-10 disassembler	2017-02-25 10:45:25 -08:00
Jeff Parsons	3b27f45b76	Added disassembly of basic PDP-10 operations	2017-02-24 23:15:53 -08:00
Jeff Parsons	c0de732f76	Changed toStrBase() to accept a number of bits rather than a number of bytes, because bytes aren't always 8 bits (see PDP-10)	2017-02-24 10:58:56 -08:00
Jeff Parsons	8320f58d44	Documentation updates to accommodate the PDP-10 work that's starting now	2017-02-23 15:14:51 -08:00
Jeff Parsons	c25ad00c41	Minimal infrastructure for instantiating a PDP-10 test machine	2017-02-23 11:34:19 -08:00
Jeff Parsons	ba7de38fbf	Created PDP-10 skeleton	2017-02-19 15:22:58 -08:00