Jeff
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1b5ff37f8a
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Updated MACRO-10 diagnostic README files
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2017-04-05 21:11:10 -07:00 |
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Jeff
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70e7cef651
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Updated the MACRO-10 nested macro test page
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2017-04-05 20:44:12 -07:00 |
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Jeff
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ea95de4939
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Fixed (or rather, band-aided) a MACRO-10 regression assembling the nested macro test (/apps/pdp10/tests/macro10/TEST.MAC)
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2017-04-05 20:42:44 -07:00 |
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Jeff
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2a8c2a74d2
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Fixed a couple of PDP-10 opcode emulation bugs (AOBJN, AOBJP, and CMP), and rounded out the set of DEC's basic instruction diagnostics
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2017-03-27 11:44:42 -07:00 |
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Jeff
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dd24f4bb61
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Added some PDP-10/MACRO-10 blog updates
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2017-03-24 16:23:27 -07:00 |
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Jeff
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eed6e990e3
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Cleaned up the MACRO-10 assembly demos
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2017-03-24 14:11:28 -07:00 |
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Jeff
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1b0e01c66a
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Improved MACRO-10 addWord() parsing
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2017-03-24 13:44:34 -07:00 |
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Jeff
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471a93353e
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Fixed MACRO-10 literal processing (literals need to be evaluated as early as possible, but not allocated until the end is reached)
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2017-03-24 00:09:30 -07:00 |
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Jeff
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5fa958dfea
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Minor re-org of PDP-10 tests
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2017-03-20 17:25:06 -07:00 |
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Jeff
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0c88f362e2
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Updated the page on the MACRO-10 macro recursion test
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2017-03-19 22:46:28 -07:00 |
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Jeff
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4cce2177f4
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The recursive MACRO-10 test case (MACTEST1.MAC) found in the June 1972 MACRO-10 manual passes now
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2017-03-19 14:03:49 -07:00 |
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Jeff
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fb83d1e503
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More MACRO-10 parsing improvements
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2017-03-19 12:03:45 -07:00 |
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Jeff
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3da33e3668
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Added support for IRP, IRPC and IFN MACRO-10 pseudo-ops
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2017-03-19 00:16:00 -07:00 |
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Jeff
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1c3c9c9856
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Added various MACRO-10 expression improvements
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2017-03-18 17:12:54 -07:00 |
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Jeff
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65eb821710
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Well, apparently the PDP-10 MUL instruction really DOES store the high-order word first, and it only stores the low-order word if the destination is an accumulator (weird)
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2017-03-07 14:09:24 -08:00 |
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Jeff
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7e207db2a1
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Added PDP-10 JSP and JFCL operations (which seem to be the simplest means of getting and setting the processor flags)
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2017-03-07 13:44:43 -08:00 |
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Jeff
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25aa95cec8
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First cut at PDP-10 byte instructions
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2017-03-02 23:10:24 -08:00 |
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Jeff
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affaa1075c
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Finished the PDP-10 Move Magnitude opcodes, along with the Push Down and Pop Up opcodes (uncovering some SIMH weirdness along the way)
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2017-03-02 16:38:00 -08:00 |
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Jeff
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84f8cece67
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All PDP-10 MOVN (Move Negative) opcodes implemented
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2017-03-02 10:19:37 -08:00 |
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Jeff
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202374dd09
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Added the PDP-10's four arithmetic flags along with a negate() function -- the first of our functions that actually needs to set those flags
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2017-03-01 17:23:54 -08:00 |
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Jeff
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e870fd6eec
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Fixed the accumulator update logic in all the PDP-10 half-word self-mode instructions, and started work on EXCH, BLT, and MOVE instructions (the BLT is a real odd-ball, and SIMH does some very strange things with the accumulator used by BLT, which we do NOT attempt to replicate; the strangeness is most noticeable when the accumulator is part of the range being transferred)
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2017-03-01 16:00:48 -08:00 |
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Jeff Parsons
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f0bfe81cc9
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Added more half-word opcode tests
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2017-02-28 15:46:47 -08:00 |
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Jeff Parsons
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8863f1127c
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Added rudimentary PDP-10 assembler capability to the built-in debugger
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2017-02-27 18:06:08 -08:00 |
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Jeff Parsons
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17e807ecb6
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Tested a couple half-word instructions (so far, so good)
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2017-02-27 12:25:13 -08:00 |
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Jeff Parsons
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0255b7b891
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Implemented all four primary half-word moves (HLL, HLR, HRL, HRR) but none of the flavors (Z, O, E); need to test the primary instructions first
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2017-02-27 09:50:28 -08:00 |
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Jeff Parsons
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aecd943c52
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Added support for PDP-10 RAM images
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2017-02-26 20:37:16 -08:00 |
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