Support for VT100 dot stretching
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7 changed files with 4890 additions and 4701 deletions
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@ -100,6 +100,12 @@ function ChipSet(parmsChipSet)
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Component.subclass(ChipSet);
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/*
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* NOTE: The STATUS1 port could have been handled entirely by the Keyboard component, but it was just as easy
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* to create a simple ChipSet interface, updateStatus1(), that the Keyboard calls whenever it wants to simulate a
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* button press or release. It's a six-of-one, half-a-dozen-of-another choice, since technically, Space Invaders
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* doesn't have a keyboard.
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*/
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ChipSet.SI1978 = {
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MODEL: 1978.1,
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STATUS0: { // NOTE: STATUS0 not used by the SI1978 ROMs; refer to STATUS1 instead
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@ -168,8 +174,33 @@ ChipSet.SI1978 = {
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*
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* <cpu id="cpu8080" model="8080" cycles="2764800"/>
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*
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* where 2764800 = 24883200 / 9. Beyond that, we don't really care about that particular 8224. I only mention it
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* because knowing the CPU frequency is helpful for simulating some of the other circuits below that we DO care about.
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* where 2764800 = 24883200 / 9. You need to know this because we rely on the CPU frequency for simulating some
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* of the other VT100 circuits.
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*
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* For reference, here is a list of all the VT100 I/O ports, from /devices/pc8080/machine/vt100/debugger/README.md,
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* which in turn comes from p. 4-17 of the VT100 Technical Manual (July 1982):
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*
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* READ OR WRITE
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* 00H PUSART data bus
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* 01H PUSART command port
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*
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* WRITE ONLY (Decoded with I/O WR L)
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* 02H Baud rate generator
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* 42H Brightness D/A latch
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* 62H NVR latch
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* 82H Keyboard UART data input [used to update the Keyboard Status Byte -JP]
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* A2H Video processor DC012
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* C2H Video processor DC011
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* E2H Graphics port
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*
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* READ ONLY (Decoded with I/O RD L)
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* 22H Modem buffer
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* 42H Flags buffer
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* 82H Keyboard UART data output
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*
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* Most of these are handled by the ChipSet component, since it exists as sort of a "catch-all" component,
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* but some are more appropriately handled by other components; eg, port 0x82 is handled by the Keyboard component,
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* so it's defined there instead of here.
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*/
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ChipSet.VT100 = {
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MODEL: 100.0,
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@ -202,13 +233,65 @@ ChipSet.VT100 = {
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STANDBY: 0x7
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},
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WORDMASK: 0x3fff // NVR words are 14-bit
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/*
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* The Technical Manual, p. 4-18, also notes that "Early VT100s can disable the receiver interrupt by
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* programming D4 in the NVR latch. However, this is never used by the VT100."
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*/
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},
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/*
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* DC012 is referred to as a Control Chip.
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*
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* As p. 4-67 (117) of the VT100 Technical Manual (July 1982) explains:
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*
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* The DCO12 performs three main functions.
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*
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* 1. Scan count generation. This involves two counters, a multiplexer to switch between the counters,
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* double-height logic, scroll and line attribute latches, and various logic controlling switching between
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* the two counters. This is the biggest part of the chip. It includes all scrolling, double-height logic,
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* and feeds into the underline and hold request circuits.
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*
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* 2. Generation of HOLD REQUEST. This uses information from the scan counters and the scrolling logic to
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* decide when to generate HOLD REQUEST.
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*
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* 3. Video modifications: dot stretching, blanking, addition of attributes to video outputs, and multiple
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* intensity levels.
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*
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* The input decoder accepts a 4-bit command from the microprocessor when VID WR 2 L is asserted. Table 4-6-2
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* lists the commands.
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*
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* D3 D2 D1 D0 Function
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* -- -- -- -- --------
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* 0 0 0 0 Load low order scroll latch = 00
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* 0 0 0 1 Load low order scroll latch = 01
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* 0 0 1 0 Load low order scroll latch = 10
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* 0 0 1 1 Load low order scroll latch = 11
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*
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* 0 1 0 0 Load high order scroll latch = 00
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* 0 1 0 1 Load high order scroll latch = 01
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* 0 1 1 0 Load high order scroll latch = 10
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* 0 1 1 1 Load high order scroll latch = 11 (not used)
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*
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* 1 0 0 0 Toggle blink flip-flop
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* 1 0 0 1 Clear vertical frequency interrupt
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*
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* 1 0 1 0 Set reverse field on
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* 1 0 1 1 Set reverse field off
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*
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* 1 1 0 0 Set basic attribute to underline*
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* 1 1 0 1 Set basic attribute to reverse video*
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* 1 1 1 0 Reserved for future specification*
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* 1 1 1 1 Reserved for future specification*
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*
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* *These functions also clear blink flip-flop.
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*/
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DC012: { // generates scan counts for the Video Processor
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PORT: 0xA2, // write-only
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INIT: 0x00 // for lack of a better guess
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},
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/*
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* As p. 4-55 (105) of the July 1982 Technical Manual explains:
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* DC011 is referred to as a Timing Chip.
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*
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* As p. 4-55 (105) of the VT100 Technical Manual (July 1982) explains:
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*
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* The DCO11 is a custom designed bipolar circuit that provides most of the timing signals required by the
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* video processor. Internal counters divide the output of a 24.0734 MHz oscillator (located elsewhere on the
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