Fixed XXDP disk boot (haven't tried any tests yet, but it's still good progress)

devices/pdp11/machine/1170/panel/debugger/machine.xml

@@ -9,7 +9,7 @@
 	<device id="default" type="default"/>
 	<serial id="dl11" adapter="0" binding="print" upperCase="true"/>
 	<panel ref="/devices/pdp11/panel/1170/debugger/front.xml"/>
-	<debugger id="debugger" base="8" messages="fault|disk" commands=""/>
+	<debugger id="debugger" base="8" messages="" commands=""/>
 	<device ref="/devices/pdp11/pc11/default.xml"/>
 	<device ref="/devices/pdp11/rl11/default.xml"/>
 </machine>

devices/pdp11/rl11/default.xml

@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<device id="rl11" type="rl11" autoMount='{RL0:{path:"http://archive.pcjs.org/disks/dec/rl02k/RL02K-XXDP.json"}}' pos="left" width="35%" padLeft="8px" padBottom="8px">
+<device id="rl11" type="rl11" autoMountExample='{RL3:{path:"http://archive.pcjs.org/disks/dec/rl02k/RL02K-XXDP.json"}}' pos="left" width="35%" padLeft="8px" padBottom="8px">
 	<name>Disk Drive Controls</name>
 	<control type="container">
 		<control type="list" binding="listDrives"/>

devices/pdp11/rom/M9312/README.md

@@ -23,7 +23,7 @@ some of which we have reproduced here.
 
 Initially, all we had was this [256-word ROM](M9312.json) obtained from Paul Nankervis' [website](http://skn.noip.me/pdp11/iopage.js).
 Cross-referencing that ROM with Don North's [M9312 PROM Files](http://www.ak6dn.com/PDP-11/M9312/) revealed that it came from
-DEC P/N [23-616F1](23-616F1.txt): "11/60,70 Diagnostic/Console", albeit with some unexpected changes:
+DEC P/N [23-616F1](23-616F1.txt), "11/60,70 Diagnostic/Console", albeit with a few modifications:
 
 	165322  022716  165320  L26:    cmp #N2,(sp)        ; 165320 changed to 000320
 	...
@@ -38,7 +38,7 @@ DEC P/N [23-616F1](23-616F1.txt): "11/60,70 Diagnostic/Console", albeit with som
 	...
 	165406  012737  165714  000114  mov #N12,@#114      ; 165714 changed to 000714
 
-The unmodified [23-616F1](23-616F1.json) ROM can be seen at address 165000 when configured in a
+The unmodified [23-616F1](23-616F1.json) ROM is loaded at address 165000 (0xEA00) in this
-[PDP-11/70](/devices/pdp11/machine/1170/panel/debugger/) as:
+[PDP-11/70](/devices/pdp11/machine/1170/panel/debugger/), using the following configuration:
 
 	<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>

modules/pdp11/lib/bus.js

@@ -676,7 +676,7 @@ BusPDP11.prototype.addMemory = function(addr, size, type, controller)
     }
 
     if (sizeLeft <= 0) {
-        if (type == MemoryPDP11.TYPE.RAM && !this.cbRAM) {
+        if (type == MemoryPDP11.TYPE.RAM) {
             this.cbRAM += size;
         }
         this.status((size >> 10) + "Kb " + MemoryPDP11.TYPE_NAMES[type] + " at " + str.toOct(addr));

modules/pdp11/lib/cpuops.js

@@ -884,7 +884,7 @@ PDP11.opCLR = function(opCode)
  */
 PDP11.opCLRB = function(opCode)
 {
-    this.updateAllFlags(this.writeDstByte(opCode, 0));
+    this.updateAllFlags(this.writeDstByte(opCode, 0, PDP11.WRITE.BYTE));
     this.nStepCycles -= (this.dstMode? (8 + 1) : (2 + 1) + (this.dstReg == 7? 2 : 0));
 };
 
@@ -1269,6 +1269,31 @@ PDP11.opMFPI = function(opCode)
     this.nStepCycles -= (10 + 1);
 };
 
+/**
+ * opMFPT(opCode)
+ *
+ *      000007  MFPT - Move From Processor Type
+ *
+ *      Loads R0 with a value indicating the processor type.
+ *
+ *      R0  Hardware
+ *       1  PDP-11/44
+ *       3  PDP-11/24 (should be 2)
+ *       3  PDP-11/23
+ *       4  SBC-11/21
+ *       5  All J11 chips including 11/73, 11/83, 11/93
+ *
+ * @this {CPUStatePDP11}
+ * @param {number} opCode
+ */
+PDP11.opMFPT = function(opCode)
+{
+    /*
+     * TODO: Review
+     */
+    this.trap(PDP11.TRAP.RESERVED, PDP11.REASON.RESERVED);
+};
+
 PDP11.MOV_CYCLES = [
     2 + 1, 8 + 1, 8 + 1, 11 + 2, 9 + 1, 12 + 2, 10 + 2, 13 + 3,
     3 + 1, 8 + 1, 8 + 1, 11 + 2, 9 + 1, 12 + 2, 11 + 2, 14 + 3
@@ -1301,7 +1326,7 @@ PDP11.opMOV = function(opCode)
 PDP11.opMOVB = function(opCode)
 {
     var data = this.readSrcByte(opCode);
-    this.updateNZVFlags(this.writeDstByte(opCode, data, PDP11.WRITE.SIGNEXT) << 8);
+    this.updateNZVFlags(this.writeDstByte(opCode, data, PDP11.WRITE.SBYTE) << 8);
     this.nStepCycles -= (this.dstMode? (8 + 1) + (this.srcReg && this.dstReg >= 6? 1 : 0) : (this.srcMode? (3 + 2) : (2 + 1)) + (this.dstReg == 7? 2 : 0));
 };
 
@@ -2270,7 +2295,7 @@ PDP11.aOp000X_1145 = [
     PDP11.opIOT,                // 0x0004   000004          11/20+  9.3
     PDP11.opRESET,              // 0x0005   000005          11/20+  20ms
     PDP11.opRTT,                // 0x0006   000006          11/45+
-    PDP11.opUndefined,          // 0x0007
+    PDP11.opMFPT,               // 0x0007   000007          TBD
     PDP11.opUndefined,          // 0x0008
     PDP11.opUndefined,          // 0x0009
     PDP11.opUndefined,          // 0x000A

modules/pdp11/lib/cpustate.js

@@ -2042,20 +2042,26 @@ CPUStatePDP11.prototype.updateDstWord = function(opCode, src, fnOp)
  * @this {CPUStatePDP11}
  * @param {number} opCode
  * @param {number} data
- * @param {number} [writeFlags]
+ * @param {number} writeFlags (WRITE.BYTE aka 0xff, or WRITE.SBYTE aka 0xffff)
  * @return {number}
  */
 CPUStatePDP11.prototype.writeDstByte = function(opCode, data, writeFlags)
 {
+    this.assert(writeFlags);
     var reg = this.dstReg = opCode & PDP11.OPREG.MASK;
     var mode = this.dstMode = (opCode & PDP11.OPMODE.MASK) >> PDP11.OPMODE.SHIFT;
     if (!mode) {
         if (!data) {
-            this.regsGen[reg] &= ~0xff; // TODO: Profile to determine if this is a win
+            /*
-        } else if (writeFlags & PDP11.WRITE.SIGNEXT) {
+             * Potentially worthless optimization (but it looks good on "paper").
-            this.regsGen[reg] = ((data << 24) >> 24) & 0xffff;
+             */
+            this.regsGen[reg] &= ~writeFlags;
         } else {
-            this.regsGen[reg] = (this.regsGen[reg] & ~0xff) | (data & 0xff);
+            /*
+             * Potentially worthwhile optimization: skipping the sign-extending data shifts
+             * if writeFlags is WRITE.BYTE (but that requires an extra test and separate code paths).
+             */
+            this.regsGen[reg] = (this.regsGen[reg] & ~writeFlags) | (((data << 24) >> 24) & writeFlags);
         }
     } else {
         this.writeByteToPhysical(this.getAddr(mode, reg, PDP11.ACCESS.WRITE_BYTE), data);

modules/pdp11/lib/defines.js

@@ -296,11 +296,13 @@ var PDP11 = {
         DSPACE:     0x10000     // getVirtualByMode() sets bit 17 in any 16-bit virtual address that refers to D space (as opposed to I space)
     },
     /*
-     * Internal flags passed to writeByteByMode(), etc.
+     * Internal flags passed to writeDstByte()
+     *
+     * The BYTE and SBYTE values have been chosen so that they can be used directly as masks.
      */
     WRITE: {
-        NORMAL:     0x0,        // write byte or word normally
+        BYTE:       0xff,        // write byte normally
-        SIGNEXT:    0x1         // sign-extend a byte to a word
+        SBYTE:      0xffff       // sign-extend byte to word
     },
     CPUERR: {
         RED:        0x0004,     // red zone stack limit

modules/pdp11/lib/device.js

@@ -872,6 +872,11 @@ DevicePDP11.prototype.writeCTRL = function(data, addr)
  */
 DevicePDP11.prototype.readSIZE = function(addr)
 {
+    /*
+     * TODO: getMemorySize() returns an aggregate total, so if there are multiple discontiguous
+     * chunks of RAM, this could return the wrong result; another interface, getHighestAddress(),
+     * might be required.
+     */
     return addr == PDP11.UNIBUS.LSIZE? ((this.bus.getMemorySize(MemoryPDP11.TYPE.RAM) >> 6) - 1) : 0;
 };
 

modules/pdp11/lib/rl11.js

@@ -939,7 +939,7 @@ RL11.prototype.processCommand = function()
     case PDP11.RL11.FUNC.WDATA:
         if (!fnReadWrite) fnReadWrite = this.writeData;
         iCylinder = this.dar >> PDP11.RL11.RLDA.SHIFT.RW_CA;
-        iHead = (this.dar & PDP11.RL11.RLDA.RW_HS)? 0 : 1;
+        iHead = (this.dar & PDP11.RL11.RLDA.RW_HS)? 1 : 0;
         iSector = this.dar & PDP11.RL11.RLDA.RW_SA;
         if (iCylinder >= drive.nCylinders || iSector >= drive.nSectors) {
             this.csr |= PDP11.RL11.ERRC.HNF | PDP11.RL11.RLCS.ERR;