v1.20.0: Limited stepping support and a couple signed/unsigned division fixes
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7 changed files with 2266 additions and 2224 deletions
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@ -957,7 +957,7 @@ X86CPU.prototype.setReg = function(i, reg)
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*
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* All other 80386 registers are undefined after a reset (ie, Intel did not document how or if they are set).
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*
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* We've elected to set DX to 0x0304 on a reset, which is consistent with a 80386-C0, since we have no desire to
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* We've elected to set DX to 0x0308 on a reset, the highest known 80386 revision, since we have no desire to
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* try to emulate all the bugs in older (eg, B1) steppings -- at least not initially. We leave stepping-accurate
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* emulation for another day. It's also known that the B1 (and possibly B0) reported 0x0303 in DX, and that
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* the D0 stepping reported 0x0305; beyond that, it's not known exactly what revision numbers Intel used for all
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@ -1079,9 +1079,10 @@ X86CPU.prototype.resetRegs = function()
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break;
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case X86.STEPPING_80386_D1:
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case X86.STEPPING_80386_D2:
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default:
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this.regEDX = 0x0308; // in the absence of a specific stepping, default to the highest known revision
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this.regEDX = 0x0308;
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break;
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default:
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break; // in the absence of a specific stepping, we leave DX set to zero
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}
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this.regCR0 = X86.CR0.ET; // formerly MSW
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this.regCR1 = 0; // reserved
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