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v1.20.0: Limited stepping support and a couple signed/unsigned division fixes

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This commit is contained in:
Jeff Parsons 2015-10-31 08:31:31 -07:00
commit dc8baec9f0
7 changed files with 2266 additions and 2224 deletions
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7
modules/pcjs/lib/x86cpu.js
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@ -957,7 +957,7 @@ X86CPU.prototype.setReg = function(i, reg)
*
* All other 80386 registers are undefined after a reset (ie, Intel did not document how or if they are set).
*
* We've elected to set DX to 0x0304 on a reset, which is consistent with a 80386-C0, since we have no desire to
* We've elected to set DX to 0x0308 on a reset, the highest known 80386 revision, since we have no desire to
* try to emulate all the bugs in older (eg, B1) steppings -- at least not initially. We leave stepping-accurate
* emulation for another day. It's also known that the B1 (and possibly B0) reported 0x0303 in DX, and that
* the D0 stepping reported 0x0305; beyond that, it's not known exactly what revision numbers Intel used for all
@ -1079,9 +1079,10 @@ X86CPU.prototype.resetRegs = function()
break;
case X86.STEPPING_80386_D1:
case X86.STEPPING_80386_D2:
default:
this.regEDX = 0x0308; // in the absence of a specific stepping, default to the highest known revision
this.regEDX = 0x0308;
break;
default:
break; // in the absence of a specific stepping, we leave DX set to zero
}
this.regCR0 = X86.CR0.ET; // formerly MSW
this.regCR1 = 0; // reserved

6
modules/pcjs/lib/x86ops.js
View file

@ -2955,7 +2955,7 @@ X86.opSTOSb = function()
* TODO: Extend this errata to STOSW, as well as MOVSB, MOVSW, INSB, and INSW. Also, scope out the
* extent to which this errara also existed on earlier steppings.
*/
if (this.stepping == X86.STEPPING_80386_B1) {
if (this.stepping >= X86.STEPPING_80386_A0 && this.stepping <= X86.STEPPING_80386_B1) {
if (!(this.opPrefixes & X86.OPFLAG.ADDRSIZE) != (this.getByte(this.regLIP) != X86.OPCODE.AS)) {
maskAddr ^= (0xffff0000|0);
}
@ -4169,9 +4169,7 @@ X86.opGRP3b = function()
{
this.fMDSet = false;
this.aOpModGrpByte[this.getIPByte()].call(this, X86.aOpGrp3b, X86.fnSRCNone);
if (this.fMDSet) {
this.regEAX = (this.regEAX & ~this.maskData) | (this.regMDLo & this.maskData);
}
if (this.fMDSet) this.regEAX = (this.regEAX & ~this.maskData) | (this.regMDLo & this.maskData);
};
/**