More FPU work
This commit is contained in:
Jeff Parsons
parent
6a86de48e7
commit
d9e280f279
4 changed files with 638 additions and 180 deletions
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@ -432,7 +432,7 @@ if (DEBUGGER) {
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"FINCSTP","FDECSTP","FFREE", "FNOP", "FWAIT"
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"FINCSTP","FDECSTP","FFREE", "FNOP", "FWAIT"
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];
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];
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Debugger.FPU_TAGS = ["VALID", "ZERO", "SPECIAL", "EMPTY"];
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Debugger.FPU_TAGS = ["VALID", "ZERO ", "SPEC ", "EMPTY"];
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Debugger.CPU_8086 = 0;
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Debugger.CPU_8086 = 0;
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Debugger.CPU_80186 = 1;
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Debugger.CPU_80186 = 1;
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@ -554,10 +554,10 @@ if (DEBUGGER) {
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Debugger.TYPE_SR = 0x000B; // FPU SR (short-real; 32-bit)
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Debugger.TYPE_SR = 0x000B; // FPU SR (short-real; 32-bit)
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Debugger.TYPE_LI = 0x000C; // FPU LI (long-integer; 64-bit)
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Debugger.TYPE_LI = 0x000C; // FPU LI (long-integer; 64-bit)
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Debugger.TYPE_LR = 0x000C; // FPU LR (long-real; 64-bit)
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Debugger.TYPE_LR = 0x000C; // FPU LR (long-real; 64-bit)
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Debugger.TYPE_TR = 0x000D; // FPU TR (temp-real; 80-zbit)
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Debugger.TYPE_TR = 0x000D; // FPU TR (temp-real; 80-bit)
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Debugger.TYPE_PD = 0x000D; // FPU PD (packed-decimal, 18 digits; 80-bit)
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Debugger.TYPE_PD = 0x000E; // FPU PD (packed-decimal, 18 digits; 80-bit)
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Debugger.TYPE_ENV = 0x000E; // FPU ENV (environment; 14 bytes)
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Debugger.TYPE_ENV = 0x000F; // FPU ENV (environment; 14 bytes in real-mode, 28 bytes in protected-mode)
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Debugger.TYPE_FPU = 0x000F; // FPU SAVE (save/restore; 94 bytes)
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Debugger.TYPE_FPU = 0x000F; // FPU SAVE (save/restore; 94 bytes in real-mode, 108 bytes in protected-mode)
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/*
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/*
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* TYPE_MODE values. Order is somewhat important, as all values implying
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* TYPE_MODE values. Order is somewhat important, as all values implying
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@ -5121,6 +5121,20 @@ if (DEBUGGER) {
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case Debugger.TYPE_LONG:
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case Debugger.TYPE_LONG:
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sPrefix = "DWORD";
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sPrefix = "DWORD";
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break;
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break;
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case Debugger.TYPE_SI:
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case Debugger.TYPE_SR:
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sPrefix = "SREAL";
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break;
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case Debugger.TYPE_LI:
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case Debugger.TYPE_LR:
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sPrefix = "LREAL";
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break;
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case Debugger.TYPE_TR:
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sPrefix = "TREAL";
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break;
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case Debugger.TYPE_PD:
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sPrefix = "DEC18";
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break;
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}
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}
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if (sPrefix) sOperand = sPrefix + ' ' + sOperand;
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if (sPrefix) sOperand = sPrefix + ' ' + sOperand;
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}
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}
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@ -7289,14 +7303,18 @@ if (DEBUGGER) {
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*/
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*/
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Debugger.prototype.doFPURegisters = function(asArgs)
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Debugger.prototype.doFPURegisters = function(asArgs)
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{
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{
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this.assert(this.fpu);
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var fpu = this.fpu;
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this.assert(fpu);
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var wStatus = fpu.getStatus(), wControl = fpu.getControl();
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for (var i = 0; i < 8; i++) {
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for (var i = 0; i < 8; i++) {
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var a = this.fpu.readFPUStack(i);
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var a = fpu.readFPUStack(i);
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if (!a) break;
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if (!a) break;
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var sValue = str.pad(a[2].toFixed(15), 24, true);
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var sValue = str.pad(a[2].toFixed(15), 24, true);
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this.println("ST" + i + ": " + sValue + " " + str.toHex(a[4]) + "," + str.toHex(a[3]) + " [" + Debugger.FPU_TAGS[a[1]] + "]");
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this.println("ST" + i + ": " + sValue + " " + str.toHex(a[4]) + "," + str.toHex(a[3]) + " [" + a[0] + ":" + Debugger.FPU_TAGS[a[1]] + "]");
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// this.println(" REG" + a[0] + " " + str.toBin(a[7], 16) + str.toBin(a[6]) + str.toBin(a[5]));
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// this.println(" REG" + a[0] + " " + str.toBin(a[7], 16) + str.toBin(a[6]) + str.toBin(a[5]));
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}
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}
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this.println(" B3SSS210ESPUOZDI xxxIRRPPIxPUOZDI");
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this.println("SW: " + str.toBin(wStatus, 16) + " (" + str.toHexWord(wStatus) + ") CW: " + str.toBin(wControl, 16) + " (" + str.toHexWord(wControl) + ")");
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};
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};
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/**
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/**
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@ -552,12 +552,13 @@ var X86 = {
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PE: 0x0020, // bit 5: Precision
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PE: 0x0020, // bit 5: Precision
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SF: 0x0040, // bit 6: Stack Fault (80387 and later)
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SF: 0x0040, // bit 6: Stack Fault (80387 and later)
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EXC: 0x007F, // all of the above exceptions
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EXC: 0x007F, // all of the above exceptions
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ES: 0x0080, // bit 7: Exception Summary (Interrupt Request on 8087)
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ES: 0x0080, // bit 7: Error/Exception Status/Summary (Interrupt Request on 8087)
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C0: 0x0100, // bit 8: Condition Code 0
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C0: 0x0100, // bit 8: Condition Code 0
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C1: 0x0200, // bit 9: Condition Code 1
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C1: 0x0200, // bit 9: Condition Code 1
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C2: 0x0400, // bit 10: Condition Code 2
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C2: 0x0400, // bit 10: Condition Code 2
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ST: 0x3800, // bits 11-13: Stack Top
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ST: 0x3800, // bits 11-13: Stack Top
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C3: 0x4000, // bit 14: Condition Code 3
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C3: 0x4000, // bit 14: Condition Code 3
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CC: 0x4700, // all condition code bits
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BUSY: 0x8000, // bit 15: Busy
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BUSY: 0x8000, // bit 15: Busy
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ST_SHIFT: 11
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ST_SHIFT: 11
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},
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},
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File diff suppressed because it is too large
Load diff
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@ -1097,6 +1097,52 @@ X86.opPUSHBX = function()
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/**
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/**
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* op=0x54 (PUSH SP)
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* op=0x54 (PUSH SP)
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*
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*
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* NOTE: Having an accurate implementation of "PUSH SP" for the 8086/8088 isn't just a nice idea, it affects real
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* code. Case in point: early Microsoft C floating-point libraries relied on "PUSH SP" behavior to quickly determine
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* whether an 8088 (and therefore presumably an 8087) or an 80286 (and presumably an 80287) was being used; eg:
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*
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* &0910:1E82 D93E1709 FSTCW WORD [0917]
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* &0910:1E86 CD3D INT 3D
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* &0E4E:06D3 50 PUSH AX
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* &0E4E:06D4 B83DA2 MOV AX,A23D
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* &0E4E:06D7 EB04 JMP 06DD
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* &0E4E:06DD 55 PUSH BP
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* &0E4E:06DE 1E PUSH DS
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* &0E4E:06DF 56 PUSH SI
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* &0E4E:06E0 8BEC MOV BP,SP
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* &0E4E:06E2 C57608 LDS SI,[BP+08]
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* &0E4E:06E5 4E DEC SI
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* &0E4E:06E6 4E DEC SI
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* &0E4E:06E7 897608 MOV [BP+08],SI
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* &0E4E:06EA 2904 SUB [SI],AX
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* &0E4E:06EC 53 PUSH BX
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* &0E4E:06ED 33DB XOR BX,BX
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* &0E4E:06EF 54 PUSH SP ; beginning of processor check
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* &0E4E:06F0 58 POP AX
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* &0E4E:06F1 3BC4 CMP AX,SP
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* &0E4E:06F3 7528 JNZ 071D ; jump if 8086/8088/80186/80188, no jump if 80286 or later
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* &0E4E:06F5 8B4001 MOV AX,[BX+SI+01]
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* &0E4E:06F8 25FB30 AND AX,30FB
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* &0E4E:06FB 3DD930 CMP AX,30D9
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* &0E4E:06FE 7507 JNZ 0707
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* &0E4E:0700 8A4002 MOV AL,[BX+SI+02]
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* &0E4E:0703 3CF0 CMP AL,F0
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* &0E4E:0705 7216 JC 071D
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* &0E4E:0707 8B4001 MOV AX,[BX+SI+01]
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* &0E4E:070A 25FFFE AND AX,FEFF
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* &0E4E:070D 3DDBE2 CMP AX,E2DB
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* &0E4E:0710 740B JZ 071D
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* &0E4E:0712 8B4001 MOV AX,[BX+SI+01]
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* &0E4E:0715 3DDFE0 CMP AX,E0DF
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* &0E4E:0718 7403 JZ 071D
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* &0E4E:071A C60490 MOV [SI],90
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* &0E4E:071D 5B POP BX
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* &0E4E:071E 5E POP SI
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* &0E4E:071F 1F POP DS
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* &0E4E:0720 5D POP BP
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* &0E4E:0721 58 POP AX
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* &0E4E:0722 CF IRET
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*
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* @this {X86CPU}
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* @this {X86CPU}
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*/
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*/
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X86.opPUSHSP_8086 = function()
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X86.opPUSHSP_8086 = function()
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