Updated PDP-11/70 machines, and fixed a regression with MMR2 updates
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4a8a29ce6f
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d816497336
7 changed files with 50 additions and 18 deletions
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@ -505,8 +505,13 @@ class CPUStatePDP11 extends CPUPDP11 {
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/*
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* If updates to MMR1 have not been shut off (ie, MMR0.ABORT bits are clear), then we are allowed
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* to sync MMR1 with its real-time counterpart in opLast.
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*
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* UPDATE: Apparently, I was mistaken that this register would only be updated when the MMR0 ENABLED
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* bit was set.
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*
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* if ((this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.ENABLED)) == PDP11.MMR0.ENABLED)
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*/
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if ((this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.ENABLED)) == PDP11.MMR0.ENABLED) {
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if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
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this.regMMR1 = (this.opLast >> 16) & 0xffff;
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}
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var result = this.regMMR1;
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@ -527,8 +532,13 @@ class CPUStatePDP11 extends CPUPDP11 {
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/*
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* If updates to MMR2 have not been shut off (ie, MMR0.ABORT bits are clear), then we are allowed
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* to sync MMR2 with its real-time counterpart in opLast.
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*
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* UPDATE: Apparently, I was mistaken that this register would only be updated when the MMR0 ENABLED
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* bit was set.
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*
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* if ((this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.ENABLED)) == PDP11.MMR0.ENABLED)
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*/
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if ((this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.ENABLED)) == PDP11.MMR0.ENABLED) {
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if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
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this.regMMR2 = this.opLast & 0xffff;
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}
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return this.regMMR2;
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