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Jeff Parsons 2015-12-10 09:11:46 -08:00
commit d46fec026c
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pubs/pc/reference/intel/80286/b2_b3_info/README.md
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80286 (B-2/B-3) Information
---
layout: page
title: "Intel 80286 CPU Documentation: B-2/B-3 Steppings"
permalink: /pubs/pc/reference/intel/80286/b2_b3_info/
---
Intel 80286 CPU Documentation
---
### 80286 B-2/B-3 Steppings
This applies to S-spec #40093 and to S-spec #54012 of the 80286, since they contain a (B-2/B-3) stepping of the 80286.
Their complete parametric specifications are given by the datasheet in the 1984 Intel Microsystem Components Handbook,
@ -190,4 +198,4 @@ is performed no unmasked interrupt is active. The interrupt handler for IR7 can
interrupt on IR7. The ISR7 bit will be 0 if at the time the interrupt was acknowledged, no unmasked IR inputs of the 8259A were
active ("phantom" interrupt).
[This information is from a 7-page Intel document titled "80286(B-2/B-3) Information Sheet, 21 November 1984"]
[This information is from a 7-page Intel document titled "80286(B-2/B-3) Information Sheet, 21 November 1984"]