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---
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layout: page
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title: Intel 80286 CPU Documentation
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permalink: /pubs/pc/reference/intel/80286/
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Intel 80286 CPU Documentation
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@ -26,7 +32,7 @@ Intel 80286 CPU Documentation
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### Assorted Publications
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_286_Hardware_Reference--1983/thumbs/iAPX_286_Hardware_Reference--1983.jpg" width="200" height="260" alt="iAPX 286 Hardware Reference (1983)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1983_iAPX_286_Hardware_Reference.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_286_Operating_System_Writers_Guide--1983/thumbs/iAPX_286_Operating_System_Writers_Guide--1983.jpg" width="200" height="260" alt="iAPX 286 OS Writer's Guide (1983)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1983_iAPX_286_Operating_System_Writers_Guide.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_286_Programmers_Reference_Manual--1985/thumbs/iAPX_286_Programmers_Reference_Manual--1985.jpg" width="200" height="260" alt="iAPX 286 Programmer Reference (1985)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1985_iAPX_286_Programmers_Reference_Manual.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/80286/progref/thumbs/80286_and_80287_Programmers_Reference_Manual_1987 1.jpeg" width="200" height="260" alt="80286/80287 Programmer Reference (1987)"/>](progref/)
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ARPL (63H)
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layout: page
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title: "Intel 80286 CPU Documentation: ARPL"
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permalink: /pubs/pc/reference/intel/80286/arpl/
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---
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Intel 80286 CPU Documentation
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---
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### ARPL (63H)
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When the second operand of the ARPL instruction (as described in the iAPX286 Programmer's Reference Manual) is a null
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selector, the ARPL instruction generates exception 13. This behavior of the ARPL instruction has not been previously described,
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@ -8,4 +16,4 @@ but will be described in future revisions of the "iAPX286 Programmer's Reference
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This functionality of the ARPL is not believed not to be a problem, and there are no plans to change this functionality
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of the ARPL instruction.
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[This information is from an Intel document titled "80286 ARPL and Overlength Instructions, 15 October 1984"]
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[This information is from an Intel document titled "80286 ARPL and Overlength Instructions, 15 October 1984"]
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@ -1,5 +1,13 @@
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80286 (B-2/B-3) Information
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layout: page
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title: "Intel 80286 CPU Documentation: B-2/B-3 Steppings"
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permalink: /pubs/pc/reference/intel/80286/b2_b3_info/
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---
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Intel 80286 CPU Documentation
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---
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### 80286 B-2/B-3 Steppings
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This applies to S-spec #40093 and to S-spec #54012 of the 80286, since they contain a (B-2/B-3) stepping of the 80286.
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Their complete parametric specifications are given by the datasheet in the 1984 Intel Microsystem Components Handbook,
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@ -190,4 +198,4 @@ is performed no unmasked interrupt is active. The interrupt handler for IR7 can
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interrupt on IR7. The ISR7 bit will be 0 if at the time the interrupt was acknowledged, no unmasked IR inputs of the 8259A were
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active ("phantom" interrupt).
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[This information is from a 7-page Intel document titled "80286(B-2/B-3) Information Sheet, 21 November 1984"]
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[This information is from a 7-page Intel document titled "80286(B-2/B-3) Information Sheet, 21 November 1984"]
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Exceptions from Undefined Opcodes and String Instructions
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layout: page
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title: "Intel 80286 CPU Documentation: Early Errata"
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permalink: /pubs/pc/reference/intel/80286/early_errata/
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---
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Intel 80286 CPU Documentation
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---
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### Exceptions from Undefined Opcodes and String Instructions
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The exception 13 handler will probably use a lookup table for the opcode byte of the instruction causing exception
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13 to determine the correct action for this instruction. In general, any undefined opcode causes exception 6 and
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@ -94,4 +102,4 @@ steppings of the 80286 and are fixed in later steppings of the 80286.
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extension data transfers should be inhibited while [LOADALL](../loadall/) is running. Later steppings of the 80286 will correctly
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load the MSW during [LOADALL](../loadall/) with HOLD and processor extension transfers.
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[This information is from an undated 15-page Intel document titled "Undocumented iAPX 286 Test Instruction"]
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[This information is from an undated 15-page Intel document titled "Undocumented iAPX 286 Test Instruction"]
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Instructions Longer than 10 Bytes
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layout: page
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title: "Intel 80286 CPU Documentation: Extra Prefixes"
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permalink: /pubs/pc/reference/intel/80286/extra_prefixes/
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---
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Intel 80286 CPU Documentation
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---
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### Instructions Longer than 10 Bytes
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When the CPU detects an instruction that is illegal due to being greater than 10 bytes in length, it generates an
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exception #13 (General Protection Violation) instead of exception #6 (Invalid Opcode). The only way an instruction
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@ -9,4 +17,4 @@ greater than ten bytes can occur is by using the assembler to intentionally plac
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There are no plans to change this functionality of the 80286 and future editions of the "iAPX286 Programmer's Reference
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Manual" and 80286 datasheet will accurately describe how 80286 reacts to instructions greater than 10 bytes in length.
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[This information is from an Intel document titled "80286 ARPL and Overlength Instructions, 15 October 1984"]
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[This information is from an Intel document titled "80286 ARPL and Overlength Instructions, 15 October 1984"]
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LOADALL (0F05H)
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layout: page
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title: "Intel 80286 CPU Documentation: LOADALL"
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permalink: /pubs/pc/reference/intel/80286/loadall/
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---
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Intel 80286 CPU Documentation
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---
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### LOADALL (0F05H)
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The iAPX 286 microprocessor (part number 80286) has an undocumented instruction used by Intel test programs to
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allow direct access to internal registers for fast initialization. The instruction is called LOADALL. Each 80286
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File diff suppressed because it is too large
Load diff
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Executing Real Mode Programs in Protected Mode
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---
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layout: page
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title: "Intel 80286 CPU Documentation: Real Mode"
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permalink: /pubs/pc/reference/intel/80286/real_mode/
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---
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Intel 80286 CPU Documentation
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---
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### Executing Real Mode Programs in Protected Mode
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An iAPX 86/88 program using real mode addressing can be executed in protected mode with full protection between
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it and other programs. All segment register semantics of iAPX 86 real mode can be emulated. The address space
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80286 REP MOVS and REP INS Restartability
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layout: page
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title: "Intel 80286 CPU Documentation: REP Restart"
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permalink: /pubs/pc/reference/intel/80286/rep_restart/
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---
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Intel 80286 CPU Documentation
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---
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### 80286 REP MOVS and REP INS Restartability
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The repeated string instructions on 80286 were made restartable after protection violations on the (B-2/B-3) and
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later 80286 steppings. Should a protection violation occur when using these instructions in protected mode, it is
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REP INS restartability is corrected, CX will correctly continue to be 0000H when these instructions complete without generating
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a protection violation.
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[This information is from an Intel document titled "80286 REP MOVS and REP INS Restartability, 15 October 1984"]
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[This information is from an Intel document titled "80286 REP MOVS and REP INS Restartability, 15 October 1984"]
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@ -1,3 +1,9 @@
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---
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layout: page
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title: Intel CPU Documentation
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permalink: /pubs/pc/reference/intel/
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---
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Intel CPU Documentation
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---
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@ -5,8 +11,8 @@ Intel CPU Documentation
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### Assorted Publications
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_86_88_Users_Manual--1981/thumbs/iAPX_86_88_Users_Manual--1981.jpg" width="200" height="260" alt="iAPX 86,88 User's Manual (1981)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1981_iAPX_86_88_Users_Manual.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_286_Hardware_Reference--1983/thumbs/iAPX_286_Hardware_Reference--1983.jpg" width="200" height="260" alt="iAPX 286 Hardware Reference (1983)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1983_iAPX_286_Hardware_Reference.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_286_Operating_System_Writers_Guide--1983/thumbs/iAPX_286_Operating_System_Writers_Guide--1983.jpg" width="200" height="260" alt="iAPX 286 OS Writer's Guide (1983)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1983_iAPX_286_Operating_System_Writers_Guide.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/iAPX_286_Programmers_Reference_Manual--1985/thumbs/iAPX_286_Programmers_Reference_Manual--1985.jpg" width="200" height="260" alt="iAPX 286 Programmer Reference (1985)"/>](http://bitsavers.trailing-edge.com/pdf/intel/_dataBooks/1985_iAPX_286_Programmers_Reference_Manual.pdf)
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[<img src="http://static.pcjs.org/pubs/pc/reference/intel/80286/progref/thumbs/80286_and_80287_Programmers_Reference_Manual_1987 1.jpeg" width="200" height="260" alt="80286/80287 Programmer Reference (1987)"/>](80286/progref/)
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