Simplified access to controller definitions using class constants
This commit is contained in:
parent
138b2534e5
commit
cdabaafaf1
3 changed files with 127 additions and 107 deletions
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@ -32,8 +32,6 @@ and tell it to convert the constructor to a class; for example:
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/**
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* BusPDP11(parmsBus, cpu, dbg)
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*
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* ...
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*
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* @constructor
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* @extends Component
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* @param {Object} parmsBus
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@ -53,8 +51,6 @@ class BusPDP11 extends Component {
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/**
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* BusPDP11(parmsBus, cpu, dbg)
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*
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* ...
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*
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* @param {Object} parmsBus
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* @param {CPUStatePDP11} cpu
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* @param {DebuggerPDP11} dbg
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@ -307,7 +307,7 @@ class RK11 extends Component {
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*/
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this.initController();
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this.irq = this.cpu.addIRQ(PDP11.RK11.VEC, PDP11.RK11.PRI, MessagesPDP11.RK11);
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this.irq = this.cpu.addIRQ(RK11.VEC, RK11.PRI, MessagesPDP11.RK11);
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bus.addIOTable(this, RK11.UNIBUS_IOTABLE);
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bus.addResetHandler(this.reset.bind(this));
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@ -861,9 +861,9 @@ class RK11 extends Component {
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{
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var i = 0;
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if (!data) data = [];
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this.regRKDS = data[i++] || (PDP11.RK11.RKDS.RK05 | PDP11.RK11.RKDS.SOK | PDP11.RK11.RKDS.RRDY);
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this.regRKDS = data[i++] || (RK11.RKDS.RK05 | RK11.RKDS.SOK | RK11.RKDS.RRDY);
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this.regRKER = data[i++] || 0;
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this.regRKCS = data[i++] || (PDP11.RK11.RKCS.CRDY);
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this.regRKCS = data[i++] || (RK11.RKCS.CRDY);
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this.regRKWC = data[i++] || 0;
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this.regRKBA = data[i++] || 0;
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this.regRKDA = data[i++] || 0;
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@ -931,7 +931,7 @@ class RK11 extends Component {
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if (!drive.disk) drive.sDiskPath = ""; // ensure this is initialized to a default that displayDisk() can deal with
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drive.status = PDP11.RK11.RKDS.RK05 | PDP11.RK11.RKDS.SOK | PDP11.RK11.RKDS.RRDY;
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drive.status = RK11.RKDS.RK05 | RK11.RKDS.SOK | RK11.RKDS.RRDY;
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return fSuccess;
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}
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@ -945,73 +945,73 @@ class RK11 extends Component {
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{
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var fInterrupt = true;
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var fnReadWrite, func, sFunc = "";
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var iDrive = (this.regRKDA & PDP11.RK11.RKDA.DS) >> PDP11.RK11.RKDA.SHIFT.DS;
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var iDrive = (this.regRKDA & RK11.RKDA.DS) >> RK11.RKDA.SHIFT.DS;
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var drive = this.aDrives[iDrive];
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var iCylinder, iHead, iSector, nWords, addr, inc;
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this.regRKCS &= ~(PDP11.RK11.RKCS.CRDY | PDP11.RK11.RKCS.SCP);
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this.regRKER &= ~(PDP11.RK11.RKER.SE);
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this.regRKCS &= ~(RK11.RKCS.CRDY | RK11.RKCS.SCP);
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this.regRKER &= ~(RK11.RKER.SE);
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switch(func = this.regRKCS & PDP11.RK11.RKCS.FUNC) {
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switch(func = this.regRKCS & RK11.RKCS.FUNC) {
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case PDP11.RK11.FUNC.CRESET:
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case RK11.FUNC.CRESET:
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if (this.messageEnabled()) this.printMessage(this.type + ": CRESET(" + iDrive + ")", true);
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this.regRKER = this.regRKDA = 0;
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this.regRKCS = PDP11.RK11.RKCS.CRDY;
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this.regRKCS = RK11.RKCS.CRDY;
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break;
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case PDP11.RK11.FUNC.RCHK:
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case RK11.FUNC.RCHK:
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sFunc = "RCHK";
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/* falls through */
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case PDP11.RK11.FUNC.READ:
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case RK11.FUNC.READ:
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if (!sFunc) sFunc = "READ";
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fnReadWrite = this.readData;
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/* falls through */
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case PDP11.RK11.FUNC.WCHK:
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case RK11.FUNC.WCHK:
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if (!sFunc) sFunc = "WCHK";
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/* falls through */
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case PDP11.RK11.FUNC.WRITE:
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case RK11.FUNC.WRITE:
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if (!sFunc) sFunc = "WRITE";
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if (!fnReadWrite) fnReadWrite = this.writeData;
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iCylinder = (this.regRKDA & PDP11.RK11.RKDA.CA) >> PDP11.RK11.RKDA.SHIFT.CA;
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iHead = (this.regRKDA & PDP11.RK11.RKDA.HS) >> PDP11.RK11.RKDA.SHIFT.HS;
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iSector = this.regRKDA & PDP11.RK11.RKDA.SA;
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iCylinder = (this.regRKDA & RK11.RKDA.CA) >> RK11.RKDA.SHIFT.CA;
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iHead = (this.regRKDA & RK11.RKDA.HS) >> RK11.RKDA.SHIFT.HS;
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iSector = this.regRKDA & RK11.RKDA.SA;
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nWords = (0x10000 - this.regRKWC) & 0xffff;
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addr = (((this.regRKCS & PDP11.RK11.RKCS.MEX)) << (16 - PDP11.RK11.RKCS.SHIFT.MEX)) | this.regRKBA;
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inc = (this.regRKCS & PDP11.RK11.RKCS.IBA)? 0 : 2;
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addr = (((this.regRKCS & RK11.RKCS.MEX)) << (16 - RK11.RKCS.SHIFT.MEX)) | this.regRKBA;
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inc = (this.regRKCS & RK11.RKCS.IBA)? 0 : 2;
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if (this.messageEnabled()) this.printMessage(this.type + ": " + sFunc + "(" + iCylinder + ":" + iHead + ":" + iSector + ") " + Str.toOct(addr) + "--" + Str.toOct(addr + (nWords << 1)), true, true);
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if (iCylinder >= drive.nCylinders) {
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this.regRKER |= PDP11.RK11.RKER.NXC;
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this.regRKER |= RK11.RKER.NXC;
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break;
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}
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if (iSector >= drive.nSectors) {
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this.regRKER |= PDP11.RK11.RKER.NXS;
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this.regRKER |= RK11.RKER.NXS;
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break;
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}
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fInterrupt = fnReadWrite.call(this, drive, iCylinder, iHead, iSector, nWords, addr, inc, (func >= PDP11.RK11.FUNC.WCHK), this.doneReadWrite.bind(this));
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fInterrupt = fnReadWrite.call(this, drive, iCylinder, iHead, iSector, nWords, addr, inc, (func >= RK11.FUNC.WCHK), this.doneReadWrite.bind(this));
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break;
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case PDP11.RK11.FUNC.SEEK:
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iCylinder = (this.regRKDA & PDP11.RK11.RKDA.CA) >> PDP11.RK11.RKDA.SHIFT.CA;
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case RK11.FUNC.SEEK:
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iCylinder = (this.regRKDA & RK11.RKDA.CA) >> RK11.RKDA.SHIFT.CA;
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if (this.messageEnabled()) this.printMessage(this.type + ": SEEK(" + iCylinder + ")", true);
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if (iCylinder < drive.nCylinders) {
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this.regRKCS |= PDP11.RK11.RKCS.SCP;
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this.regRKCS |= RK11.RKCS.SCP;
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} else {
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this.regRKER |= PDP11.RK11.RKER.NXC;
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this.regRKER |= RK11.RKER.NXC;
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}
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break;
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case PDP11.RK11.FUNC.DRESET:
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case RK11.FUNC.DRESET:
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if (this.messageEnabled()) this.printMessage(this.type + ": DRESET(" + iDrive + ")");
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this.regRKER = this.regRKDA = 0;
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this.regRKCS = PDP11.RK11.RKCS.CRDY | PDP11.RK11.RKCS.SCP;
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this.regRKCS = RK11.RKCS.CRDY | RK11.RKCS.SCP;
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break;
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default:
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@ -1019,14 +1019,14 @@ class RK11 extends Component {
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break;
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}
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this.regRKDS = drive.status | (drive.disk? PDP11.RK11.RKDS.DRDY : 0) | (iDrive << PDP11.RK11.RKDS.SHIFT.ID) | (this.regRKDA & PDP11.RK11.RKDS.SC);
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this.regRKDS = drive.status | (drive.disk? RK11.RKDS.DRDY : 0) | (iDrive << RK11.RKDS.SHIFT.ID) | (this.regRKDA & RK11.RKDS.SC);
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this.updateErrors();
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if (fInterrupt) {
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this.regRKCS &= ~PDP11.RK11.RKCS.GO;
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this.regRKCS |= PDP11.RK11.RKCS.CRDY;
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if (this.regRKCS & PDP11.RK11.RKCS.IE) this.cpu.setIRQ(this.irq);
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this.regRKCS &= ~RK11.RKCS.GO;
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this.regRKCS |= RK11.RKCS.CRDY;
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if (this.regRKCS & RK11.RKCS.IE) this.cpu.setIRQ(this.irq);
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}
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}
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@ -1052,7 +1052,7 @@ class RK11 extends Component {
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var sector = null, ibSector;
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if (!disk) {
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err = PDP11.RK11.RKER.NXD;
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err = RK11.RKER.NXD;
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nWords = 0;
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}
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@ -1060,12 +1060,12 @@ class RK11 extends Component {
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while (nWords) {
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if (!sector) {
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if (iCylinder >= disk.nCylinders) {
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err = PDP11.RK11.RKER.NXC;
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err = RK11.RKER.NXC;
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break;
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}
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sector = disk.seek(iCylinder, iHead, iSector + 1);
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if (!sector) {
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err = PDP11.RK11.RKER.SKE;
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err = RK11.RKER.SKE;
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break;
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}
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ibSector = 0;
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@ -1079,7 +1079,7 @@ class RK11 extends Component {
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}
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var b0, b1;
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if ((b0 = disk.read(sector, ibSector++)) < 0 || (b1 = disk.read(sector, ibSector++)) < 0) {
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err = PDP11.RK11.RKER.NXS;
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err = RK11.RKER.NXS;
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break;
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}
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if (!fCheck) {
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@ -1094,7 +1094,7 @@ class RK11 extends Component {
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}
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}
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if (this.bus.checkFault()) {
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err = PDP11.RK11.RKER.NXM;
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err = RK11.RKER.NXM;
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break;
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}
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}
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@ -1127,24 +1127,24 @@ class RK11 extends Component {
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var sector = null, ibSector;
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if (!disk) {
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err = PDP11.RK11.RKER.NXD;
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err = RK11.RKER.NXD;
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nWords = 0;
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}
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while (nWords) {
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var data = this.bus.getWordDirect(this.cpu.mapUnibus(addr));
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if (this.bus.checkFault()) {
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err = PDP11.RK11.RKER.NXM;
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err = RK11.RKER.NXM;
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break;
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}
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if (!sector) {
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if (iCylinder >= disk.nCylinders) {
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err = PDP11.RK11.RKER.NXC;
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err = RK11.RKER.NXC;
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break;
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}
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sector = disk.seek(iCylinder, iHead, iSector + 1, true);
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if (!sector) {
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err = PDP11.RK11.RKER.SKE;
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err = RK11.RKER.SKE;
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break;
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}
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ibSector = 0;
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@ -1159,7 +1159,7 @@ class RK11 extends Component {
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if (fCheck) {
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var b0, b1;
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if ((b0 = disk.read(sector, ibSector++)) < 0 || (b1 = disk.read(sector, ibSector++)) < 0) {
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err = PDP11.RK11.RKER.NXS;
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err = RK11.RKER.NXS;
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break;
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}
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/*
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@ -1173,12 +1173,12 @@ class RK11 extends Component {
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* trigger the RKCS HE (Hard Error) bit. This is all taken care of in updateErrors() now.
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*/
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if (data != (b0 | (b1 << 8))) {
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err = PDP11.RK11.RKER.WCE;
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err = RK11.RKER.WCE;
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break;
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}
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} else {
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if (!disk.write(sector, ibSector++, data & 0xff) || !disk.write(sector, ibSector++, data >> 8)) {
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err = PDP11.RK11.RKER.NXS;
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err = RK11.RKER.NXS;
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break;
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}
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}
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@ -1204,9 +1204,9 @@ class RK11 extends Component {
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doneReadWrite(err, iCylinder, iHead, iSector, nWords, addr)
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{
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this.regRKBA = addr & 0xffff;
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this.regRKCS = (this.regRKCS & ~PDP11.RK11.RKCS.MEX) | ((addr >> (16 - PDP11.RK11.RKCS.SHIFT.MEX)) & PDP11.RK11.RKCS.MEX);
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this.regRKCS = (this.regRKCS & ~RK11.RKCS.MEX) | ((addr >> (16 - RK11.RKCS.SHIFT.MEX)) & RK11.RKCS.MEX);
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this.regRKWC = (0x10000 - nWords) & 0xffff;
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this.regRKDA = (this.regRKDA & ~PDP11.RK11.RKDA.SA) | (iSector & PDP11.RK11.RKDA.SA);
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this.regRKDA = (this.regRKDA & ~RK11.RKDA.SA) | (iSector & RK11.RKDA.SA);
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this.regRKER |= err;
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this.updateErrors();
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return true;
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@ -1231,11 +1231,11 @@ class RK11 extends Component {
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* much like the high error bit found in other hardware registers: we always set it if any lower error bits
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* are also set.
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*/
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this.regRKCS &= ~PDP11.RK11.RKCS.ERR;
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this.regRKCS &= ~RK11.RKCS.ERR;
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if (this.regRKER) {
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this.regRKER |= PDP11.RK11.RKER.DRE;
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this.regRKCS |= PDP11.RK11.RKCS.ERR;
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if (this.regRKER & PDP11.RK11.RKER.HE) this.regRKCS |= PDP11.RK11.RKCS.HE;
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this.regRKER |= RK11.RKER.DRE;
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this.regRKCS |= RK11.RKCS.ERR;
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if (this.regRKER & RK11.RKER.HE) this.regRKCS |= RK11.RKCS.HE;
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if (this.messageEnabled()) this.printMessage(this.type + ": ERROR: " + Str.toOct(this.regRKER));
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}
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}
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@ -1301,7 +1301,7 @@ class RK11 extends Component {
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*/
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readRKCS(addr)
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{
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return this.regRKCS & PDP11.RK11.RKCS.RMASK;
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return this.regRKCS & RK11.RKCS.RMASK;
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}
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/**
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@ -1313,9 +1313,9 @@ class RK11 extends Component {
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*/
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writeRKCS(data, addr)
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{
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this.regRKCS = (this.regRKCS & ~PDP11.RK11.RKCS.WMASK) | (data & PDP11.RK11.RKCS.WMASK);
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this.regRKCS = (this.regRKCS & ~RK11.RKCS.WMASK) | (data & RK11.RKCS.WMASK);
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if (this.regRKCS & PDP11.RK11.RKCS.GO) this.processCommand();
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if (this.regRKCS & RK11.RKCS.GO) this.processCommand();
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}
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/**
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@ -1424,6 +1424,17 @@ RK11.SOURCE = {
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REMOTE: "??"
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};
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/*
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* Alias RK11 definitions as class constants
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*/
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RK11.PRI = PDP11.RK11.PRI;
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RK11.VEC = PDP11.RK11.VEC;
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RK11.RKDS = PDP11.RK11.RKDS; // 177400: Drive Status Register
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RK11.RKER = PDP11.RK11.RKER; // 177402: Error Register
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RK11.RKCS = PDP11.RK11.RKCS; // 177404: Control Status Register
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RK11.RKDA = PDP11.RK11.RKDA; // 177412: Disk Address Register
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RK11.FUNC = PDP11.RK11.FUNC;
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/*
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* ES6 ALERT: As you can see below, I've finally started using computed property names.
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*/
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@ -309,7 +309,7 @@ class RL11 extends Component {
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*/
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this.initController();
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this.irq = this.cpu.addIRQ(PDP11.RL11.VEC, PDP11.RL11.PRI, MessagesPDP11.RL11);
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this.irq = this.cpu.addIRQ(RL11.VEC, RL11.PRI, MessagesPDP11.RL11);
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bus.addIOTable(this, RL11.UNIBUS_IOTABLE);
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bus.addResetHandler(this.reset.bind(this));
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@ -861,7 +861,7 @@ class RL11 extends Component {
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{
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var i = 0;
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if (!data) data = [];
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this.regRLCS = data[i++] || (PDP11.RL11.RLCS.DRDY | PDP11.RL11.RLCS.CRDY);
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this.regRLCS = data[i++] || (RL11.RLCS.DRDY | RL11.RLCS.CRDY);
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this.regRLBA = data[i++] || 0;
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this.regRLDA = data[i++] || 0;
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this.tmpRLDA = data[i++] || 0;
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@ -933,7 +933,7 @@ class RL11 extends Component {
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/*
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* Default drive status bits returned via the controller's Get Status command via the RLMP register
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*/
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drive.status = PDP11.RL11.RLMP.GS_ST.LOCKON | PDP11.RL11.RLMP.GS_BH | PDP11.RL11.RLMP.GS_HO;
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drive.status = RL11.RLMP.GS_ST.LOCKON | RL11.RLMP.GS_BH | RL11.RLMP.GS_HO;
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return fSuccess;
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}
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@ -947,7 +947,7 @@ class RL11 extends Component {
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{
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var fInterrupt = true;
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var fnReadWrite, sFunc = "";
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var iDrive = (this.regRLCS & PDP11.RL11.RLCS.DS) >> PDP11.RL11.RLCS.SHIFT.DS;
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var iDrive = (this.regRLCS & RL11.RLCS.DS) >> RL11.RLCS.SHIFT.DS;
|
||||
var drive = this.aDrives[iDrive];
|
||||
var disk = drive.disk;
|
||||
var iCylinder, iHead, iSector, nWords, addr;
|
||||
|
|
@ -959,62 +959,62 @@ class RL11 extends Component {
|
|||
* 2) CRDY is cleared to process a command
|
||||
* 3) DRDY is cleared to indicate a command in process
|
||||
*/
|
||||
this.regRLCS &= ~PDP11.RL11.RLCS.DRDY;
|
||||
this.regRLCS &= ~RL11.RLCS.DRDY;
|
||||
|
||||
switch(this.regRLCS & PDP11.RL11.RLCS.FUNC) {
|
||||
switch(this.regRLCS & RL11.RLCS.FUNC) {
|
||||
|
||||
case PDP11.RL11.FUNC.NOP:
|
||||
case PDP11.RL11.FUNC.WCHK:
|
||||
case PDP11.RL11.FUNC.RDNC:
|
||||
case RL11.FUNC.NOP:
|
||||
case RL11.FUNC.WCHK:
|
||||
case RL11.FUNC.RDNC:
|
||||
break;
|
||||
|
||||
case PDP11.RL11.FUNC.STATUS:
|
||||
if (this.regRLMP & PDP11.RL11.RLMP.GS_BH) {
|
||||
this.regRLCS &= (PDP11.RL11.RLCS.DRDY | PDP11.RL11.RLCS.FUNC | PDP11.RL11.RLCS.BAE); // TODO: Review
|
||||
case RL11.FUNC.STATUS:
|
||||
if (this.regRLMP & RL11.RLMP.GS_BH) {
|
||||
this.regRLCS &= (RL11.RLCS.DRDY | RL11.RLCS.FUNC | RL11.RLCS.BAE); // TODO: Review
|
||||
}
|
||||
/*
|
||||
* The bit indicating whether or not the disk contains 256 or 512 cylinders is critical;
|
||||
* for example, the first RSTS/E disk image we tried was an RL01K, which has only 256 cylinders,
|
||||
* and the operating system would crash mysteriously if we didn't report the correct geometry.
|
||||
*/
|
||||
this.regRLMP = drive.status | (this.tmpRLDA & PDP11.RL11.RLDA.RW_HS) | (disk && disk.nCylinders == 512? PDP11.RL11.RLMP.GS_DT : 0);
|
||||
this.regRLMP = drive.status | (this.tmpRLDA & RL11.RLDA.RW_HS) | (disk && disk.nCylinders == 512? RL11.RLMP.GS_DT : 0);
|
||||
break;
|
||||
|
||||
case PDP11.RL11.FUNC.SEEK:
|
||||
if ((this.regRLDA & PDP11.RL11.RLDA.GS_CMD) == PDP11.RL11.RLDA.SEEK_CMD) {
|
||||
var darCA = (this.regRLDA & PDP11.RL11.RLDA.RW_CA);
|
||||
var darHS = (this.regRLDA & PDP11.RL11.RLDA.SEEK_HS) << 2;
|
||||
if (this.regRLDA & PDP11.RL11.RLDA.SEEK_DIR) {
|
||||
case RL11.FUNC.SEEK:
|
||||
if ((this.regRLDA & RL11.RLDA.GS_CMD) == RL11.RLDA.SEEK_CMD) {
|
||||
var darCA = (this.regRLDA & RL11.RLDA.RW_CA);
|
||||
var darHS = (this.regRLDA & RL11.RLDA.SEEK_HS) << 2;
|
||||
if (this.regRLDA & RL11.RLDA.SEEK_DIR) {
|
||||
this.tmpRLDA += darCA;
|
||||
} else {
|
||||
this.tmpRLDA -= darCA;
|
||||
}
|
||||
this.regRLDA = this.tmpRLDA = (this.tmpRLDA & PDP11.RL11.RLDA.RW_CA) | darHS;
|
||||
this.regRLDA = this.tmpRLDA = (this.tmpRLDA & RL11.RLDA.RW_CA) | darHS;
|
||||
}
|
||||
break;
|
||||
|
||||
case PDP11.RL11.FUNC.RHDR:
|
||||
case RL11.FUNC.RHDR:
|
||||
this.regRLMP = this.tmpRLDA;
|
||||
break;
|
||||
|
||||
case PDP11.RL11.FUNC.RDATA:
|
||||
case RL11.FUNC.RDATA:
|
||||
sFunc = "READ";
|
||||
fnReadWrite = this.readData;
|
||||
/* falls through */
|
||||
|
||||
case PDP11.RL11.FUNC.WDATA:
|
||||
case RL11.FUNC.WDATA:
|
||||
if (!sFunc) sFunc = "WRITE";
|
||||
if (!fnReadWrite) fnReadWrite = this.writeData;
|
||||
|
||||
iCylinder = this.regRLDA >> PDP11.RL11.RLDA.SHIFT.RW_CA;
|
||||
iHead = (this.regRLDA & PDP11.RL11.RLDA.RW_HS)? 1 : 0;
|
||||
iSector = this.regRLDA & PDP11.RL11.RLDA.RW_SA;
|
||||
iCylinder = this.regRLDA >> RL11.RLDA.SHIFT.RW_CA;
|
||||
iHead = (this.regRLDA & RL11.RLDA.RW_HS)? 1 : 0;
|
||||
iSector = this.regRLDA & RL11.RLDA.RW_SA;
|
||||
if (!disk || iCylinder >= disk.nCylinders || iSector >= disk.nSectors) {
|
||||
this.regRLCS |= PDP11.RL11.ERRC.HNF | PDP11.RL11.RLCS.ERR;
|
||||
this.regRLCS |= RL11.ERRC.HNF | RL11.RLCS.ERR;
|
||||
break;
|
||||
}
|
||||
nWords = (0x10000 - this.regRLMP) & 0xffff;
|
||||
addr = (((this.regRLBE & PDP11.RL11.RLBE.MASK)) << 16) | this.regRLBA; // 22 bit mode
|
||||
addr = (((this.regRLBE & RL11.RLBE.MASK)) << 16) | this.regRLBA; // 22 bit mode
|
||||
|
||||
if (this.messageEnabled()) this.printMessage(this.type + ": " + sFunc + "(" + iCylinder + ":" + iHead + ":" + iSector + ") " + Str.toOct(addr) + "--" + Str.toOct(addr + (nWords << 1)), true, true);
|
||||
|
||||
|
|
@ -1026,8 +1026,8 @@ class RL11 extends Component {
|
|||
}
|
||||
|
||||
if (fInterrupt) {
|
||||
this.regRLCS |= PDP11.RL11.RLCS.DRDY | PDP11.RL11.RLCS.CRDY;
|
||||
if (this.regRLCS & PDP11.RL11.RLCS.IE) this.cpu.setIRQ(this.irq);
|
||||
this.regRLCS |= RL11.RLCS.DRDY | RL11.RLCS.CRDY;
|
||||
if (this.regRLCS & RL11.RLCS.IE) this.cpu.setIRQ(this.irq);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1052,7 +1052,7 @@ class RL11 extends Component {
|
|||
var sector = null, ibSector;
|
||||
|
||||
if (!disk) {
|
||||
err = PDP11.RL11.ERRC.HNF; // TODO: Review
|
||||
err = RL11.ERRC.HNF; // TODO: Review
|
||||
nWords = 0;
|
||||
}
|
||||
|
||||
|
|
@ -1061,14 +1061,14 @@ class RL11 extends Component {
|
|||
if (!sector) {
|
||||
sector = disk.seek(iCylinder, iHead, iSector + 1);
|
||||
if (!sector) {
|
||||
err = PDP11.RL11.ERRC.HNF;
|
||||
err = RL11.ERRC.HNF;
|
||||
break;
|
||||
}
|
||||
ibSector = 0;
|
||||
}
|
||||
var b0, b1, data;
|
||||
if ((b0 = disk.read(sector, ibSector++)) < 0 || (b1 = disk.read(sector, ibSector++)) < 0) {
|
||||
err = PDP11.RL11.ERRC.HNF;
|
||||
err = RL11.ERRC.HNF;
|
||||
break;
|
||||
}
|
||||
/*
|
||||
|
|
@ -1086,7 +1086,7 @@ class RL11 extends Component {
|
|||
}
|
||||
}
|
||||
if (this.bus.checkFault()) {
|
||||
err = PDP11.RL11.ERRC.NXM;
|
||||
err = RL11.ERRC.NXM;
|
||||
break;
|
||||
}
|
||||
addr += 2;
|
||||
|
|
@ -1099,7 +1099,7 @@ class RL11 extends Component {
|
|||
if (++iHead >= disk.nHeads) {
|
||||
iHead = 0;
|
||||
if (++iCylinder >= disk.nCylinders) {
|
||||
err = PDP11.RL11.ERRC.HNF;
|
||||
err = RL11.ERRC.HNF;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -1135,7 +1135,7 @@ class RL11 extends Component {
|
|||
var sector = null, ibSector;
|
||||
|
||||
if (!disk) {
|
||||
err = PDP11.RL11.ERRC.HNF; // TODO: Review
|
||||
err = RL11.ERRC.HNF; // TODO: Review
|
||||
nWords = 0;
|
||||
}
|
||||
|
||||
|
|
@ -1148,7 +1148,7 @@ class RL11 extends Component {
|
|||
*/
|
||||
var data = this.bus.getWordDirect(this.cpu.mapUnibus(addr));
|
||||
if (this.bus.checkFault()) {
|
||||
err = PDP11.RL11.ERRC.NXM;
|
||||
err = RL11.ERRC.NXM;
|
||||
break;
|
||||
}
|
||||
if (DEBUG && this.messageEnabled(MessagesPDP11.WRITE)) {
|
||||
|
|
@ -1165,13 +1165,13 @@ class RL11 extends Component {
|
|||
if (!sector) {
|
||||
sector = disk.seek(iCylinder, iHead, iSector + 1, true);
|
||||
if (!sector) {
|
||||
err = PDP11.RL11.ERRC.HNF;
|
||||
err = RL11.ERRC.HNF;
|
||||
break;
|
||||
}
|
||||
ibSector = 0;
|
||||
}
|
||||
if (!disk.write(sector, ibSector++, data & 0xff) || !disk.write(sector, ibSector++, data >> 8)) {
|
||||
err = PDP11.RL11.ERRC.HNF;
|
||||
err = RL11.ERRC.HNF;
|
||||
break;
|
||||
}
|
||||
if (ibSector >= disk.cbSector) {
|
||||
|
|
@ -1181,7 +1181,7 @@ class RL11 extends Component {
|
|||
if (++iHead >= disk.nHeads) {
|
||||
iHead = 0;
|
||||
if (++iCylinder >= disk.nCylinders) {
|
||||
err = PDP11.RL11.ERRC.HNF;
|
||||
err = RL11.ERRC.HNF;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -1211,13 +1211,13 @@ class RL11 extends Component {
|
|||
doneReadWrite(err, iCylinder, iHead, iSector, nWords, addr)
|
||||
{
|
||||
this.regRLBA = addr & 0xffff;
|
||||
this.regRLCS = (this.regRLCS & ~PDP11.RL11.RLCS.BAE) | ((addr >> (16 - PDP11.RL11.RLCS.SHIFT.BAE)) & PDP11.RL11.RLCS.BAE);
|
||||
this.regRLBE = (addr >> 16) & PDP11.RL11.RLBE.MASK; // 22 bit mode
|
||||
this.regRLDA = (iCylinder << PDP11.RL11.RLDA.SHIFT.RW_CA) | (iHead? PDP11.RL11.RLDA.RW_HS : 0) | (iSector & PDP11.RL11.RLDA.RW_SA);
|
||||
this.regRLCS = (this.regRLCS & ~RL11.RLCS.BAE) | ((addr >> (16 - RL11.RLCS.SHIFT.BAE)) & RL11.RLCS.BAE);
|
||||
this.regRLBE = (addr >> 16) & RL11.RLBE.MASK; // 22 bit mode
|
||||
this.regRLDA = (iCylinder << RL11.RLDA.SHIFT.RW_CA) | (iHead? RL11.RLDA.RW_HS : 0) | (iSector & RL11.RLDA.RW_SA);
|
||||
this.tmpRLDA = this.regRLDA;
|
||||
this.regRLMP = (0x10000 - nWords) & 0xffff;
|
||||
if (err) {
|
||||
this.regRLCS |= err | PDP11.RL11.RLCS.ERR;
|
||||
this.regRLCS |= err | RL11.RLCS.ERR;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
|
@ -1231,7 +1231,7 @@ class RL11 extends Component {
|
|||
*/
|
||||
readRLCS(addr)
|
||||
{
|
||||
return this.regRLCS & PDP11.RL11.RLCS.RMASK;
|
||||
return this.regRLCS & RL11.RLCS.RMASK;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1243,9 +1243,9 @@ class RL11 extends Component {
|
|||
*/
|
||||
writeRLCS(data, addr)
|
||||
{
|
||||
this.regRLCS = (this.regRLCS & ~PDP11.RL11.RLCS.WMASK) | (data & PDP11.RL11.RLCS.WMASK);
|
||||
this.regRLBE = (this.regRLBE & 0x3C) | ((data & PDP11.RL11.RLCS.BAE) >> PDP11.RL11.RLCS.SHIFT.BAE);
|
||||
if (!(this.regRLCS & PDP11.RL11.RLCS.CRDY)) this.processCommand();
|
||||
this.regRLCS = (this.regRLCS & ~RL11.RLCS.WMASK) | (data & RL11.RLCS.WMASK);
|
||||
this.regRLBE = (this.regRLBE & 0x3C) | ((data & RL11.RLCS.BAE) >> RL11.RLCS.SHIFT.BAE);
|
||||
if (!(this.regRLCS & RL11.RLCS.CRDY)) this.processCommand();
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1269,7 +1269,7 @@ class RL11 extends Component {
|
|||
*/
|
||||
writeRLBA(data, addr)
|
||||
{
|
||||
this.regRLBA = data & PDP11.RL11.RLBA.WMASK;
|
||||
this.regRLBA = data & RL11.RLBA.WMASK;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1347,8 +1347,8 @@ class RL11 extends Component {
|
|||
*/
|
||||
writeRLBE(data, addr)
|
||||
{
|
||||
this.regRLBE = data & PDP11.RL11.RLBE.MASK;
|
||||
this.regRLCS = (this.regRLCS & ~PDP11.RL11.RLCS.BAE) | ((this.regRLBE & 0x3) << PDP11.RL11.RLCS.SHIFT.BAE);
|
||||
this.regRLBE = data & RL11.RLBE.MASK;
|
||||
this.regRLCS = (this.regRLCS & ~RL11.RLCS.BAE) | ((this.regRLBE & 0x3) << RL11.RLCS.SHIFT.BAE);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1361,6 +1361,19 @@ RL11.SOURCE = {
|
|||
REMOTE: "??"
|
||||
};
|
||||
|
||||
/*
|
||||
* Alias RL11 definitions as class constants
|
||||
*/
|
||||
RL11.PRI = PDP11.RL11.PRI;
|
||||
RL11.VEC = PDP11.RL11.VEC;
|
||||
RL11.RLCS = PDP11.RL11.RLCS; // 174400: Control Status Register
|
||||
RL11.RLBA = PDP11.RL11.RLBA; // 174402: Bus Address Register
|
||||
RL11.RLDA = PDP11.RL11.RLDA; // 174404: Disk Address Register
|
||||
RL11.RLMP = PDP11.RL11.RLMP; // 177406: Multi-Purpose Register
|
||||
RL11.RLBE = PDP11.RL11.RLBE; // 174410: Bus (Address) Extension Register
|
||||
RL11.ERRC = PDP11.RL11.ERRC; // NOTE: These error codes are pre-shifted to read/write directly from/to RLCS.ERRC
|
||||
RL11.FUNC = PDP11.RL11.FUNC; // NOTE: These function codes are pre-shifted to read/write directly from/to RLCS.FUNC
|
||||
|
||||
/*
|
||||
* ES6 ALERT: As you can see below, I've finally started using computed property names.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in a new issue