Added RL11 bootstrap info

This commit is contained in:
Jeff Parsons 2017-02-06 15:32:09 -08:00 committed by Jeff Parsons
commit cd5dbd5c14
6 changed files with 125 additions and 28 deletions

View file

@ -52,3 +52,100 @@ used to control the device, such as choosing which disks should be "auto-mounted
</control>
</device>
```
Loading the RL11 Bootstrap
--------------------------
From the [RT-11 v4.0 Installation Manual (March 1981)](/pubs/dec/pdp11/rt11/), p. E-6:
Deposit the basic RL01/RL02 disk bootstrap loader in memory as follows:
1. Set the ENABLE/HALT switch to HALT.
2. Set the first address, 001000, in the switch register (see Table E-7).
3. Press the LOAD ADDR switch.
4. Set the contents for the first address (from Table E-7) in the switch register.
5. Lift the DEP switch. The computer automatically advances to the next address.
6. Set the contents for the next address (from Table E-7) in the switch register.
7. Lift the DEP switch.
8. Repeat steps 6 and 7 until you have deposited all the instructions.
Now verify that you deposited the bootstrap program properly.
1. Set the first address, 001000, in the switch register.
2. Press the LOAD ADDR switch.
3. Press the EXAM switch to display the contents of that address in the data register.
4. Compare the number in the data register with the value for that address in Table E-7.
5. If the values are the same, press EXAM again to display the contents of the next address. If the values
are not the same, repeat the entire
Table E-7: RL01/RL02 Bootstrap Loader
-------------------------------------
Location Contents
001000 012701
001002 174400
001004 012761
001006 000013
001010 000004
001012 012711
001014 000004
001016 105711
001020 100376
001022 005061
001024 000002
001026 005061
001030 000004
001032 012761
001034 177400
001036 000006
001040 012711
001042 000014
001044 105711
001046 100376
001050 005007
Loading the RL11 Bootstrap Loader
----------------------------------
Any PDP-11 machine using built-in PCjs Debugger makes it easy to enter the bootstrap code above. Paste
the following commands into the Debugger's command buffer:
ew 1000 012701 174400 012761 000013 000004 012711 000004 105711 100376 005061;
ew 1024 000002 005061 000004 012761 177400 000006 012711 000014 105711 100376 005007;
r pc 1000
You can then review (eg, disassemble) the bootstrap code:
>> u 1000 1052
001000: 012701 174400 MOV #174400,R1
001004: 012761 000013 000004 MOV #13,4(R1)
001012: 012711 000004 MOV #4,@R1 ;RLCS
001016: 105711 TSTB @R1 ;RLCS
001020: 100376 BPL 001016
001022: 005061 000002 CLR 2(R1)
001026: 005061 000004 CLR 4(R1)
001032: 012761 177400 000006 MOV #177400,6(R1)
001040: 012711 000014 MOV #14,@R1 ;RLCS
001044: 105711 TSTB @R1 ;RLCS
001046: 100376 BPL 001044
001050: 005007 CLR PC
Last but not least, make sure you have successfully loaded an RL01 or RL02 disk image into drive RL0. Then execute the
bootstrap code with the Debugger's "g" command.
Of course, if the machine also includes the RL11 Boot control, then all you *really* need to is select an
RL01 or RL02 disk, click "Load", wait for the diskette image to be successfully loaded (i.e., downloaded) and then click
"Boot".

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@ -68,7 +68,7 @@ used to control the device, such as choosing which disks should be "auto-mounted
Loading the RX11 Bootstrap
--------------------------
From the [RT-11 v4.0 Installation Manual (March 1981)](/pubs/dec/pdp11/rt11/), p. E-9:
From the [RT-11 v4.0 Installation Manual (March 1981)](/pubs/dec/pdp11/rt11/), p. E-3:
The procedure to deposit the RX11 disk bootstrap loader in memory depends on the type of processor you have.
If your computer is a PDP-11V/03, PDP-11/03, or LSI-11, see the PDP-11/03 user's manual for instructions.
@ -114,7 +114,7 @@ From the [RT-11 v4.0 Installation Manual (March 1981)](/pubs/dec/pdp11/rt11/), p
4. Press the START switch.
Table E-3: RX-11 Bootstrap Loader
Table E-3: RX11 Bootstrap Loader
---------------------------------
Location Contents
@ -138,7 +138,7 @@ Table E-3: RX-11 Bootstrap Loader
001040 005000
001042 000110
Loading the RX-11 Bootstrap Loader
Loading the RX11 Bootstrap Loader
----------------------------------
Any PDP-11 machine using built-in PCjs Debugger makes it easy to enter the bootstrap code above. Paste

View file

@ -506,7 +506,7 @@ class CPUStatePDP11 extends CPUPDP11 {
* If updates to MMR1 have not been shut off (ie, MMR0.ABORT bits are clear), then we are allowed
* to sync MMR1 with its real-time counterpart in opLast.
*/
if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
if ((this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.ENABLED)) == PDP11.MMR0.ENABLED) {
this.regMMR1 = (this.opLast >> 16) & 0xffff;
}
var result = this.regMMR1;
@ -528,7 +528,7 @@ class CPUStatePDP11 extends CPUPDP11 {
* If updates to MMR2 have not been shut off (ie, MMR0.ABORT bits are clear), then we are allowed
* to sync MMR2 with its real-time counterpart in opLast.
*/
if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
if ((this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.ENABLED)) == PDP11.MMR0.ENABLED) {
this.regMMR2 = this.opLast & 0xffff;
}
return this.regMMR2;

View file

@ -775,19 +775,19 @@ var PDP11 = {
DRIVES: 4, // maximum of 4 drives
PREFIX: "DY",
RLCS: { // 174400: Control Status Register
DRDY: 0x0001, // Drive Ready (R/O)
FUNC: 0x000E, // Function Code (F2,F1,F0) (R/W)
BAE: 0x0030, // Bus Address Extension bits (BA17,BA16) (R/W)
IE: 0x0040, // Interrupt Enable (R/W)
CRDY: 0x0080, // Controller Ready (R/W)
DS: 0x0300, // Drive Select (DS1,DS0) (R/W)
ERRC: 0x3C00, // Error Code (R/O)
DE: 0x4000, // Drive Error (R/O)
ERR: 0x8000, // Composite Error (R/O)
CLEAR: 0x3F7E, // bits cleared on INIT (bits 1-6 and 8-13 are cleared)
SET: 0x0080, // bits set on INIT (bit 7 is set)
RMASK: 0xFFFF, // no write-only bits
WMASK: 0x03FE, // bits writable
DRDY: 0x0001, // (000001) Drive Ready (R/O)
FUNC: 0x000E, // (000016) Function Code (F2,F1,F0) (R/W)
BAE: 0x0030, // (000060) Bus Address Extension bits (BA17,BA16) (R/W)
IE: 0x0040, // (000100) Interrupt Enable (R/W)
CRDY: 0x0080, // (000200) Controller Ready (R/W)
DS: 0x0300, // (001400) Drive Select (DS1,DS0) (R/W)
ERRC: 0x3C00, // (036000) Error Code (R/O)
DE: 0x4000, // (040000) Drive Error (R/O)
ERR: 0x8000, // (100000) Composite Error (R/O)
CLEAR: 0x3F7E, // (037576) bits cleared on INIT (bits 1-6 and 8-13 are cleared)
SET: 0x0080, // (000200) bits set on INIT (bit 7 is set)
RMASK: 0xFFFF, // (177777) no write-only bits
WMASK: 0x03FE, // (001776) bits writable
SHIFT: {
FUNC: 1,
BAE: 4,
@ -857,14 +857,14 @@ var PDP11 = {
MPE: 0x2400 // Memory Parity Error (RLV12 only)
},
FUNC: { // NOTE: These function codes are pre-shifted to read/write directly from/to RLCS.FUNC
NOP: 0b0000, // No-Op
WCHK: 0b0010, // Write Check
STATUS: 0b0100, // Get Status
SEEK: 0b0110, // Seek
RHDR: 0b1000, // Read Header
WDATA: 0b1010, // Write Data
RDATA: 0b1100, // Read Data
RDNC: 0b1110 // Read Data without Header Check
NOP: 0b0000, // (00) No-Op
WCHK: 0b0010, // (02) Write Check
STATUS: 0b0100, // (04) Get Status
SEEK: 0b0110, // (06) Seek
RHDR: 0b1000, // (10) Read Header
WDATA: 0b1010, // (12) Write Data
RDATA: 0b1100, // (14) Read Data
RDNC: 0b1110 // (16) Read Data without Header Check
}
},
RX11: { // RX11 Disk Controller

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View file

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