Some cleanup involving invalid addresses
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019ce280f6
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7 changed files with 124 additions and 82 deletions
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@ -901,7 +901,7 @@ X86CPU.prototype.resetRegs = function()
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* The next few initializations mirror what we must do prior to each instruction (ie, inside the stepCPU() function);
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* note that opPrefixes, along with segData and segStack, are reset only after we've executed a non-prefix instruction.
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*/
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this.regEA = this.regEAWrite = -1;
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this.regEA = this.regEAWrite = X86.ADDR_INVALID;
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this.segData = this.segDS;
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this.segStack = this.segSS;
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this.opFlags = this.opPrefixes = 0;
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@ -1295,8 +1295,8 @@ X86CPU.prototype.setIP = function(off)
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* never set without an accompanying IP (well, except for a few undocumented instructions, like POP CS, which
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* were available ONLY on the 8086/8088/80186/80188; see setCS() for details).
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*
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* NOTE: Unlike setIP(), which is often passed a computation, the offsets passed to setCSIP() are strictly
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* 16-bit values, so there's never any need to mask them with 0xffff (although it doesn't hurt to assert that).
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* NOTE: Unlike setIP(), which is often passed a computation, the offsets passed to setCSIP() are assumed to
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* be 16-bit values, so there's no need to mask them with 0xffff (although it doesn't hurt to assert that).
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*
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* And even though this function is called setCSIP(), please note the order of the parameters is IP,CS,
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* which matches the order that CS:IP values are normally stored in memory, allowing us to make calls like this:
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@ -1306,8 +1306,8 @@ X86CPU.prototype.setIP = function(off)
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* @this {X86CPU}
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* @param {number} off
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* @param {number} sel
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* @param {boolean} [fCall] is true if CALLF in progress, false if RETF in progress, null/undefined otherwise
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* @return {boolean|null} true if a stack switch occurred; the only opcode that really needs to care is opRETFn()
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* @param {boolean} [fCall] is true if CALLF in progress, false if RETF/IRET in progress, null/undefined otherwise
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* @return {boolean|null} true if a stack switch occurred; the only opcode that really needs to pay attention is opRETFn()
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*/
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X86CPU.prototype.setCSIP = function(off, sel, fCall)
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{
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@ -1319,12 +1319,12 @@ X86CPU.prototype.setCSIP = function(off, sel, fCall)
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*/
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this.regIP = off;
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var base = this.segCS.load(sel);
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if (base == null) {
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return null;
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if (base != X86.ADDR_INVALID) {
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this.regEIP = base + this.regIP;
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if (PREFETCH) this.flushPrefetch(this.regEIP);
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return this.segCS.fStackSwitch;
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}
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this.regEIP = base + this.regIP;
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if (PREFETCH) this.flushPrefetch(this.regEIP);
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return this.segCS.fStackSwitch;
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return null;
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};
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/**
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@ -2510,7 +2510,7 @@ X86CPU.prototype.stepCPU = function(nMinCycles)
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this.opPrefixes |= opPrefixes;
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} else {
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this.opEA = this.regEIP;
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this.regEA = this.regEAWrite = -1;
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this.regEA = this.regEAWrite = X86.ADDR_INVALID;
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this.segData = this.segDS;
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this.segStack = this.segSS;
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this.opPrefixes = this.opFlags & X86.OPFLAG.REPEAT;
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