Added the ability to install external ROMs (eg, M9312 ROM images) into the IOPAGE
This commit is contained in:
parent
0cf11c0b01
commit
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25 changed files with 1143 additions and 346 deletions
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@ -60,12 +60,12 @@ screensaver-related mods to the ROM.
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Finally, I verified that reassembling [VT100.asm](VT100.asm) with [asm8080](https://github.com/begoon/asm8080) produced the
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original VT100.bin; after adding the correct number of `nop` instructions to the end to the source file, the binaries matched.
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The other advantage of reassembling the code is that the resulting [VT100.lst](VT100.lst) makes it easy to export comments
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The other advantage of reassembling the code is that the resulting [VT100.txt](VT100.txt) makes it easy to export comments
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and other symbolic information to [VT100.map](VT100.map), which can then be included in the [VT100.json](VT100.json) ROM dump
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and passed on to the PC8080 Debugger. Here are the rebuild steps:
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asm8080 -lVT100.lst VT100.asm
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grep -E "[0-9]+ [0-9A-D]+.*;;" VT100.lst | sed -E "s/ *[0-9]+ ([0-9A-F]+).*;(;.*)/ \1 . \2/" > VT100.map
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asm8080 -lVT100.txt VT100.asm
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grep -E "[0-9]+ [0-9A-D]+.*;;" VT100.txt | sed -E "s/ *[0-9]+ ([0-9A-F]+).*;(;.*)/ \1 . \2/" > VT100.map
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filedump --file=VT100.bin --format=bytes --output=VT100.json --comments --overwrite
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You can omit `--comments` from the filedump command to reduce the size of the [VT100.json](VT100.json) file.
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@ -10,3 +10,83 @@ machines:
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{% include machine.html id="test1170" %}
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This machine is also available with our built-in [Debugger](debugger/).
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Front Panel Basics
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------------------
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From the [PDP-11/70 Handbook (1979)](http://archive.pcjs.org/pubs/dec/pdp11/1170/PDP1170_Handbook_1979.pdf), Chapter 10, p. 325:
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> ### CONSOLE OPERATION
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> The PDP-11/70 console allows direct control of the computer system. It contains a power switch for the CPU,
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which is also usually used as the Master Switch for the system. The console is used for starting, stopping, resetting,
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and debugging. Lights and switches provide the facilities for monitoring operation, system control, and maintenance.
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Debugging and detailed tracing of operations can be accomplished by having the computer execute single instructions or
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single cycles. Contents of all locations can be examined, and data can be entered manually from the console switches.
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The PDPjs Front Panel replicates most (but not all) the features of a real PDP-11/70 Front Panel. The switches, which
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PDPjs displays as green to make them stand out from the rest of the pink-and-magenta controls, are summarized below.
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### 0-21
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These control bits 0 to 21 of the SWITCH register. The UP position represents a ONE, and the DOWN position
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represents a ZERO. Once all the bits have been set, you can choose to load the contents of the SWITCH register into the
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ADDRESS register (as displayed by the top row of LEDs), or directly into the memory location referenced by the ADDRESS
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register (where it will become the DATA displayed by the second row of LEDs).
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The SWITCH, ADDRESS, and DATA (aka DISPLAY) registers are all internal to the Front Panel hardware, and should not be
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confused with CPU registers.
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### TEST
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This is a momentary switch that is normally in the DOWN position. When held in the UP position, it turns on all LEDs.
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This "lamp test" was more important in the days when the lights were produced by bulbs with filaments that could burn out,
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and if you didn't realize that a particular light was "burned out", you could mistake it for a zero.
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While the TEST switch is more "cute" than useful on a virtual Front Panel, we have added one "innovation" to the switch:
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pressing it also returns all the SWITCH register switches (0-21) to their DOWN position.
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### LOAD
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This is a momentary switch that is normally in the UP position. When pressed DOWN, it copies the SWITCH register to the
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ADDRESS register.
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### EXAM
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This is a momentary switch that is normally in the UP position. When pressed DOWN, it reads the memory location referenced
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by the ADDRESS register and displays it in the DATA register. If pressed repeatedly, each repetition also automatically
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adds 2 to the ADDRESS register, making it easier to examine a series of words. Note that if the CPU registers are being
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examined (starting at address 177700), the ADDRESS register will advance by 1 instead of 2.
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Another "innovation" unique to PDPjs: if the STEP switch is toggled from the UP to the DOWN position, repeated EXAM operations
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will decrease the ADDRESS register instead of increasing it.
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### DEP
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This is a momentary switch that is normally in the DOWN position. When pressed UP, it writes the contents of the SWITCH
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register to the memory location referenced by the ADDRESS register, and displays the result in the DATA register. Like the
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EXAM switch, if DEP is pressed repeatedly, each repetition also automatically adds 2 to the ADDRESS register, making it easier
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to deposit the same value to a series of words.
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### CONT
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This is a momentary switch that is normally in the UP position. When pressed DOWN, it will start the CPU if it's currently
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halted. If the CPU is already running, CONT has no effect. Also, if the ENABLE/HALT switch is in the DOWN (HALT) position,
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then the CPU will continue for only ONE instruction and then stop again.
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### ENABLE/HALT
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This switch is a toggle that is normally in the UP (ENABLE) position. If it pressed DOWN while the CPU is running, the CPU will
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stop. Once the CPU is stopped, this switch has no effect, other than determining what CONT will do when pressed.
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### STEP
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On a real PDP-11, this would select between cycle-stepping vs. instruction-stepping. Since PDPjs doesn't support cycle-stepping,
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this switch has no effect (except as described above when the EXAM or DEP switches are pressed repeatedly).
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### START
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The START switch is similar to CONT, but it also performs the equivalent a RESET instruction before starting the CPU, so
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unless you're starting execution at the beginning of a program, using START instead of CONT to continue execution is probably
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not a good idea. Also, if the ENABLE/HALT switch is in the DOWN (HALT) position, START will still reset the machine but not
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execute anything.
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@ -10,11 +10,19 @@ machines:
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{% include machine.html id="test1170" %}
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Other interesting things to know about this machine:
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* It includes an [M9312 ROM](/devices/pdp11/rom/M9312/) at address 165000. The exact ROM is [23-616F1](/devices/pdp11/rom/M9312/23-616F1.txt).
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Toggle-Ins
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----------
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As DEC notes in the [PDP-11/70 Maintenance Service Guide](http://archive.pcjs.org/pubs/dec/pdp11/1170/PDP1170_Maintenance_Service_Guide_Apr88.pdf),
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Chapter 4: "There are several useful toggle-ins that are probably not very well known." Excerpts are provided below.
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Chapter 4: "There are several useful toggle-ins that are probably not very well known." Excerpts are provided below. If you're
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not sure how "toggle in" code using a Front Panel, check out [Front Panel Basics](/devices/pdp11/machine/1170/panel/#front-panel-basics).
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However, since the above machine also includes the PDPjs Debugger, you'll find that it's much easier to use the Debugger commands
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described below to load and execute these "toggle-ins".
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### Memory Management
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@ -186,7 +194,7 @@ If you also want to see all the hardware register activity, use the Debugger's "
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17772262 021311 CMP (R3),(R1) ; Top of Memory?
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17772264 003402 BLE 2$
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17772266 005000 CLR R0 ; Start at Virtual Address 0
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17772270 000766 BR 1$ ; [NOTE: DEC's guide incorrecly lists this opcode as 000776 --@jeffpar]
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17772270 000766 BR 1$ ; [NOTE: DEC's guide incorrecly lists this opcode as 000776 --JP]
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17772272 005312 2$: DEC (R2) ; Disable Relocation
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17772274 000000 HLT
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@ -310,8 +318,8 @@ As the **Maintenance Service Guide** goes on to say:
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Before running the above code, you should turn Bus messages off (ie, "m bus off"); otherwise, the quantity of messages will
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slow execution to a crawl.
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If you want to set an execution breakpoint in the above code, make sure you use the appropriate virtual (16-bit) address,
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not one of the physical (22-bit) addresses shown above. For example, to break on this instruction:
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If you want to set an execution breakpoint in the above code, make sure you use the appropriate virtual (16-bit) address.
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For example, to break on this instruction:
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17772256 062711 ADD #200,(R1) ; Step Page
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@ -5,6 +5,7 @@
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<computer id="computer" busWidth="22"/>
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<cpu id="cpu" model="1170" cycles="6666667"/>
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<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/PDPJSMON.json"/>
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<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>
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<device id="default" type="default"/>
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<serial id="dl11" adapter="0" binding="print" upperCase="true"/>
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<panel ref="/devices/pdp11/panel/1170/debugger/front.xml"/>
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@ -5,6 +5,7 @@
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<computer id="computer" busWidth="22"/>
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<cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/>
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<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/PDPJSMON.json"/>
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<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>
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<device id="default" type="default"/>
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<serial id="dl11" adapter="0" binding="print" upperCase="true"/>
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<panel ref="/devices/pdp11/panel/1170/front.xml"/>
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35
devices/pdp11/rom/M9312/23-616F1.json
Normal file
35
devices/pdp11/rom/M9312/23-616F1.json
Normal file
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@ -0,0 +1,35 @@
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{"load":0xEA00/*165000*/,"exec":0xEA00/*165000*/,
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"words":[
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0x101F/*010037*/,0x01C0/*000700*/,0x105F/*010137*/,0x01C2/*000702*/,0x111F/*010437*/,0x01C4/*000704*/,0x0A1F/*005037*/,0x01C6/*000706*/,
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0x55DF/*052737*/,0x8000/*100000*/,0xFFFE/*177776*/,0x35DF/*032737*/,0x4000/*040000*/,0xFFFE/*177776*/,0x0302/*001402*/,0x0A9F/*005237*/,
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0x01C6/*000706*/,0x0A1F/*005037*/,0xFFFE/*177776*/,0x0101/*000401*/,0x0000/*000000*/,0x0A06/*005006*/,0x8104/*100404*/,0x8503/*102403*/,
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0x8202/*101002*/,0x0501/*002401*/,0x8301/*101401*/,0x0000/*000000*/,0x0AC6/*005306*/,0x8003/*100003*/,0x0302/*001402*/,0x0401/*002001*/,
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0x0701/*003401*/,0x0000/*000000*/,0x0C06/*006006*/,0x8402/*102002*/,0x8601/*103001*/,0x0201/*001001*/,0x0000/*000000*/,0x15C6/*012706*/,
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0xAAAA/*125252*/,0x1180/*010600*/,0x1001/*010001*/,0x1042/*010102*/,0x1083/*010203*/,0x10C4/*010304*/,0x1105/*010405*/,0xE141/*160501*/,
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0x0501/*002401*/,0x0301/*001401*/,0x0000/*000000*/,0x0C42/*006102*/,0x8601/*103001*/,0x0501/*002401*/,0x0000/*000000*/,0x6083/*060203*/,
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0x0A83/*005203*/,0x0A43/*005103*/,0x60C1/*060301*/,0x8701/*103401*/,0x0701/*003401*/,0x0000/*000000*/,0x0C04/*006004*/,0x5103/*050403*/,
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0x6143/*060503*/,0x0A83/*005203*/,0x8702/*103402*/,0x0AC1/*005301*/,0x0501/*002401*/,0x0000/*000000*/,0x0A40/*005100*/,0x8301/*101401*/,
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0x0000/*000000*/,0x4001/*040001*/,0x6041/*060101*/,0x0601/*003001*/,0x0701/*003401*/,0x0000/*000000*/,0x00C1/*000301*/,0x2057/*020127*/,
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0x5455/*052125*/,0x0204/*001004*/,0x3105/*030405*/,0x0602/*003002*/,0x0A45/*005105*/,0x0201/*001001*/,0x0000/*000000*/,0x95C0/*112700*/,
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0xFF01/*177401*/,0x8001/*100001*/,0x0000/*000000*/,0x7E02/*077002*/,0x0A01/*005001*/,0x0A81/*005201*/,0x7E02/*077002*/,0x0BC0/*005700*/,
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0x0202/*001002*/,0x0BC1/*005701*/,0x0301/*001401*/,0x0000/*000000*/,0x15C6/*012706*/,0x01FE/*000776*/,0x09F7/*004767*/,0x0002/*000002*/,
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0x0000/*000000*/,0x25CE/*022716*/,0xEAD0/*165320*/,0x0301/*001401*/,0x0000/*000000*/,0x15CE/*012716*/,0xEAE2/*165342*/,0x0087/*000207*/,
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0x0000/*000000*/,0x0A26/*005046*/,0x15E6/*012746*/,0xEAEC/*165354*/,0x0002/*000002*/,0x0000/*000000*/,0x005F/*000137*/,0xEAF2/*165362*/,
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0x0000/*000000*/,0x15C5/*012705*/,0xE000/*160000*/,0x0A1F/*005037*/,0x0006/*000006*/,0x15DF/*012737*/,0xEB00/*165400*/,0x0004/*000004*/,
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0x15C6/*012706*/,0x01FE/*000776*/,0x0BE5/*005745*/,0x15DF/*012737*/,0xEBCC/*165714*/,0x004C/*000114*/,0x0A1F/*005037*/,0x004E/*000116*/,
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0x15C3/*012703*/,0xFFE6/*177746*/,0x15CB/*012713*/,0x000C/*000014*/,0x15C2/*012702*/,0x0200/*001000*/,0x1080/*010200*/,0x1008/*010010*/,
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0x0BD0/*005720*/,0x2005/*020005*/,0x83FC/*101774*/,0x1080/*010200*/,0x1201/*011001*/,0x2001/*020001*/,0x0301/*001401*/,0x0000/*000000*/,
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0x0A50/*005120*/,0x2005/*020005*/,0x83F9/*101771*/,0x1801/*014001*/,0x0A41/*005101*/,0x2001/*020001*/,0x0301/*001401*/,0x0000/*000000*/,
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0x2002/*020002*/,0x02F9/*001371*/,0x0A0E/*005016*/,0x15C4/*012704*/,0xAAAA/*125252*/,0x15CB/*012713*/,0x0018/*000030*/,0x15C0/*012700*/,
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0x0800/*004000*/,0x15C2/*012702*/,0x0200/*001000*/,0x0A44/*005104*/,0x1108/*010410*/,0x0A48/*005110*/,0x0A48/*005110*/,0x2204/*021004*/,
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0x0301/*001401*/,0x0000/*000000*/,0x0C1F/*006037*/,0xFFEA/*177752*/,0x8702/*103402*/,0x0000/*000000*/,0x0131/*000461*/,0x8A4E/*105116*/,
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0x02F2/*001362*/,0x0102/*000402*/,0x0077/*000167*/,0xFE88/*177210*/,0x0BD0/*005720*/,0x7E93/*077223*/,0x15CB/*012713*/,0x0024/*000044*/,
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0x15C0/*012700*/,0x0C00/*006000*/,0x8A76/*105166*/,0x0001/*000001*/,0x02E4/*001344*/,0x15C2/*012702*/,0x0200/*001000*/,0x1080/*010200*/,
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0x1008/*010010*/,0x0BD0/*005720*/,0x2005/*020005*/,0x83FC/*101774*/,0x15C1/*012701*/,0x0003/*000003*/,0x0A0E/*005016*/,0x0BDF/*005737*/,
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0x01C6/*000706*/,0x0210/*001020*/,0x15CE/*012716*/,0x0018/*000030*/,0x1080/*010200*/,0x0A48/*005110*/,0x0A48/*005110*/,0x2008/*020010*/,
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0x0301/*001401*/,0x0000/*000000*/,0x0BD0/*005720*/,0x0C1F/*006037*/,0xFFEA/*177752*/,0x8702/*103402*/,0x0000/*000000*/,0x0108/*000410*/,
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0x2005/*020005*/,0x83F3/*101763*/,0x138B/*011613*/,0x0A0E/*005016*/,0x7E51/*077121*/,0x0104/*000404*/,0x0000/*000000*/,0x0102/*000402*/,
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0x15CB/*012713*/,0x000C/*000014*/,0x17C0/*013700*/,0x01C0/*000700*/,0x17C1/*013701*/,0x01C2/*000702*/,0x17C4/*013704*/,0x01C4/*000704*/,
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0x0074/*000164*/,0x0002/*000002*/,0x17C4/*013704*/,0xFF78/*177570*/,0x45C4/*042704*/,0xFE00/*177000*/,0x55C4/*052704*/,0xF600/*173000*/,
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0x97C0/*113700*/,0xFF79/*177571*/,0x0C80/*006200*/,0x00A1/*000241*/,0x004C/*000114*/,0x0000/*000000*/,0x4230/*041060*/,0x2A2D/*025055*/]
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}
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259
devices/pdp11/rom/M9312/23-616F1.mac
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259
devices/pdp11/rom/M9312/23-616F1.mac
Normal file
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@ -0,0 +1,259 @@
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.title M9312 11/60-70 Diagnostic/Console ROM
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; This source code is an exact copy of the DEC M9312 23-616F1 console PROM.
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;
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; This console/diagnostic PROM is for 11/60-70 CPUs.
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;
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; Standard devices are 82S137, 74S573 or other compatible bipolar PROMs
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; with a 1024x4 TriState 18pin DIP architecture.
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.asect
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.=165000
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base =.
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START: mov r0,@#700 ;
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mov r1,@#702 ;
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mov r4,@#704 ;
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clr @#706 ;
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.=base+20
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DIAG: bis #100000,@#177776 ;
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bit #040000,@#177776 ;
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beq L1 ;
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inc @#706 ;
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L1: clr @#177776 ;
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br L2 ;
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halt ;
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L2: clr sp ;
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bmi L3 ;
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bvs L3 ;
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bhi L3 ;
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blt L3 ;
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blos L4 ;
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L3: halt ;
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L4: dec sp ;
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bpl L5 ;
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beq L5 ;
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bge L5 ;
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ble L6 ;
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L5: halt ;
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L6: ror sp ;
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bvc L7 ;
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bcc L7 ;
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bne L8 ;
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L7: halt ;
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L8: mov #125252,sp ;
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mov sp,r0 ;
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mov r0,r1 ;
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mov r1,r2 ;
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mov r2,r3 ;
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mov r3,r4 ;
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mov r4,r5 ;
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sub r5,r1 ;
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blt NODIAG ;
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beq L9 ;
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.=base+144
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NODIAG: halt ;
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L9: rol r2 ;
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bcc L10 ;
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blt L11 ;
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L10: halt ;
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L11: add r2,r3 ;
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inc r3 ;
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com r3 ;
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add r3,r1 ;
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bcs L12 ;
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ble L13 ;
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L12: halt ;
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L13: ror r4 ;
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bis r4,r3 ;
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add r5,r3 ;
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inc r3 ;
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bcs L14 ;
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dec r1 ;
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blt L15 ;
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L14: halt ;
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L15: com r0 ;
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blos L16 ;
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halt ;
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L16: bic r0,r1 ;
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add r1,r1 ;
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bgt L17 ;
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ble L18 ;
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L17: halt ;
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L18: swab r1 ;
|
||||
cmp r1,#052125 ;
|
||||
bne L19 ;
|
||||
bit r4,r5 ;
|
||||
bgt L19 ;
|
||||
com r5 ;
|
||||
bne L20 ;
|
||||
L19: halt ;
|
||||
|
||||
L20: movb #177401,r0 ;
|
||||
bpl L21 ;
|
||||
L22: halt ;
|
||||
|
||||
L21: sob r0,L22 ;
|
||||
clr r1 ;
|
||||
L23: inc r1 ;
|
||||
sob r0,L23 ;
|
||||
tst r0 ;
|
||||
bne L24 ;
|
||||
tst r1 ;
|
||||
beq L25 ;
|
||||
L24: halt ;
|
||||
|
||||
L25: mov #776,sp ;
|
||||
jsr pc,L26 ;
|
||||
N2: halt ;
|
||||
|
||||
L26: cmp #N2,(sp) ;
|
||||
beq L27 ;
|
||||
halt ;
|
||||
|
||||
L27: mov #N3,(sp) ;
|
||||
rts pc ;
|
||||
halt ;
|
||||
|
||||
N3: clr -(sp) ;
|
||||
mov #N4,-(sp) ;
|
||||
rti ;
|
||||
halt ;
|
||||
|
||||
N4: jmp @#N5 ;
|
||||
halt ;
|
||||
|
||||
N5: mov #160000,r5 ;
|
||||
clr @#6 ;
|
||||
mov #N6,@#4 ;
|
||||
N6: mov #776,sp ;
|
||||
tst -(r5) ;
|
||||
mov #N12,@#114 ;
|
||||
clr @#116 ;
|
||||
mov #177746,r3 ;
|
||||
mov #14,(r3) ;
|
||||
mov #1000,r2 ;
|
||||
mov r2,r0 ;
|
||||
L28: mov r0,(r0) ;
|
||||
tst (r0)+ ;
|
||||
cmp r0,r5 ;
|
||||
blos L28 ;
|
||||
mov r2,r0 ;
|
||||
L30: mov (r0),r1 ;
|
||||
cmp r0,r1 ;
|
||||
beq L29 ;
|
||||
halt ;
|
||||
|
||||
L29: com (r0)+ ;
|
||||
cmp r0,r5 ;
|
||||
blos L30 ;
|
||||
L32: mov -(r0),r1 ;
|
||||
com r1 ;
|
||||
cmp r0,r1 ;
|
||||
beq L31 ;
|
||||
halt ;
|
||||
|
||||
L31: cmp r0,r2 ;
|
||||
bne L32 ;
|
||||
clr (sp) ;
|
||||
mov #125252,r4 ;
|
||||
mov #30,(r3) ;
|
||||
mov #4000,r0 ;
|
||||
L39: mov #1000,r2 ;
|
||||
L36: com r4 ;
|
||||
mov r4,(r0) ;
|
||||
com (r0) ;
|
||||
com (r0) ;
|
||||
cmp (r0),r4 ;
|
||||
beq L33 ;
|
||||
halt ;
|
||||
|
||||
L33: ror @#177752 ;
|
||||
bcs L34 ;
|
||||
halt ;
|
||||
br L35 ;
|
||||
|
||||
L34: comb (sp) ;
|
||||
bne L36 ;
|
||||
br L37 ;
|
||||
|
||||
.=base+564
|
||||
RESTRT: jmp START ;
|
||||
|
||||
L37: tst (r0)+ ;
|
||||
sob r2,L36 ;
|
||||
mov #44,(r3) ;
|
||||
mov #6000,r0 ;
|
||||
comb 1(sp) ;
|
||||
bne L39 ;
|
||||
mov #1000,r2 ;
|
||||
mov r2,r0 ;
|
||||
L40: mov r0,(r0) ;
|
||||
tst (r0)+ ;
|
||||
cmp r0,r5 ;
|
||||
blos L40 ;
|
||||
mov #3,r1 ;
|
||||
clr (sp) ;
|
||||
tst @#706 ;
|
||||
bne L41 ;
|
||||
mov #30,(sp) ;
|
||||
L45: mov r2,r0 ;
|
||||
L44: com (r0) ;
|
||||
com (r0) ;
|
||||
cmp r0,(r0) ;
|
||||
beq L42 ;
|
||||
halt ;
|
||||
|
||||
L42: tst (r0)+ ;
|
||||
ror @#177752 ;
|
||||
bcs L43 ;
|
||||
halt ;
|
||||
br L35 ;
|
||||
|
||||
L43: cmp r0,r5 ;
|
||||
blos L44 ;
|
||||
L41: mov (sp),(r3) ;
|
||||
clr (sp) ;
|
||||
sob r1,L45 ;
|
||||
br L46 ;
|
||||
|
||||
N12: halt ;
|
||||
br L46 ;
|
||||
|
||||
L35: mov #14,(r3) ;
|
||||
L46: mov @#700,r0 ;
|
||||
mov @#702,r1 ;
|
||||
mov @#704,r4 ;
|
||||
jmp 2(r4) ;
|
||||
|
||||
mov @#177570,r4 ;
|
||||
bic #177000,r4 ;
|
||||
bis #173000,r4 ;
|
||||
movb @#177571,r0 ;
|
||||
asr r0 ;
|
||||
clc ;
|
||||
jmp (r4) ;
|
||||
halt ;
|
||||
|
||||
; ------------------------------------------------------------
|
||||
|
||||
.=base+774
|
||||
verson: .ascii "0B" ; version ID
|
||||
|
||||
.=base+776
|
||||
crc16: .word <025055> ; CRC-16 will go here
|
||||
|
||||
.end
|
||||
282
devices/pdp11/rom/M9312/23-616F1.txt
Normal file
282
devices/pdp11/rom/M9312/23-616F1.txt
Normal file
|
|
@ -0,0 +1,282 @@
|
|||
1 .title M9312 11/60-70 Diagnostic/Console ROM
|
||||
2
|
||||
3 ; This source code is an exact copy of the DEC M9312 23-616F1 console PROM.
|
||||
4 ;
|
||||
5 ; This console/diagnostic PROM is for 11/60-70 CPUs.
|
||||
6 ;
|
||||
7 ; Standard devices are 82S137, 74S573 or other compatible bipolar PROMs
|
||||
8 ; with a 1024x4 TriState 18pin DIP architecture.
|
||||
9
|
||||
10 000000 .asect
|
||||
11 165000 .=165000
|
||||
12
|
||||
13 165000 base =.
|
||||
14
|
||||
15 165000 010037 000700 START: mov r0,@#700 ;
|
||||
16 165004 010137 000702 mov r1,@#702 ;
|
||||
17 165010 010437 000704 mov r4,@#704 ;
|
||||
18 165014 005037 000706 clr @#706 ;
|
||||
19
|
||||
20 165020 .=base+20
|
||||
21 165020 052737 100000 177776 DIAG: bis #100000,@#177776 ;
|
||||
22 165026 032737 040000 177776 bit #040000,@#177776 ;
|
||||
23 165034 001402 beq L1 ;
|
||||
24 165036 005237 000706 inc @#706 ;
|
||||
25 165042 005037 177776 L1: clr @#177776 ;
|
||||
26 165046 000401 br L2 ;
|
||||
27 165050 000000 halt ;
|
||||
28
|
||||
29 165052 005006 L2: clr sp ;
|
||||
30 165054 100404 bmi L3 ;
|
||||
31 165056 102403 bvs L3 ;
|
||||
32 165060 101002 bhi L3 ;
|
||||
33 165062 002401 blt L3 ;
|
||||
34 165064 101401 blos L4 ;
|
||||
35 165066 000000 L3: halt ;
|
||||
36
|
||||
37 165070 005306 L4: dec sp ;
|
||||
38 165072 100003 bpl L5 ;
|
||||
39 165074 001402 beq L5 ;
|
||||
40 165076 002001 bge L5 ;
|
||||
41 165100 003401 ble L6 ;
|
||||
42 165102 000000 L5: halt ;
|
||||
43
|
||||
44 165104 006006 L6: ror sp ;
|
||||
45 165106 102002 bvc L7 ;
|
||||
46 165110 103001 bcc L7 ;
|
||||
47 165112 001001 bne L8 ;
|
||||
48 165114 000000 L7: halt ;
|
||||
49
|
||||
50 165116 012706 125252 L8: mov #125252,sp ;
|
||||
51 165122 010600 mov sp,r0 ;
|
||||
52 165124 010001 mov r0,r1 ;
|
||||
53 165126 010102 mov r1,r2 ;
|
||||
54 165130 010203 mov r2,r3 ;
|
||||
55 165132 010304 mov r3,r4 ;
|
||||
56 165134 010405 mov r4,r5 ;
|
||||
57 165136 160501 sub r5,r1 ;
|
||||
58 165140 002401 blt NODIAG ;
|
||||
59 165142 001401 beq L9 ;
|
||||
60
|
||||
61 165144 .=base+144
|
||||
62 165144 000000 NODIAG: halt ;
|
||||
63
|
||||
64 165146 006102 L9: rol r2 ;
|
||||
65 165150 103001 bcc L10 ;
|
||||
66 165152 002401 blt L11 ;
|
||||
67 165154 000000 L10: halt ;
|
||||
68
|
||||
69 165156 060203 L11: add r2,r3 ;
|
||||
70 165160 005203 inc r3 ;
|
||||
71 165162 005103 com r3 ;
|
||||
72 165164 060301 add r3,r1 ;
|
||||
73 165166 103401 bcs L12 ;
|
||||
74 165170 003401 ble L13 ;
|
||||
75 165172 000000 L12: halt ;
|
||||
76
|
||||
77 165174 006004 L13: ror r4 ;
|
||||
78 165176 050403 bis r4,r3 ;
|
||||
79 165200 060503 add r5,r3 ;
|
||||
80 165202 005203 inc r3 ;
|
||||
81 165204 103402 bcs L14 ;
|
||||
82 165206 005301 dec r1 ;
|
||||
83 165210 002401 blt L15 ;
|
||||
84 165212 000000 L14: halt ;
|
||||
85
|
||||
86 165214 005100 L15: com r0 ;
|
||||
87 165216 101401 blos L16 ;
|
||||
88 165220 000000 halt ;
|
||||
89
|
||||
90 165222 040001 L16: bic r0,r1 ;
|
||||
91 165224 060101 add r1,r1 ;
|
||||
92 165226 003001 bgt L17 ;
|
||||
93 165230 003401 ble L18 ;
|
||||
94 165232 000000 L17: halt ;
|
||||
95
|
||||
96 165234 000301 L18: swab r1 ;
|
||||
97 165236 020127 052125 cmp r1,#052125 ;
|
||||
98 165242 001004 bne L19 ;
|
||||
99 165244 030405 bit r4,r5 ;
|
||||
100 165246 003002 bgt L19 ;
|
||||
101 165250 005105 com r5 ;
|
||||
102 165252 001001 bne L20 ;
|
||||
103 165254 000000 L19: halt ;
|
||||
104
|
||||
105 165256 112700 177401 L20: movb #177401,r0 ;
|
||||
106 165262 100001 bpl L21 ;
|
||||
107 165264 000000 L22: halt ;
|
||||
108
|
||||
109 165266 077002 L21: sob r0,L22 ;
|
||||
110 165270 005001 clr r1 ;
|
||||
111 165272 005201 L23: inc r1 ;
|
||||
112 165274 077002 sob r0,L23 ;
|
||||
113 165276 005700 tst r0 ;
|
||||
114 165300 001002 bne L24 ;
|
||||
115 165302 005701 tst r1 ;
|
||||
116 165304 001401 beq L25 ;
|
||||
117 165306 000000 L24: halt ;
|
||||
118
|
||||
119 165310 012706 000776 L25: mov #776,sp ;
|
||||
120 165314 004767 165322' jsr pc,L26 ;
|
||||
121 165320 000000 N2: halt ;
|
||||
122
|
||||
123 165322 022716 165320 L26: cmp #N2,(sp) ;
|
||||
124 165326 001401 beq L27 ;
|
||||
125 165330 000000 halt ;
|
||||
126
|
||||
127 165332 012716 165342 L27: mov #N3,(sp) ;
|
||||
128 165336 000207 rts pc ;
|
||||
129 165340 000000 halt ;
|
||||
130
|
||||
131 165342 005046 N3: clr -(sp) ;
|
||||
132 165344 012746 165354 mov #N4,-(sp) ;
|
||||
133 165350 000002 rti ;
|
||||
134 165352 000000 halt ;
|
||||
135
|
||||
136 165354 000137 165362 N4: jmp @#N5 ;
|
||||
137 165360 000000 halt ;
|
||||
138
|
||||
139 165362 012705 160000 N5: mov #160000,r5 ;
|
||||
140 165366 005037 000006 clr @#6 ;
|
||||
141 165372 012737 165400 000004 mov #N6,@#4 ;
|
||||
142 165400 012706 000776 N6: mov #776,sp ;
|
||||
143 165404 005745 tst -(r5) ;
|
||||
144 165406 012737 165714 000114 mov #N12,@#114 ;
|
||||
145 165414 005037 000116 clr @#116 ;
|
||||
146 165420 012703 177746 mov #177746,r3 ;
|
||||
147 165424 012713 000014 mov #14,(r3) ;
|
||||
148 165430 012702 001000 mov #1000,r2 ;
|
||||
149 165434 010200 mov r2,r0 ;
|
||||
150 165436 010010 L28: mov r0,(r0) ;
|
||||
151 165440 005720 tst (r0)+ ;
|
||||
152 165442 020005 cmp r0,r5 ;
|
||||
153 165444 101774 blos L28 ;
|
||||
154 165446 010200 mov r2,r0 ;
|
||||
155 165450 011001 L30: mov (r0),r1 ;
|
||||
156 165452 020001 cmp r0,r1 ;
|
||||
157 165454 001401 beq L29 ;
|
||||
158 165456 000000 halt ;
|
||||
159
|
||||
160 165460 005120 L29: com (r0)+ ;
|
||||
161 165462 020005 cmp r0,r5 ;
|
||||
162 165464 101771 blos L30 ;
|
||||
163 165466 014001 L32: mov -(r0),r1 ;
|
||||
164 165470 005101 com r1 ;
|
||||
165 165472 020001 cmp r0,r1 ;
|
||||
166 165474 001401 beq L31 ;
|
||||
167 165476 000000 halt ;
|
||||
168
|
||||
169 165500 020002 L31: cmp r0,r2 ;
|
||||
170 165502 001371 bne L32 ;
|
||||
171 165504 005016 clr (sp) ;
|
||||
172 165506 012704 125252 mov #125252,r4 ;
|
||||
173 165512 012713 000030 mov #30,(r3) ;
|
||||
174 165516 012700 004000 mov #4000,r0 ;
|
||||
175 165522 012702 001000 L39: mov #1000,r2 ;
|
||||
176 165526 005104 L36: com r4 ;
|
||||
177 165530 010410 mov r4,(r0) ;
|
||||
178 165532 005110 com (r0) ;
|
||||
179 165534 005110 com (r0) ;
|
||||
180 165536 021004 cmp (r0),r4 ;
|
||||
181 165540 001401 beq L33 ;
|
||||
182 165542 000000 halt ;
|
||||
183
|
||||
184 165544 006037 177752 L33: ror @#177752 ;
|
||||
185 165550 103402 bcs L34 ;
|
||||
186 165552 000000 halt ;
|
||||
187 165554 000461 br L35 ;
|
||||
188
|
||||
189 165556 105116 L34: comb (sp) ;
|
||||
190 165560 001362 bne L36 ;
|
||||
191 165562 000402 br L37 ;
|
||||
192
|
||||
193 165564 .=base+564
|
||||
194 165564 000167 165000' RESTRT: jmp START ;
|
||||
195
|
||||
196 165570 005720 L37: tst (r0)+ ;
|
||||
197 165572 077223 sob r2,L36 ;
|
||||
198 165574 012713 000044 mov #44,(r3) ;
|
||||
199 165600 012700 006000 mov #6000,r0 ;
|
||||
200 165604 105166 000001 comb 1(sp) ;
|
||||
201 165610 001344 bne L39 ;
|
||||
202 165612 012702 001000 mov #1000,r2 ;
|
||||
203 165616 010200 mov r2,r0 ;
|
||||
204 165620 010010 L40: mov r0,(r0) ;
|
||||
205 165622 005720 tst (r0)+ ;
|
||||
206 165624 020005 cmp r0,r5 ;
|
||||
207 165626 101774 blos L40 ;
|
||||
208 165630 012701 000003 mov #3,r1 ;
|
||||
209 165634 005016 clr (sp) ;
|
||||
210 165636 005737 000706 tst @#706 ;
|
||||
211 165642 001020 bne L41 ;
|
||||
212 165644 012716 000030 mov #30,(sp) ;
|
||||
213 165650 010200 L45: mov r2,r0 ;
|
||||
214 165652 005110 L44: com (r0) ;
|
||||
215 165654 005110 com (r0) ;
|
||||
216 165656 020010 cmp r0,(r0) ;
|
||||
217 165660 001401 beq L42 ;
|
||||
218 165662 000000 halt ;
|
||||
219
|
||||
220 165664 005720 L42: tst (r0)+ ;
|
||||
221 165666 006037 177752 ror @#177752 ;
|
||||
222 165672 103402 bcs L43 ;
|
||||
223 165674 000000 halt ;
|
||||
224 165676 000410 br L35 ;
|
||||
225
|
||||
226 165700 020005 L43: cmp r0,r5 ;
|
||||
227 165702 101763 blos L44 ;
|
||||
228 165704 011613 L41: mov (sp),(r3) ;
|
||||
229 165706 005016 clr (sp) ;
|
||||
230 165710 077121 sob r1,L45 ;
|
||||
231 165712 000404 br L46 ;
|
||||
232
|
||||
233 165714 000000 N12: halt ;
|
||||
234 165716 000402 br L46 ;
|
||||
235
|
||||
236 165720 012713 000014 L35: mov #14,(r3) ;
|
||||
237 165724 013700 000700 L46: mov @#700,r0 ;
|
||||
238 165730 013701 000702 mov @#702,r1 ;
|
||||
239 165734 013704 000704 mov @#704,r4 ;
|
||||
240 165740 000164 000002 jmp 2(r4) ;
|
||||
241
|
||||
242 165744 013704 177570 mov @#177570,r4 ;
|
||||
243 165750 042704 177000 bic #177000,r4 ;
|
||||
244 165754 052704 173000 bis #173000,r4 ;
|
||||
245 165760 113700 177571 movb @#177571,r0 ;
|
||||
246 165764 006200 asr r0 ;
|
||||
247 165766 000241 clc ;
|
||||
248 165770 000114 jmp (r4) ;
|
||||
249 165772 000000 halt ;
|
||||
250
|
||||
251 ; ------------------------------------------------------------
|
||||
252
|
||||
253 165774 .=base+774
|
||||
254 165774 060 102 verson: .ascii "0B" ; version ID
|
||||
255
|
||||
256 165776 .=base+776
|
||||
257 165776 025055 crc16: .word <025055> ; CRC-16 will go here
|
||||
258
|
||||
259 .end
|
||||
259
|
||||
|
||||
|
||||
Symbol table
|
||||
|
||||
. =****** L17 =165232 L28 =165436 L4 =165070 L9 =165146
|
||||
BASE =165000 L18 =165234 L29 =165460 L40 =165620 N12 =165714
|
||||
CRC16 =165776 L19 =165254 L3 =165066 L41 =165704 N2 =165320
|
||||
DIAG =165020 L2 =165052 L30 =165450 L42 =165664 N3 =165342
|
||||
L1 =165042 L20 =165256 L31 =165500 L43 =165700 N4 =165354
|
||||
L10 =165154 L21 =165266 L32 =165466 L44 =165652 N5 =165362
|
||||
L11 =165156 L22 =165264 L33 =165544 L45 =165650 N6 =165400
|
||||
L12 =165172 L23 =165272 L34 =165556 L46 =165724 NODIAG=165144
|
||||
L13 =165174 L24 =165306 L35 =165720 L5 =165102 RESTRT=165564
|
||||
L14 =165212 L25 =165310 L36 =165526 L6 =165104 START =165000
|
||||
L15 =165214 L26 =165322 L37 =165570 L7 =165114 VERSON=165774
|
||||
L16 =165222 L27 =165332 L39 =165522 L8 =165116
|
||||
|
||||
|
||||
Program sections:
|
||||
|
||||
. ABS. 166000 000 (RW,I,GBL,ABS,OVR,NOSAV)
|
||||
000000 001 (RW,I,LCL,REL,CON,NOSAV)
|
||||
34
devices/pdp11/rom/M9312/M9312.json
Normal file
34
devices/pdp11/rom/M9312/M9312.json
Normal file
|
|
@ -0,0 +1,34 @@
|
|||
{"words":[
|
||||
0x101F /*0010037*/,0x01C0 /*0000700*/,0x105F /*0010137*/,0x01C2 /*0000702*/,0x111F /*0010437*/,0x01C4 /*0000704*/,0x0A1F /*0005037*/,0x01C6 /*0000706*/,
|
||||
0x55DF /*0052737*/,0x8000 /*0100000*/,0xFFFE /*0177776*/,0x35DF /*0032737*/,0x4000 /*0040000*/,0xFFFE /*0177776*/,0x0302 /*0001402*/,0x0A9F /*0005237*/,
|
||||
0x01C6 /*0000706*/,0x0A1F /*0005037*/,0xFFFE /*0177776*/,0x0101 /*0000401*/,0x0000 /*0000000*/,0x0A06 /*0005006*/,0x8104 /*0100404*/,0x8503 /*0102403*/,
|
||||
0x8202 /*0101002*/,0x0501 /*0002401*/,0x8301 /*0101401*/,0x0000 /*0000000*/,0x0AC6 /*0005306*/,0x8003 /*0100003*/,0x0302 /*0001402*/,0x0401 /*0002001*/,
|
||||
0x0701 /*0003401*/,0x0000 /*0000000*/,0x0C06 /*0006006*/,0x8402 /*0102002*/,0x8601 /*0103001*/,0x0201 /*0001001*/,0x0000 /*0000000*/,0x15C6 /*0012706*/,
|
||||
0xAAAA /*0125252*/,0x1180 /*0010600*/,0x1001 /*0010001*/,0x1042 /*0010102*/,0x1083 /*0010203*/,0x10C4 /*0010304*/,0x1105 /*0010405*/,0xE141 /*0160501*/,
|
||||
0x0501 /*0002401*/,0x0301 /*0001401*/,0x0000 /*0000000*/,0x0C42 /*0006102*/,0x8601 /*0103001*/,0x0501 /*0002401*/,0x0000 /*0000000*/,0x6083 /*0060203*/,
|
||||
0x0A83 /*0005203*/,0x0A43 /*0005103*/,0x60C1 /*0060301*/,0x8701 /*0103401*/,0x0701 /*0003401*/,0x0000 /*0000000*/,0x0C04 /*0006004*/,0x5103 /*0050403*/,
|
||||
0x6143 /*0060503*/,0x0A83 /*0005203*/,0x8702 /*0103402*/,0x0AC1 /*0005301*/,0x0501 /*0002401*/,0x0000 /*0000000*/,0x0A40 /*0005100*/,0x8301 /*0101401*/,
|
||||
0x0000 /*0000000*/,0x4001 /*0040001*/,0x6041 /*0060101*/,0x0601 /*0003001*/,0x0701 /*0003401*/,0x0000 /*0000000*/,0x00C1 /*0000301*/,0x2057 /*0020127*/,
|
||||
0x5455 /*0052125*/,0x0204 /*0001004*/,0x3105 /*0030405*/,0x0602 /*0003002*/,0x0A45 /*0005105*/,0x0201 /*0001001*/,0x0000 /*0000000*/,0x95C0 /*0112700*/,
|
||||
0xFF01 /*0177401*/,0x8001 /*0100001*/,0x0000 /*0000000*/,0x7E02 /*0077002*/,0x0A01 /*0005001*/,0x0A81 /*0005201*/,0x7E02 /*0077002*/,0x0BC0 /*0005700*/,
|
||||
0x0202 /*0001002*/,0x0BC1 /*0005701*/,0x0301 /*0001401*/,0x0000 /*0000000*/,0x15C6 /*0012706*/,0x01FE /*0000776*/,0x09F7 /*0004767*/,0x0002 /*0000002*/,
|
||||
0x0000 /*0000000*/,0x25CE /*0022716*/,0x00D0 /*0000320*/,0x0301 /*0001401*/,0x0000 /*0000000*/,0x15CE /*0012716*/,0x00E2 /*0000342*/,0x0087 /*0000207*/,
|
||||
0x0000 /*0000000*/,0x0A26 /*0005046*/,0x15E6 /*0012746*/,0x00EC /*0000354*/,0x0002 /*0000002*/,0x0000 /*0000000*/,0x005F /*0000137*/,0x00F2 /*0000362*/,
|
||||
0x0080 /*0000200*/,0x15C5 /*0012705*/,0xE000 /*0160000*/,0x0A1F /*0005037*/,0x0006 /*0000006*/,0x15DF /*0012737*/,0x0100 /*0000400*/,0x0004 /*0000004*/,
|
||||
0x15C6 /*0012706*/,0x01FE /*0000776*/,0x0BE5 /*0005745*/,0x15DF /*0012737*/,0x01CC /*0000714*/,0x004C /*0000114*/,0x0A1F /*0005037*/,0x004E /*0000116*/,
|
||||
0x15C3 /*0012703*/,0xFFE6 /*0177746*/,0x15CB /*0012713*/,0x000C /*0000014*/,0x15C2 /*0012702*/,0x0200 /*0001000*/,0x1080 /*0010200*/,0x1008 /*0010010*/,
|
||||
0x0BD0 /*0005720*/,0x2005 /*0020005*/,0x83FC /*0101774*/,0x1080 /*0010200*/,0x1201 /*0011001*/,0x2001 /*0020001*/,0x0301 /*0001401*/,0x0000 /*0000000*/,
|
||||
0x0A50 /*0005120*/,0x2005 /*0020005*/,0x83F9 /*0101771*/,0x1801 /*0014001*/,0x0A41 /*0005101*/,0x2001 /*0020001*/,0x0301 /*0001401*/,0x0000 /*0000000*/,
|
||||
0x2002 /*0020002*/,0x02F9 /*0001371*/,0x0A0E /*0005016*/,0x15C4 /*0012704*/,0xAAAA /*0125252*/,0x15CB /*0012713*/,0x0018 /*0000030*/,0x15C0 /*0012700*/,
|
||||
0x0800 /*0004000*/,0x15C2 /*0012702*/,0x0200 /*0001000*/,0x0A44 /*0005104*/,0x1108 /*0010410*/,0x0A48 /*0005110*/,0x0A48 /*0005110*/,0x2204 /*0021004*/,
|
||||
0x0301 /*0001401*/,0x0000 /*0000000*/,0x0C1F /*0006037*/,0xFFEA /*0177752*/,0x8702 /*0103402*/,0x0000 /*0000000*/,0x0131 /*0000461*/,0x8A4E /*0105116*/,
|
||||
0x02F2 /*0001362*/,0x0102 /*0000402*/,0x0077 /*0000167*/,0xFE88 /*0177210*/,0x0BD0 /*0005720*/,0x7E93 /*0077223*/,0x15CB /*0012713*/,0x0024 /*0000044*/,
|
||||
0x15C0 /*0012700*/,0x0C00 /*0006000*/,0x8A76 /*0105166*/,0x0001 /*0000001*/,0x02E4 /*0001344*/,0x15C2 /*0012702*/,0x0200 /*0001000*/,0x1080 /*0010200*/,
|
||||
0x1008 /*0010010*/,0x0BD0 /*0005720*/,0x2005 /*0020005*/,0x83FC /*0101774*/,0x15C1 /*0012701*/,0x0003 /*0000003*/,0x0A0E /*0005016*/,0x0BDF /*0005737*/,
|
||||
0x01C6 /*0000706*/,0x0210 /*0001020*/,0x15CE /*0012716*/,0x0018 /*0000030*/,0x1080 /*0010200*/,0x0A48 /*0005110*/,0x0A48 /*0005110*/,0x2008 /*0020010*/,
|
||||
0x0301 /*0001401*/,0x0000 /*0000000*/,0x0BD0 /*0005720*/,0x0C1F /*0006037*/,0xFFEA /*0177752*/,0x8702 /*0103402*/,0x0000 /*0000000*/,0x0108 /*0000410*/,
|
||||
0x2005 /*0020005*/,0x83F3 /*0101763*/,0x138B /*0011613*/,0x0A0E /*0005016*/,0x7E51 /*0077121*/,0x0104 /*0000404*/,0x0000 /*0000000*/,0x0102 /*0000402*/,
|
||||
0x15CB /*0012713*/,0x000C /*0000014*/,0x17C0 /*0013700*/,0x01C0 /*0000700*/,0x17C1 /*0013701*/,0x01C2 /*0000702*/,0x17C4 /*0013704*/,0x01C4 /*0000704*/,
|
||||
0x0074 /*0000164*/,0x0002 /*0000002*/,0x17C4 /*0013704*/,0xFF78 /*0177570*/,0x45C4 /*0042704*/,0xFE00 /*0177000*/,0x55C4 /*0052704*/,0xF600 /*0173000*/,
|
||||
0x97C0 /*0113700*/,0xFF79 /*0177571*/,0x0C80 /*0006200*/,0x00A1 /*0000241*/,0x004C /*0000114*/,0x0000 /*0000000*/,0x4230 /*0041060*/,0x2A2D /*0025055*/]
|
||||
}
|
||||
41
devices/pdp11/rom/M9312/README.md
Normal file
41
devices/pdp11/rom/M9312/README.md
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
---
|
||||
layout: page
|
||||
title: PDP-11 M9312 ROM Images
|
||||
permalink: /devices/pdp11/rom/M9312/
|
||||
---
|
||||
|
||||
PDP-11 M9312 ROM Images
|
||||
-----------------------
|
||||
|
||||
An assortment of M9312 ROM images, source listings, etc, are available from Don North's [website](http://www.ak6dn.com/PDP-11/M9312/),
|
||||
some of which we have reproduced here.
|
||||
|
||||
Initially, all we had was this [256-word ROM](M9312.json) obtained from Paul Nankervis' [website](http://skn.noip.me/pdp11/iopage.js).
|
||||
Cross-referencing that ROM with Don North's [M9312 PROM Files](http://www.ak6dn.com/PDP-11/M9312/) revealed that it came from
|
||||
DEC P/N [23-616F1](23-616F1.txt): "11/60,70 Diagnostic/Console", albeit with some unexpected changes:
|
||||
|
||||
165322 022716 165320 L26: cmp #N2,(sp) ; 165320 changed to 000320
|
||||
...
|
||||
165332 012716 165342 L27: mov #N3,(sp) ; 165342 changed to 000342
|
||||
...
|
||||
165344 012746 165354 mov #N4,-(sp) ; 165354 changed to 000354
|
||||
...
|
||||
165354 000137 165362 N4: jmp @#N5 ; 165362 changed to 000362
|
||||
165360 000000 halt ; 000000 changed to 000200
|
||||
...
|
||||
165372 012737 165400 000004 mov #N6,@#4 ; 165400 changed to 000400
|
||||
...
|
||||
165406 012737 165714 000114 mov #N12,@#114 ; 165714 changed to 000714
|
||||
|
||||
The unmodified [23-616F1](23-616F1.json) ROM can be seen at address 165000 when configured in a
|
||||
[PDP-11/70](/devices/pdp11/machine/1170/panel/debugger/) like so:
|
||||
|
||||
<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>
|
||||
|
||||
As this [PDP-11 website](http://www.pdp-11.nl/pdp11-34a/cpu/options/bootstrap-info.html) explains:
|
||||
|
||||
> The M9312 Bootstrap/terminator module contains a complete set of UNIBUS termination resistors and 512 words of ROM that can
|
||||
be used for diagnostic routines, the console emulation routine and bootstrap programs. The module has 12 jumpers, W1 thu W12,
|
||||
and five sockets to put ROMs in. One socket is used for a diagnostic ROM for the PDP-11/60 or PDP-11/70, or for a ROM that
|
||||
contains the console emulation routine and diagnostics for all other PDP-11s. The other four sockets accept ROMs that contain
|
||||
bootstrap programs.
|
||||
|
|
@ -7,4 +7,4 @@ permalink: /devices/pdp11/rom/
|
|||
PDP-11 ROM Images
|
||||
-----------------
|
||||
|
||||
Any ROM images added to the project will be stored here.
|
||||
* [M9312](M9312/)
|
||||
|
|
|
|||
Loading…
Reference in a new issue