Some more information on the 11/70 CPU instruction exerciser
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3 changed files with 117 additions and 6 deletions
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@ -234,4 +234,115 @@ so for now, I'm just going to pick out selected tapes and archive them here.
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From [bitsavers.org](http://bitsavers.trailing-edge.com/bits/DEC/pdp11/papertapeimages/20040101/), Tray 02:
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* Tape 04: [MAINDEC-11-DEQKC-B1-PB 06/12/78; 11/70 cpu instruction; exerciser; (c)1975,76](MAINDEC-11-DEQKC-B1-PB.json)
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* Tape 04: [MAINDEC-11-DEQKC-B1-PB 06/12/78; 11/70 cpu instruction exerciser; (c)1975,76](#md-11-1170-cpu-exerciser)
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MD-11 11/70 CPU EXERCISER
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-------------------------
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When started in a PDP-11/70 machine with no disk drives attached (or only RL01/RL02 drives), this diagnostic
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displays the following startup text:
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MAINDEC-11-DEQKC-B...PDP 11/70 CPU EXERCISOR
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OPT.CP=145406
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OPERATIONAL SWITCH SETTINGS
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SWITCH USE
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15 HALT ON ERROR
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14 LOOP ON TEST
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13 INHIBIT ERROR TYPEOUTS
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12 INHIBIT UBE
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11 INHIBIT ITTERATIONS
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10 BELL ON ERROR
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9 LOOP ON ERROR
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8 INHIBIT RELOCATION VIA I/O DEVICE
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7 INHIBIT TYPEOUT OF THIS TEXT AND SYS SIZE
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6 INHIBIT RELOCATION
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5 INHIBIT ROUND ROBIN RELOCATION
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4 INHIBIT RANDOM DISK ADDRESS
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3 INHIBIT MBT
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2 THESE THREE SWITCHES
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1 ARE ENCODED TO SELECT RELOCATION
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0 ON THE FOLLOWING DEVICES:
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0...RP11/RP03
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1...RK11/RK05
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2...NOT USED
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3...NOT USED
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4...RH70/RP04
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5...RH70/RS04 OR RS03
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6...NOT USED
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7...NOT USED
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THE FOLLOWING DEVICES AND DRIVES WILL BE USED FOR RELOCATION:
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DEVICE DRIVES
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TYPE A CHARACTER TO CONTINUE
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The first time I tried this test, there were a number of failures. Here's one example:
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000:00:00
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ERRORPC PHYSC PC PSW MAINT TEST NO SUB-PASS CNT
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022024 00022024 000340 000000 000041 000000 000000
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I disassembled the code responsible for that failure:
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021632: 052737 000340 177776 BIS #340,@#177776
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021640: 010746 MOV PC,-(SP)
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021642: 062716 000152 ADD #152,@SP
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021646: 011637 000004 MOV @SP,@#4
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021652: 012737 000340 000006 MOV #340,@#6
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021660: 013727 000014 001472 MOV @#14,#1472
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021666: 062716 000100 ADD #100,@SP
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021672: 012637 000014 MOV (SP)+,@#14
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021676: 012737 000340 000016 MOV #340,@#16
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021704: 012703 000376 MOV #376,R3
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021710: 010313 MOV R3,@R3
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021712: 010306 MOV R3,SP
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021714: 032767 140000 000234 BIT #140000,022156
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021722: 001015 BNE 021756
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021724: 005716 TST @SP
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021726: 021666 177776 CMP @SP,177776(SP)
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021732: 012656 MOV (SP)+,@-(SP)
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021734: 057636 000000 BIS @000000(SP),@(SP)+
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021740: 054676 000000 BIS -(SP),@000000(SP)
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021744: 005006 CLR SP
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021746: 013766 020000 020000 MOV @#20000,20000(SP)
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021754: 000425 BR 022030
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021756: 156737 000175 177777 BISB 022157,@#177777
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021764: 012706 000376 MOV #376,SP
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021770: 016646 177776 MOV 177776(SP),-(SP)
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021774: 051616 BIS @SP,@SP
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021776: 061666 177776 ADD @SP,177776(SP)
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022002: 105037 177777 CLRB @#177777
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022006: 012706 000700 MOV #700,SP
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022012: 000451 BR 022136
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022014: 012600 MOV (SP)+,R0
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022016: 012602 MOV (SP)+,R2
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022020: 012706 000700 MOV #700,SP
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022024: 104000 EMT 000
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I wasn't able to locate a source code listing for this particular (1978) version of the 11/70 CPU Instruction Exerciser,
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but I did find another useful document,
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[11/40 and 11/45 INSTRUCTION EXERCISER (Sep, 1974)](http://archive.pcjs.org/pubs/dec/pdp11/diags/MAINDEC-11-DCQKC-D-D_1140_1145_INSTRUCTION_EXERCISER_Sep74.pdf),
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where I discovered a matching test sequence on p. 86.
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Here's an excerpt:
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; THE BELOW INSTRUCTIONS SHOULD NOT CAUSE AN OVERFLOW TRAP
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TST (SP) ; BECAUSE TST IS A NON MODIFYING INST
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CMP (SP),-2(SP) ; SO IS COMPARE
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MOV (SP)+,@-(SP) ; BECAUSE OF ADDRESS MODE 5
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BIS @(SP),@(SP)+ ; BECAUSE OF ADDRESS MODE 3
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BIS -(SP),@(SP) ; BECAUSE OF ADDRESS MODE 7
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CLR SP
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MOV @#20000,20000(SP)
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BR 3$ ; BRANCH OVER NON KERNEL MODE TESTS
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In my case, after executing:
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021734: 057636 000000 BIS @000000(SP),@(SP)+ ;cycles=17
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the code trapped to vector 4:
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trapped to 004 (YELLOW)
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R0=000000 R1=154112 R2=155754 R3=000376 R4=160316 R5=153412
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SP=000372 PC=022014 PS=000340 IR=000000 SL=000377 T0 N0 Z0 V0 C0
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022014: 012600 MOV (SP)+,R0 ;cycles=0
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where it then dropped into an `EMT` instruction and reported an error.
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@ -9,7 +9,7 @@
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<device id="default" type="default"/>
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<serial id="dl11" adapter="0" binding="print" upperCase="true"/>
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<panel ref="/devices/pdp11/panel/1170/debugger/front.xml"/>
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<debugger id="debugger" base="8" messages="" commands=""/>
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<debugger id="debugger" base="8" messages="" commands="bp 021540"/>
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<device ref="/devices/pdp11/pc11/default.xml"/>
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<device ref="/devices/pdp11/rl11/default.xml"/>
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</machine>
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@ -308,11 +308,11 @@ RAMPDP11.prototype.loadImage = function(aBytes, addrLoad, addrExec, addrInit, fR
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}
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var offBlock = off;
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if (w != 0x0001) {
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if (MAXDEBUG) this.println("invalid signature (" + str.toHexWord(w) + ") at offset " + str.toHexWord(offBlock));
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this.printMessage("invalid signature (" + str.toHexWord(w) + ") at offset " + str.toHexWord(offBlock), MessagesPDP11.PAPER);
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break;
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}
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if (off + 6 >= aBytes.length) {
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if (MAXDEBUG) this.println("invalid block at offset " + str.toHexWord(offBlock));
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this.printMessage("invalid block at offset " + str.toHexWord(offBlock), MessagesPDP11.PAPER);
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break;
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}
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off += 2;
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@ -326,12 +326,12 @@ RAMPDP11.prototype.loadImage = function(aBytes, addrLoad, addrExec, addrInit, fR
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len--;
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}
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if (len != 0 || off >= aBytes.length) {
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if (MAXDEBUG) this.println("insufficient data for block at offset " + str.toHexWord(offBlock));
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this.printMessage("insufficient data for block at offset " + str.toHexWord(offBlock), MessagesPDP11.PAPER);
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break;
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}
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checksum += aBytes[off++] & 0xff;
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if (checksum & 0xff) {
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if (MAXDEBUG) this.println("invalid checksum (" + str.toHexByte(checksum) + ") for block at offset " + str.toHexWord(offBlock));
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this.printMessage("invalid checksum (" + str.toHexByte(checksum) + ") for block at offset " + str.toHexWord(offBlock), MessagesPDP11.PAPER);
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break;
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}
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if (!cbData) {
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