Added VT100 ROM disassembly
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5 changed files with 4977 additions and 2 deletions
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@ -24,6 +24,8 @@ p. 4-15, 8Kb (0x2000) of ROM is located at 0x0000, and 3Kb (0x0C00) of RAM immed
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0x0000 contains all the VT100's 8080 code. The VT100 also contains a 2Kb character generator ROM, but that ROM is not
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addressable by the CPU; it is used directly by the Video Processor.
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See [DEC VT100 ROMs](/devices/pc8080/rom/vt100/) for more information about the ROMs.
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[vt100romhax](http://vt100romhax.tumblr.com/post/90697428973/the-vt100-memory-map-and-8080-disassembly)
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(aka [phooky](https://github.com/phooky) aka Adam Mayer) further explains VT100 memory usage:
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@ -125,3 +127,5 @@ Additional VT100 Resources
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--------------------------
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[VT100 Publications](/pubs/dec/vt100/)
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[D52 Microcontroller Disassemblers](http://www.brouhaha.com/~eric/software/d52/) ([Manual](http://www.bipom.com/documents/dis51/d52manual.html))
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@ -35,3 +35,15 @@ And sure enough, concatenating those four DEC ROM dumps produces a perfect match
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[VT100.bin](http://trmm.net/images/2/20/VT100.bin).
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The VT100 also used one 2Kb character generator ROM, which is stored in [23-018E2.json](23-018E2.json).
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Disassembling the 8080 Code
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---------------------------
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Following in the footsteps of [vt100romhax](http://vt100romhax.tumblr.com/post/90697428973/the-vt100-memory-map-and-8080-disassembly),
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I disassembled the ROM, using `dz80` from [D52 source code](http://www.brouhaha.com/~eric/software/d52/) ([manual](http://www.bipom.com/documents/dis51/d52manual.html)):
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dz80 -80 archive/VT100.bin
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This produced VT100.d80, which I renamed to [VT100.asm](VT100.asm). I also appeared to run into the same problem that
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**vt100romhax** did: references to `X2000` that needed to be changed to `2000h`.
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4956
devices/pc8080/rom/vt100/VT100.asm
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4956
devices/pc8080/rom/vt100/VT100.asm
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File diff suppressed because it is too large
Load diff
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@ -172,6 +172,9 @@ ChipSet.SI1978 = {
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* Hence the CPU component in the VT100's machine.xml is defined as:
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*
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* <cpu id="cpu8080" model="8080" cycles="2764798"/>
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*
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* Beyond that, we don't really care about that particular 8224. I only mention it because knowing the CPU frequency
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* is helpful for simulating some of the other circuits below that we DO care about.
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*/
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ChipSet.VT100 = {
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MODEL: 100.0,
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@ -223,7 +226,7 @@ ChipSet.VT100 = {
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* If we assume that the CPU cycle count increments once every 361.69ns, it will increment roughly 88 times every
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* time LBA7 toggles. So we can divide the CPU cycle count by 88 and set LBA to the low bit of that truncated
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* result. An even faster (but less accurate) solution would be to mask bit 6 of the CPU cycle count, which will
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* doesn't change until the count has been incremented 64 times. See getVT100LBA() to see the chosen implementation.
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* doesn't change until the count has been incremented 64 times. See getVT100LBA() for the chosen implementation.
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*/
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DC011: { // generates Line Buffer Addresses (LBAs) for the Video Processor
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PORT: 0xC2, // write-only
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@ -280,7 +280,7 @@ Video.VT100 = {
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LINETERM: 0x7F,
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LINEATTR: {
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ADDRMASK: 0x0F,
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ADDRBIAS: 0x10, // 1 == ADDRBIAS_LO, 0 = ADDRBIAS_HI
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ADDRBIAS: 0x10, // 0x10 == ADDRBIAS_LO, 0x00 = ADDRBIAS_HI
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FONTMASK: 0x60,
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SCROLL: 0x80
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},
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