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Added a couple of doDIV() improvements

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Jeff 2017-03-08 14:41:55 -08:00 • committed by Jeff Parsons
commit b3982328ed
2 changed files with 44 additions and 28 deletions
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53
modules/pdp10/lib/cpuops.js
View file

@ -5544,7 +5544,7 @@ PDP10.doDIV = function(dst, ext, src)
} }
if (ext >= src) { if (ext >= src) {
this.regPS |= PDP10.PSFLAG.NO_DIVIDE; this.regPS |= PDP10.PSFLAG.NO_DIVIDE | PDP10.PSFLAG.OVFL;
return -1; return -1;
} }
@ -5560,33 +5560,31 @@ PDP10.doDIV = function(dst, ext, src)
* to use bit-wise operators on them, because those would operate on only the low 32 bits. * to use bit-wise operators on them, because those would operate on only the low 32 bits.
* Stick with the double worker functions I've created, and trust your JavaScript engine to * Stick with the double worker functions I've created, and trust your JavaScript engine to
* inline/optimize the code. * inline/optimize the code.
*
* TODO: Consider pre-allocating these double-length arrays to minimize the impact on GC.
*/ */
var dRes = [0, 0]; PDP10.initD(this.regRes, 0, 0);
var dPow = [1, 0]; PDP10.initD(this.regPow, 1, 0);
var dDiv = [src, 0]; PDP10.initD(this.regDiv, src, 0);
var dRem = [dst, ext]; PDP10.initD(this.regRem, dst, ext);
while (PDP10.cmpD(dRem, dDiv) > 0) { while (PDP10.cmpD(this.regRem, this.regDiv) > 0) {
PDP10.addD(dDiv, dDiv); PDP10.addD(this.regDiv, this.regDiv);
PDP10.addD(dPow, dPow); PDP10.addD(this.regPow, this.regPow);
} }
do { do {
if (PDP10.cmpD(dRem, dDiv) >= 0) { if (PDP10.cmpD(this.regRem, this.regDiv) >= 0) {
PDP10.subD(dRem, dDiv); PDP10.subD(this.regRem, this.regDiv);
PDP10.addD(dRes, dPow); PDP10.addD(this.regRes, this.regPow);
if (PDP10.zeroD(dRem)) break; if (PDP10.zeroD(this.regRem)) break;
} }
PDP10.shrD(dDiv); PDP10.shrD(this.regDiv);
PDP10.shrD(dPow); PDP10.shrD(this.regPow);
} while (!PDP10.zeroD(dPow)); } while (!PDP10.zeroD(this.regPow));
this.assert(!dRes[1], "extended quotient"); this.assert(!this.regRes[1], "extended quotient");
this.assert(!dRem[1], "extended remainder"); this.assert(!this.regRem[1], "extended remainder");
dst = dRes[0]; dst = this.regRes[0];
this.regExt = dRem[0]; this.regExt = this.regRem[0];
if (fNegQ && dst) { if (fNegQ && dst) {
dst = PDP10.WORD_LIMIT - dst; dst = PDP10.WORD_LIMIT - dst;
@ -6015,6 +6013,19 @@ PDP10.cmpD = function(dDst, dSrc)
return result; return result;
}; };
/**
* initD(dDst, lo, hi)
*
* @param {Array.<number>} dDst
* @param {number} lo
* @param {number} hi
*/
PDP10.initD = function(dDst, lo, hi)
{
dDst[0] = lo;
dDst[1] = hi;
};
/** /**
* shrD(dDst) * shrD(dDst)
* *

17
modules/pdp10/lib/cpustate.js
View file

@ -174,12 +174,17 @@ class CPUStatePDP10 extends CPUPDP10 {
*/ */
initCPU() initCPU()
{ {
this.regEA = this.regRA = this.regOP = 0; this.regEA = this.regRA = this.regOP = 0;
this.regPC = this.lastPC = this.addrReset; this.regPC = this.lastPC = this.addrReset;
this.regXC = -1; // if >= 0 this supersedes regPC (refers to an opcode from XCT) this.regXC = -1; // if >= 0 this supersedes regPC (refers to an opcode from XCT)
this.regBP = -1; // active byte pointer (-1 if none) this.regBP = -1; // active byte pointer (-1 if none)
this.regPS = 0; // assorted processor flags (see PSFLAG bit definitions) this.regPS = 0; // assorted processor flags (see PSFLAG bit definitions)
this.regExt = 0; // internal "extension" register used for 72-bit calculations (eg, MUL) this.regExt = 0; // internal "extension" register used for 72-bit MUL and DIV calculations
this.regRes = [0, 0]; // four internal "double-length" registers used for 72-bit DIV calculations
this.regPow = [0, 0];
this.regDiv = [0, 0];
this.regRem = [0, 0];
/* /*
* This is queried and displayed by the Panel when it's not displaying its own ADDRESS register * This is queried and displayed by the Panel when it's not displaying its own ADDRESS register