Honor TRAP exceptions in a CPU-appropriate manner
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7be4403eaa
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b063387357
4 changed files with 43 additions and 18 deletions
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@ -307,13 +307,13 @@ CompaqController.MAPPINGS = {
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*
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* SW1-1: ON enables fail-safe timer
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* SW1-2: ON indicates 80387 coprocessor installed
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* SW1-3: ON sets the memory from 0xC00000 to 0xFFFFFF (between 12 megabytes and 16 megabytes) non-cacheable
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* SW1-4: ON select AUTO system speed (OFF selects HIGH system speed)
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* SW1-3: ON sets memory from 0xC00000 to 0xFFFFFF (between 12 and 16 megabytes) non-cacheable
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* SW1-4: ON selects AUTO system speed (OFF selects HIGH system speed)
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* SW1-5: RESERVED (however, the system can read its state; see below)
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* SW1-6: Compaq Dual-Mode Monitor or Color Monitor (OFF selects Monochrome monitor other than Compaq)
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*
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* While SW1-7 and SW1-8 are connected to this memory-mapped register, other SW1 DIP switches are accessible through
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* the 8042 Keyboard Controller KBC.INPORT register, as follows:
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* While SW1-7 and SW1-8 are connected to this memory-mapped register, other SW1 DIP switches are accessible
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* through the 8042 Keyboard Controller's KBC.INPORT register, as follows:
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*
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* SW1-1: TODO: Determine
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* SW1-2: ChipSet.KBC.INPORT.COMPAQ_NO80387 clear if ON, set (0x04) if OFF
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@ -3291,6 +3291,8 @@ X86CPU.prototype.pushWord = function(w)
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* by a coprocessor). As of the 80286, those priorities were inverted, giving the Trap interrupt higher priority
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* than external interrupts.
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*
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* TODO: Determine the priorities for the 80186.
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*
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* @this {X86CPU}
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* @return {boolean} true if h/w interrupt (or trap) has just been acknowledged, false if not
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*/
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@ -3299,23 +3301,34 @@ X86CPU.prototype.checkINTR = function()
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this.assert(this.intFlags);
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if (!(this.opFlags & X86.OPFLAG.NOINTR)) {
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/*
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* TODO: Reverse the order of the INTR and TRAP tests if the processor is an 80286 or higher.
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* As discussed above, the 8086/8088 give hardware interrupts higher priority than the TRAP interrupt,
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* whereas the 80286 and up give TRAPs higher priority.
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*/
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if ((this.intFlags & X86.INTFLAG.INTR) && (this.regPS & X86.PS.IF)) {
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var nIDT = this.chipset.getIRRVector();
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if (nIDT >= -1) {
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this.intFlags &= ~X86.INTFLAG.INTR;
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if (nIDT >= 0) {
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this.intFlags &= ~X86.INTFLAG.HALT;
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X86.fnINT.call(this, nIDT, null, 11);
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var iPriority = (this.model < X86.MODEL_80286? 0 : 1);
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for (var nPriorities = 0; nPriorities < 2; nPriorities++) {
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switch(iPriority) {
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case 0:
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if ((this.intFlags & X86.INTFLAG.INTR) && (this.regPS & X86.PS.IF)) {
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var nIDT = this.chipset.getIRRVector();
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if (nIDT >= -1) {
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this.intFlags &= ~X86.INTFLAG.INTR;
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if (nIDT >= 0) {
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this.intFlags &= ~X86.INTFLAG.HALT;
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X86.fnINT.call(this, nIDT, null, 11);
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return true;
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}
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}
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}
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break;
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case 1:
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if ((this.intFlags & X86.INTFLAG.TRAP)) {
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this.intFlags &= ~X86.INTFLAG.TRAP;
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X86.fnINT.call(this, X86.EXCEPTION.TRAP, null, 11);
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return true;
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}
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break;
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}
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}
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else if ((this.intFlags & X86.INTFLAG.TRAP)) {
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this.intFlags &= ~X86.INTFLAG.TRAP;
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X86.fnINT.call(this, X86.EXCEPTION.TRAP, null, 11);
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return true;
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iPriority = 1 - iPriority;
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}
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}
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if (this.intFlags & X86.INTFLAG.DMA) {
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