Honor TRAP exceptions in a CPU-appropriate manner

This commit is contained in:
Jeff Parsons 2015-04-10 08:08:49 -07:00 committed by jeffpar
commit b063387357
4 changed files with 43 additions and 18 deletions

View file

@ -1,3 +1,12 @@
;
; ROM BIOS for Compaq DeskPro 386-16
; Rev J.4, from parts 109592-001 and 109591-001, dated 1988-Jan-28
; (C)Copyright COMPAQ Computer Corporation 1982,83,84,85,86,87-All rights reserved.
;
; Listing produced by NDISASM, 2015-Apr-04
; Additional post-processing performed by the PCjs TextOut module
; All post-processing, comments, etc copyright © 2012-2015 Jeff Parsons <Jeff@pcjs.org>
;
org 0x8000
CMD8042_WRITE_OUTPORT equ 0xD1

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@ -307,13 +307,13 @@ CompaqController.MAPPINGS = {
*
* SW1-1: ON enables fail-safe timer
* SW1-2: ON indicates 80387 coprocessor installed
* SW1-3: ON sets the memory from 0xC00000 to 0xFFFFFF (between 12 megabytes and 16 megabytes) non-cacheable
* SW1-4: ON select AUTO system speed (OFF selects HIGH system speed)
* SW1-3: ON sets memory from 0xC00000 to 0xFFFFFF (between 12 and 16 megabytes) non-cacheable
* SW1-4: ON selects AUTO system speed (OFF selects HIGH system speed)
* SW1-5: RESERVED (however, the system can read its state; see below)
* SW1-6: Compaq Dual-Mode Monitor or Color Monitor (OFF selects Monochrome monitor other than Compaq)
*
* While SW1-7 and SW1-8 are connected to this memory-mapped register, other SW1 DIP switches are accessible through
* the 8042 Keyboard Controller KBC.INPORT register, as follows:
* While SW1-7 and SW1-8 are connected to this memory-mapped register, other SW1 DIP switches are accessible
* through the 8042 Keyboard Controller's KBC.INPORT register, as follows:
*
* SW1-1: TODO: Determine
* SW1-2: ChipSet.KBC.INPORT.COMPAQ_NO80387 clear if ON, set (0x04) if OFF

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@ -3291,6 +3291,8 @@ X86CPU.prototype.pushWord = function(w)
* by a coprocessor). As of the 80286, those priorities were inverted, giving the Trap interrupt higher priority
* than external interrupts.
*
* TODO: Determine the priorities for the 80186.
*
* @this {X86CPU}
* @return {boolean} true if h/w interrupt (or trap) has just been acknowledged, false if not
*/
@ -3299,23 +3301,34 @@ X86CPU.prototype.checkINTR = function()
this.assert(this.intFlags);
if (!(this.opFlags & X86.OPFLAG.NOINTR)) {
/*
* TODO: Reverse the order of the INTR and TRAP tests if the processor is an 80286 or higher.
* As discussed above, the 8086/8088 give hardware interrupts higher priority than the TRAP interrupt,
* whereas the 80286 and up give TRAPs higher priority.
*/
if ((this.intFlags & X86.INTFLAG.INTR) && (this.regPS & X86.PS.IF)) {
var nIDT = this.chipset.getIRRVector();
if (nIDT >= -1) {
this.intFlags &= ~X86.INTFLAG.INTR;
if (nIDT >= 0) {
this.intFlags &= ~X86.INTFLAG.HALT;
X86.fnINT.call(this, nIDT, null, 11);
var iPriority = (this.model < X86.MODEL_80286? 0 : 1);
for (var nPriorities = 0; nPriorities < 2; nPriorities++) {
switch(iPriority) {
case 0:
if ((this.intFlags & X86.INTFLAG.INTR) && (this.regPS & X86.PS.IF)) {
var nIDT = this.chipset.getIRRVector();
if (nIDT >= -1) {
this.intFlags &= ~X86.INTFLAG.INTR;
if (nIDT >= 0) {
this.intFlags &= ~X86.INTFLAG.HALT;
X86.fnINT.call(this, nIDT, null, 11);
return true;
}
}
}
break;
case 1:
if ((this.intFlags & X86.INTFLAG.TRAP)) {
this.intFlags &= ~X86.INTFLAG.TRAP;
X86.fnINT.call(this, X86.EXCEPTION.TRAP, null, 11);
return true;
}
break;
}
}
else if ((this.intFlags & X86.INTFLAG.TRAP)) {
this.intFlags &= ~X86.INTFLAG.TRAP;
X86.fnINT.call(this, X86.EXCEPTION.TRAP, null, 11);
return true;
iPriority = 1 - iPriority;
}
}
if (this.intFlags & X86.INTFLAG.DMA) {

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@ -219,6 +219,9 @@ which reported:
fetch : http://nodejs.org/dist/v0.12.1/node-v0.12.1-darwin-x64.tar.gz
installed : v0.12.1
Then I ran:
Unfortunately, I ran into a [regression](https://github.com/joyent/node/issues/9310) on OS X with Node v0.12.x
that affects the command-line version of PCjs (specifically, the Node REPL), so I had to revert to v0.11.11.
Next, to update NPM:
[~/Sites/pcjs] sudo npm update -g