Force all segment register writes to be 16-bit, even when the operand size is 32-bit
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9 changed files with 1265 additions and 1216 deletions
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@ -921,29 +921,29 @@ X86Seg.prototype.loadDesc8 = function(addrDesc, sel, fProbe)
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* Frames coming from V86-mode ALWAYS contain 32-bit values, and look like this:
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*
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* low: EIP
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* CS (padded to 32 bits)
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* CS (upper 16 bits undefined)
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* EFLAGS
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* ESP
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* SS (padded to 32 bits)
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* ES (padded to 32 bits)
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* DS (padded to 32 bits)
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* FS (padded to 32 bits)
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* high: GS (padded to 32 bits)
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* SS (upper 16 bits undefined)
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* ES (upper 16 bits undefined)
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* DS (upper 16 bits undefined)
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* FS (upper 16 bits undefined)
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* high: GS (upper 16 bits undefined)
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*
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* Our caller (eg, fnINT()) will take care of pushing the final bits (EFLAGS, CS, and EIP).
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*/
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cpu.setDataSize(4);
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cpu.assert(I386 && cpu.model >= X86.MODEL_80386);
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cpu.pushWord(cpu.segGS.sel);
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cpu.pushData(cpu.segGS.sel, 4, 2);
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cpu.setGS(0);
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cpu.pushWord(cpu.segFS.sel);
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cpu.pushData(cpu.segFS.sel, 4, 2);
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cpu.setFS(0);
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cpu.pushWord(cpu.segDS.sel);
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cpu.pushData(cpu.segDS.sel, 4, 2);
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cpu.setDS(0);
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cpu.pushWord(cpu.segES.sel);
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cpu.pushData(cpu.segES.sel, 4, 2);
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cpu.setES(0);
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}
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cpu.pushWord(regSSPrev);
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cpu.pushData(regSSPrev, cpu.sizeData, 2);
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cpu.pushWord(regSPPrev);
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while (i) cpu.pushWord(this.awParms[--i]);
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this.fStackSwitch = true;
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