More VGA tests
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Jeff Parsons
parent
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372
tests/pc/vga/L30-1.ASM
Normal file
372
tests/pc/vga/L30-1.ASM
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; Demonstrates the VGA/EGA split screen in action.
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;
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;*********************************************************************
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IS_VGA equ 1 ;set to 0 to assemble for EGA
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;
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VGA_SEGMENT equ 0a000h
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SCREEN_WIDTH equ 640
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SCREEN_HEIGHT equ 350
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CRTC_INDEX equ 3d4h ;CRT Controller Index register
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OVERFLOW equ 7 ;index of Overflow reg in CRTC
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MAXIMUM_SCAN_LINE equ 9 ;index of Maximum Scan Line register
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; in CRTC
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START_ADDRESS_HIGH equ 0ch ;index of Start Address High register
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; in CRTC
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START_ADDRESS_LOW equ 0dh ;index of Start Address Low register
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; in CRTC
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LINE_COMPARE equ 18h ;index of Line Compare reg (bits 7-0
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; of split screen start scan line)
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; in CRTC
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INPUT_STATUS_0 equ 3dah ;Input Status 0 register
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WORD_OUTS_OK equ 1 ;set to 0 to assemble for
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; computers that can't handle
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; word outs to indexed VGA registers
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;*********************************************************************
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; Macro to output a word value to a port.
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;
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OUT_WORD macro
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if WORD_OUTS_OK
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out dx,ax
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else
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out dx,al
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inc dx
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xchg ah,al
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out dx,al
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dec dx
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xchg ah,al
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endif
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endm
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;*********************************************************************
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MyStack segment para stack 'STACK'
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db 512 dup (0)
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MyStack ends
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;*********************************************************************
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Data segment
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SplitScreenLine dw ? ;line the split screen currently
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; starts after
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StartAddress dw ? ;display memory offset at which
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; scanning for video data starts
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; Message displayed in split screen.
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SplitScreenMsg db 'Split screen text row #'
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DigitInsert dw ?
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db '...$'
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Data ends
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;*********************************************************************
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Code segment
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assume cs:Code, ds:Data
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;*********************************************************************
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Start proc near
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mov ax,Data
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mov ds,ax
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;
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; Select mode 10h, 640x350 16-color graphics mode.
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;
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mov ax,0010h ;AH=0 is select mode function
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;AL=10h is mode to select,
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; 640x350 16-color graphics mode
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int 10h
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;
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; Put text into display memory starting at offset 0, with each row
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; labelled as to number. This is the part of memory that will be
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; displayed in the split screen portion of the display.
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;
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mov cx,25 ;# of lines of text we'll draw into
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; the split screen part of memory
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FillSplitScreenLoop:
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mov ah,2 ;set cursor location function #
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sub bh,bh ;set cursor in page 0
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mov dh,25
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sub dh,cl ;calculate row to draw in
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sub dl,dl ;start in column 0
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int 10h ;set the cursor location
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mov al,25
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sub al,cl ;calculate row to draw in again
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sub ah,ah ;make the value a word for division
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mov dh,10
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div dh ;split the row # into two digits
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add ax,'00' ;convert the digits to ASCII
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mov [DigitInsert],ax ;put the digits into the text
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; to be displayed
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mov ah,9
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mov dx,offset SplitScreenMsg
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int 21h ;print the text
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loop FillSplitScreenLoop
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;
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; Fill display memory starting at 8000h with a diagonally striped
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; pattern.
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;
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mov ax,VGA_SEGMENT
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mov es,ax
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mov di,8000h
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mov dx,SCREEN_HEIGHT ;fill all lines
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mov ax,8888h ;starting fill pattern
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cld
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RowLoop:
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mov cx,SCREEN_WIDTH/8/2 ;fill 1 scan line a word at a time
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rep stosw ;fill the scan line
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ror ax,1 ;shift pattern word
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dec dx
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jnz RowLoop
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;
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; Set the start address to 8000h and display that part of memory.
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;
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mov [StartAddress],8000h
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call SetStartAddress
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;
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; Slide the split screen half way up the screen and then back down
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; a quarter of the screen.
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;
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mov [SplitScreenLine],SCREEN_HEIGHT-1
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;set the initial line just off
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; the bottom of the screen
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mov cx,SCREEN_HEIGHT/2
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call SplitScreenUp
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mov cx,SCREEN_HEIGHT/4
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call SplitScreenDown
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;
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; Now move up another half a screen and then back down a quarter.
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;
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mov cx,SCREEN_HEIGHT/2
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call SplitScreenUp
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mov cx,SCREEN_HEIGHT/4
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call SplitScreenDown
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;
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; Finally move up to the top of the screen.
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;
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mov cx,SCREEN_HEIGHT/2-2
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call SplitScreenUp
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;
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; Wait for a key press (don't echo character).
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;
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mov ah,8 ;DOS console input without echo function
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int 21h
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;
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; Turn the split screen off.
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;
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mov [SplitScreenLine],0ffffh
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call SetSplitScreenScanLine
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;
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; Wait for a key press (don't echo character).
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;
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mov ah,8 ;DOS console input without echo function
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int 21h
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;
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; Display the memory at 0 (the same memory the split screen displays).
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;
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mov [StartAddress],0
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call SetStartAddress
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;
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; Flip between the split screen and the normal screen every 10th
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; frame until a key is pressed.
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;
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FlipLoop:
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xor [SplitScreenLine],0ffffh
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call SetSplitScreenScanLine
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mov cx,10
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CountVerticalSyncsLoop:
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call WaitForVerticalSyncEnd
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loop CountVerticalSyncsLoop
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mov ah,0bh ;DOS character available status
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int 21h
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and al,al ;character available?
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jz FlipLoop ;no, toggle split screen on/off status
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mov ah,1
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int 21h ;clear the character
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;
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; Return to text mode and DOS.
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;
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mov ax,0003h ;AH=0 is select mode function
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;AL=3 is mode to select, text mode
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int 10h ;return to text mode
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mov ah,4ch
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int 21h ;return to DOS
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Start endp
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;*********************************************************************
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; Waits for the leading edge of the vertical sync pulse.
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;
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; Input: none
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;
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; Output: none
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;
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; Registers altered: AL, DX
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;
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WaitForVerticalSyncStart proc near
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mov dx,INPUT_STATUS_0
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WaitNotVerticalSync:
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in al,dx
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test al,08h
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jnz WaitNotVerticalSync
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WaitVerticalSync:
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in al,dx
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test al,08h
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jz WaitVerticalSync
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ret
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WaitForVerticalSyncStart endp
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;*********************************************************************
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; Waits for the trailing edge of the vertical sync pulse.
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;
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; Input: none
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;
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; Output: none
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;
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; Registers altered: AL, DX
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;
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WaitForVerticalSyncEnd proc near
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mov dx,INPUT_STATUS_0
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WaitVerticalSync2:
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in al,dx
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test al,08h
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jz WaitVerticalSync2
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WaitNotVerticalSync2:
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in al,dx
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test al,08h
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jnz WaitNotVerticalSync2
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ret
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WaitForVerticalSyncEnd endp
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;*********************************************************************
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; Sets the start address to the value specifed by StartAddress.
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; Wait for the trailing edge of vertical sync before setting so that
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; one half of the address isn't loaded before the start of the frame
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; and the other half after, resulting in flicker as one frame is
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; displayed with mismatched halves. The new start address won't be
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; loaded until the start of the next frame; that is, one full frame
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; will be displayed before the new start address takes effect.
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;
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; Input: none
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;
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; Output: none
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;
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; Registers altered: AX, DX
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;
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SetStartAddress proc near
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call WaitForVerticalSyncEnd
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mov dx,CRTC_INDEX
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mov al,START_ADDRESS_HIGH
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mov ah,byte ptr [StartAddress+1]
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cli ;make sure both registers get set at once
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OUT_WORD
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mov al,START_ADDRESS_LOW
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mov ah,byte ptr [StartAddress]
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OUT_WORD
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sti
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ret
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SetStartAddress endp
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;*********************************************************************
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; Sets the scan line the split screen starts after to the scan line
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; specified by SplitScreenLine.
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;
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; Input: none
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;
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; Output: none
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;
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; All registers preserved
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;
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SetSplitScreenScanLine proc near
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push ax
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push cx
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push dx
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;
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; Wait for the leading edge of the vertical sync pulse. This ensures
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; that we don't get mismatched portions of the split screen setting
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; while setting the two or three split screen registers (register 18h
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; set but register 7 not yet set when a match occurs, for example),
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; which could produce brief flickering.
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;
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call WaitForVerticalSyncStart
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;
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; Set the split screen scan line.
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;
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mov dx,CRTC_INDEX
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mov ah,byte ptr [SplitScreenLine]
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mov al,LINE_COMPARE
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cli ;make sure all the registers get set at once
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OUT_WORD ;set bits 7-0 of the split screen scan line
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mov ah,byte ptr [SplitScreenLine+1]
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and ah,1
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mov cl,4
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shl ah,cl ;move bit 8 of the split split screen scan
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; line into position for the Overflow reg
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mov al,OVERFLOW
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if IS_VGA
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;
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; The Split Screen, Overflow, and Line Compare registers all contain
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; part of the split screen start scan line on the VGA. We'll take
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; advantage of the readable registers of the VGA to leave other bits
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; in the registers we access undisturbed.
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;
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out dx,al ;set CRTC Index reg to point to Overflow
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inc dx ;point to CRTC Data reg
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in al,dx ;get the current Overflow reg setting
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and al,not 10h ;turn off split screen bit 8
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or al,ah ;insert the new split screen bit 8
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; (works in any mode)
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out dx,al ;set the new split screen bit 8
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dec dx ;point to CRTC Index reg
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mov ah,byte ptr [SplitScreenLine+1]
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and ah,2
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mov cl,3
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ror ah,cl ;move bit 9 of the split split screen scan
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; line into position for the Maximum Scan
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; Line register
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mov al,MAXIMUM_SCAN_LINE
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out dx,al ;set CRTC Index reg to point to Maximum
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; Scan Line
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inc dx ;point to CRTC Data reg
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in al,dx ;get the current Maximum Scan Line setting
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and al,not 40h ;turn off split screen bit 9
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or al,ah ;insert the new split screen bit 9
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; (works in any mode)
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out dx,al ;set the new split screen bit 9
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else
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;
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; Only the Split Screen and Overflow registers contain part of the
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; Split Screen start scan line and need to be set on the EGA.
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; EGA registers are not readable, so we have to set the non-split
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; screen bits of the Overflow register to a preset value, in this
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; case the value for 350-scan-line modes.
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;
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or ah,0fh ;insert the new split screen bit 8
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; (only works in 350-scan-line EGA modes)
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OUT_WORD ;set the new split screen bit 8
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endif
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sti
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pop dx
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pop cx
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pop ax
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ret
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SetSplitScreenScanLine endp
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;*********************************************************************
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; Moves the split screen up the specified number of scan lines.
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;
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; Input: CX = # of scan lines to move the split screen up by
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;
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; Output: none
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;
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; Registers altered: CX
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;
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SplitScreenUp proc near
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SplitScreenUpLoop:
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dec [SplitScreenLine]
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call SetSplitScreenScanLine
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loop SplitScreenUpLoop
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ret
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SplitScreenUp endp
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;*********************************************************************
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; Moves the split screen down the specified number of scan lines.
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;
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; Input: CX = # of scan lines to move the split screen down by
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;
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; Output: none
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;
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; Registers altered: CX
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;
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SplitScreenDown proc near
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SplitScreenDownLoop:
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inc [SplitScreenLine]
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call SetSplitScreenScanLine
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loop SplitScreenDownLoop
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ret
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SplitScreenDown endp
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;*********************************************************************
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Code ends
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end Start
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419
tests/pc/vga/L30-2.ASM
Normal file
419
tests/pc/vga/L30-2.ASM
Normal file
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@ -0,0 +1,419 @@
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; Demonstrates the interaction of the split screen and
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; horizontal pel panning. On a VGA, first pans right in the top
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; half while the split screen jerks around, because split screen
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; pel panning suppression is disabled, then enables split screen
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; pel panning suppression and pans right in the top half while the
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; split screen remains stable. On an EGA, the split screen jerks
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; around in both cases, because the EGA doesn't support split
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; screen pel panning suppression.
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;
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; The jerking in the split screen occurs because the split screen
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; is being pel panned (panned by single pixels--intrabyte panning),
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; but is not and cannot be byte panned (panned by single bytes--
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; "extrabyte" panning) because the start address of the split screen
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; is forever fixed at 0.
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;*********************************************************************
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IS_VGA equ 1 ;set to 0 to assemble for EGA
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;
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VGA_SEGMENT equ 0a000h
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LOGICAL_SCREEN_WIDTH equ 1024 ;# of pixels across virtual
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; screen that we'll pan across
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SCREEN_HEIGHT equ 350
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SPLIT_SCREEN_START equ 200 ;start scan line for split screen
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SPLIT_SCREEN_HEIGHT equ SCREEN_HEIGHT-SPLIT_SCREEN_START-1
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CRTC_INDEX equ 3d4h ;CRT Controller Index register
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AC_INDEX equ 3c0h ;Attribute Controller Index reg
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OVERFLOW equ 7 ;index of Overflow reg in CRTC
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MAXIMUM_SCAN_LINE equ 9 ;index of Maximum Scan Line register
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; in CRTC
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START_ADDRESS_HIGH equ 0ch ;index of Start Address High register
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; in CRTC
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START_ADDRESS_LOW equ 0dh ;index of Start Address Low register
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; in CRTC
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HOFFSET equ 13h ;index of Horizontal Offset register
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; in CRTC
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LINE_COMPARE equ 18h ;index of Line Compare reg (bits 7-0
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; of split screen start scan line)
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; in CRTC
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AC_MODE_CONTROL equ 10h ;index of Mode Control reg in AC
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PEL_PANNING equ 13h ;index of Pel Panning reg in AC
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INPUT_STATUS_0 equ 3dah ;Input Status 0 register
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WORD_OUTS_OK equ 1 ;set to 0 to assemble for
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; computers that can't handle
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; word outs to indexed VGA registers
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;*********************************************************************
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; Macro to output a word value to a port.
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;
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OUT_WORD macro
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if WORD_OUTS_OK
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out dx,ax
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else
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out dx,al
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inc dx
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xchg ah,al
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out dx,al
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dec dx
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xchg ah,al
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endif
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endm
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;*********************************************************************
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MyStack segment para stack 'STACK'
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db 512 dup (0)
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MyStack ends
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;*********************************************************************
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Data segment
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SplitScreenLine dw ? ;line the split screen currently
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; starts after
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StartAddress dw ? ;display memory offset at which
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; scanning for video data starts
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PelPan db ? ;current intrabyte horizontal pel
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; panning setting
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Data ends
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;*********************************************************************
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Code segment
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assume cs:Code, ds:Data
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;*********************************************************************
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Start proc near
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mov ax,Data
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mov ds,ax
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;
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; Select mode 10h, 640x350 16-color graphics mode.
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;
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mov ax,0010h ;AH=0 is select mode function
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;AL=10h is mode to select,
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; 640x350 16-color graphics mode
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int 10h
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;
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; Set the Offset register to make the offset from the start of one
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; scan line to the start of the next the desired number of pixels.
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; This gives us a virtual screen wider than the actual screen to
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; pan across.
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; Note that the Offset register is programmed with the logical
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; screen width in words, not bytes, hence the final division by 2.
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;
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mov dx,CRTC_INDEX
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mov ax,(LOGICAL_SCREEN_WIDTH/8/2 shl 8) or HOFFSET
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OUT_WORD
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;
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; Set the start address to display the memory just past the split
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; screen memory.
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;
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mov [StartAddress],SPLIT_SCREEN_HEIGHT*(LOGICAL_SCREEN_WIDTH/8)
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call SetStartAddress
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;
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; Set the split screen start scan line.
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;
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mov [SplitScreenLine],SPLIT_SCREEN_START
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call SetSplitScreenScanLine
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;
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; Fill the split screen portion of display memory (starting at
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; offset 0) with a choppy diagonal pattern sloping left.
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;
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mov ax,VGA_SEGMENT
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mov es,ax
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sub di,di
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mov dx,SPLIT_SCREEN_HEIGHT
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;fill all lines in the split screen
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mov ax,0FF0h ;starting fill pattern
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cld
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RowLoop:
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mov cx,LOGICAL_SCREEN_WIDTH/8/4
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;fill 1 scan line
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ColumnLoop:
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stosw ;draw part of a diagonal line
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mov word ptr es:[di],0 ;make vertical blank spaces so
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; panning effects can be seen easily
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inc di
|
||||
inc di
|
||||
loop ColumnLoop
|
||||
rol ax,1 ;shift pattern word
|
||||
dec dx
|
||||
jnz RowLoop
|
||||
;
|
||||
; Fill the portion of display memory that will be displayed in the
|
||||
; normal screen (the non-split screen part of the display) with a
|
||||
; choppy diagonal pattern sloping right.
|
||||
;
|
||||
mov di,SPLIT_SCREEN_HEIGHT*(LOGICAL_SCREEN_WIDTH/8)
|
||||
mov dx,SCREEN_HEIGHT ;fill all lines
|
||||
mov ax,0c510h ;starting fill pattern
|
||||
cld
|
||||
RowLoop2:
|
||||
mov cx,LOGICAL_SCREEN_WIDTH/8/4
|
||||
;fill 1 scan line
|
||||
ColumnLoop2:
|
||||
stosw ;draw part of a diagonal line
|
||||
mov word ptr es:[di],0 ;make vertical blank spaces so
|
||||
; panning effects can be seen easily
|
||||
inc di
|
||||
inc di
|
||||
loop ColumnLoop2
|
||||
ror ax,1 ;shift pattern word
|
||||
dec dx
|
||||
jnz RowLoop2
|
||||
;
|
||||
; Pel pan the non-split screen portion of the display; because
|
||||
; split screen pel panning suppression is not turned on, the split
|
||||
; screen jerks back and forth as the pel panning setting cycles.
|
||||
;
|
||||
mov cx,200 ;pan 200 pixels to the left
|
||||
call PanRight
|
||||
;
|
||||
; Wait for a key press (don't echo character).
|
||||
;
|
||||
mov ah,8 ;DOS console input without echo function
|
||||
int 21h
|
||||
;
|
||||
; Return to the original screen location, with pel panning turned off.
|
||||
;
|
||||
mov [StartAddress],SPLIT_SCREEN_HEIGHT*(LOGICAL_SCREEN_WIDTH/8)
|
||||
call SetStartAddress
|
||||
mov [PelPan],0
|
||||
call SetPelPan
|
||||
;
|
||||
; Turn on split screen pel panning suppression, so the split screen
|
||||
; won't be affected by pel panning. Not done on EGA because both
|
||||
; readable registers and the split screen pel panning suppression bit
|
||||
; aren't supported by EGAs.
|
||||
;
|
||||
if IS_VGA
|
||||
mov dx,INPUT_STATUS_0
|
||||
in al,dx ;reset the AC Index/Data toggle to
|
||||
; Index state
|
||||
mov al,20h+AC_MODE_CONTROL
|
||||
;bit 5 set to 1 to keep video on
|
||||
mov dx,AC_INDEX ;point to AC Index/Data register
|
||||
out dx,al
|
||||
inc dx ;point to AC Data reg (for reads only)
|
||||
in al,dx ;get the current AC Mode Control reg
|
||||
or al,20h ;enable split screen pel panning
|
||||
; suppression
|
||||
dec dx ;point to AC Index/Data reg (Data for
|
||||
; writes only)
|
||||
out dx,al ;write the new AC Mode Control setting
|
||||
; with split screen pel panning
|
||||
; suppression turned on
|
||||
endif
|
||||
;
|
||||
; Pel pan the non-split screen portion of the display; because
|
||||
; split screen pel panning suppression is turned on, the split
|
||||
; screen will not move as the pel panning setting cycles.
|
||||
;
|
||||
mov cx,200 ;pan 200 pixels to the left
|
||||
call PanRight
|
||||
;
|
||||
; Wait for a key press (don't echo character).
|
||||
;
|
||||
mov ah,8 ;DOS console input without echo function
|
||||
int 21h
|
||||
;
|
||||
; Return to text mode and DOS.
|
||||
;
|
||||
mov ax,0003h ;AH=0 is select mode function
|
||||
;AL=3 is mode to select, text mode
|
||||
int 10h ;return to text mode
|
||||
mov ah,4ch
|
||||
int 21h ;return to DOS
|
||||
Start endp
|
||||
;*********************************************************************
|
||||
; Waits for the leading edge of the vertical sync pulse.
|
||||
;
|
||||
; Input: none
|
||||
;
|
||||
; Output: none
|
||||
;
|
||||
; Registers altered: AL, DX
|
||||
;
|
||||
WaitForVerticalSyncStart proc near
|
||||
mov dx,INPUT_STATUS_0
|
||||
WaitNotVerticalSync:
|
||||
in al,dx
|
||||
test al,08h
|
||||
jnz WaitNotVerticalSync
|
||||
WaitVerticalSync:
|
||||
in al,dx
|
||||
test al,08h
|
||||
jz WaitVerticalSync
|
||||
ret
|
||||
WaitForVerticalSyncStart endp
|
||||
;*********************************************************************
|
||||
; Waits for the trailing edge of the vertical sync pulse.
|
||||
;
|
||||
; Input: none
|
||||
;
|
||||
; Output: none
|
||||
;
|
||||
; Registers altered: AL, DX
|
||||
;
|
||||
WaitForVerticalSyncEnd proc near
|
||||
mov dx,INPUT_STATUS_0
|
||||
WaitVerticalSync2:
|
||||
in al,dx
|
||||
test al,08h
|
||||
jz WaitVerticalSync2
|
||||
WaitNotVerticalSync2:
|
||||
in al,dx
|
||||
test al,08h
|
||||
jnz WaitNotVerticalSync2
|
||||
ret
|
||||
WaitForVerticalSyncEnd endp
|
||||
;*********************************************************************
|
||||
; Sets the start address to the value specifed by StartAddress.
|
||||
; Wait for the trailing edge of vertical sync before setting so that
|
||||
; one half of the address isn't loaded before the start of the frame
|
||||
; and the other half after, resulting in flicker as one frame is
|
||||
; displayed with mismatched halves. The new start address won't be
|
||||
; loaded until the start of the next frame; that is, one full frame
|
||||
; will be displayed before the new start address takes effect.
|
||||
;
|
||||
; Input: none
|
||||
;
|
||||
; Output: none
|
||||
;
|
||||
; Registers altered: AX, DX
|
||||
;
|
||||
SetStartAddress proc near
|
||||
call WaitForVerticalSyncEnd
|
||||
mov dx,CRTC_INDEX
|
||||
mov al,START_ADDRESS_HIGH
|
||||
mov ah,byte ptr [StartAddress+1]
|
||||
cli ;make sure both registers get set at once
|
||||
OUT_WORD
|
||||
mov al,START_ADDRESS_LOW
|
||||
mov ah,byte ptr [StartAddress]
|
||||
OUT_WORD
|
||||
sti
|
||||
ret
|
||||
SetStartAddress endp
|
||||
;*********************************************************************
|
||||
; Sets the horizontal pel panning setting to the value specified
|
||||
; by PelPan. Waits until the start of vertical sync to do so, so
|
||||
; the new pel pan setting can be loaded during non-display time
|
||||
; and can be ready by the start of the next frame.
|
||||
;
|
||||
; Input: none
|
||||
;
|
||||
; Output: none
|
||||
;
|
||||
; Registers altered: AL, DX
|
||||
;
|
||||
SetPelPan proc near
|
||||
call WaitForVerticalSyncStart ;also resets the AC
|
||||
; Index/Data toggle
|
||||
; to Index state
|
||||
mov dx,AC_INDEX
|
||||
mov al,PEL_PANNING+20h
|
||||
;bit 5 set to 1 to keep video on
|
||||
out dx,al ;point the AC Index to Pel Pan reg
|
||||
mov al,[PelPan]
|
||||
out dx,al ;load the new Pel Pan setting
|
||||
ret
|
||||
SetPelPan endp
|
||||
;*********************************************************************
|
||||
; Sets the scan line the split screen starts after to the scan line
|
||||
; specified by SplitScreenLine.
|
||||
;
|
||||
; Input: none
|
||||
;
|
||||
; Output: none
|
||||
;
|
||||
; All registers preserved
|
||||
;
|
||||
SetSplitScreenScanLine proc near
|
||||
push ax
|
||||
push cx
|
||||
push dx
|
||||
;
|
||||
; Wait for the leading edge of the vertical sync pulse. This ensures
|
||||
; that we don't get mismatched portions of the split screen setting
|
||||
; while setting the two or three split screen registers (register 18h
|
||||
; set but register 7 not yet set when a match occurs, for example),
|
||||
; which could produce brief flickering.
|
||||
;
|
||||
call WaitForVerticalSyncStart
|
||||
;
|
||||
; Set the split screen scan line.
|
||||
;
|
||||
mov dx,CRTC_INDEX
|
||||
mov ah,byte ptr [SplitScreenLine]
|
||||
mov al,LINE_COMPARE
|
||||
cli ;make sure all the registers get set at once
|
||||
OUT_WORD ;set bits 7-0 of the split screen scan line
|
||||
mov ah,byte ptr [SplitScreenLine+1]
|
||||
and ah,1
|
||||
mov cl,4
|
||||
shl ah,cl ;move bit 8 of the split split screen scan
|
||||
; line into position for the Overflow reg
|
||||
mov al,OVERFLOW
|
||||
if IS_VGA
|
||||
;
|
||||
; The Split Screen, Overflow, and Line Compare registers all contain
|
||||
; part of the split screen start scan line on the VGA. We'll take
|
||||
; advantage of the readable registers of the VGA to leave other bits
|
||||
; in the registers we access undisturbed.
|
||||
;
|
||||
out dx,al ;set CRTC Index reg to point to Overflow
|
||||
inc dx ;point to CRTC Data reg
|
||||
in al,dx ;get the current Overflow reg setting
|
||||
and al,not 10h ;turn off split screen bit 8
|
||||
or al,ah ;insert the new split screen bit 8
|
||||
; (works in any mode)
|
||||
out dx,al ;set the new split screen bit 8
|
||||
dec dx ;point to CRTC Index reg
|
||||
mov ah,byte ptr [SplitScreenLine+1]
|
||||
and ah,2
|
||||
mov cl,3
|
||||
ror ah,cl ;move bit 9 of the split split screen scan
|
||||
; line into position for the Maximum Scan
|
||||
; Line register
|
||||
mov al,MAXIMUM_SCAN_LINE
|
||||
out dx,al ;set CRTC Index reg to point to Maximum
|
||||
; Scan Line
|
||||
inc dx ;point to CRTC Data reg
|
||||
in al,dx ;get the current Maximum Scan Line setting
|
||||
and al,not 40h ;turn off split screen bit 9
|
||||
or al,ah ;insert the new split screen bit 9
|
||||
; (works in any mode)
|
||||
out dx,al ;set the new split screen bit 9
|
||||
else
|
||||
;
|
||||
; Only the Split Screen and Overflow registers contain part of the
|
||||
; Split Screen start scan line and need to be set on the EGA.
|
||||
; EGA registers are not readable, so we have to set the non-split
|
||||
; screen bits of the Overflow register to a preset value, in this
|
||||
; case the value for 350-scan-line modes.
|
||||
;
|
||||
or ah,0fh ;insert the new split screen bit 8
|
||||
; (only works in 350-scan-line EGA modes)
|
||||
OUT_WORD ;set the new split screen bit 8
|
||||
endif
|
||||
sti
|
||||
pop dx
|
||||
pop cx
|
||||
pop ax
|
||||
ret
|
||||
SetSplitScreenScanLine endp
|
||||
;*********************************************************************
|
||||
; Pan horizontally to the right the number of pixels specified by CX.
|
||||
;
|
||||
; Input: CX = # of pixels by which to pan horizontally
|
||||
;
|
||||
; Output: none
|
||||
;
|
||||
; Registers altered: AX, CX, DX
|
||||
;
|
||||
PanRight proc near
|
||||
PanLoop:
|
||||
inc [PelPan]
|
||||
and [PelPan],07h
|
||||
jnz DoSetStartAddress
|
||||
inc [StartAddress]
|
||||
DoSetStartAddress:
|
||||
call SetStartAddress
|
||||
call SetPelPan
|
||||
loop PanLoop
|
||||
ret
|
||||
PanRight endp
|
||||
;*********************************************************************
|
||||
Code ends
|
||||
end Start
|
||||
Loading…
Reference in a new issue