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Merge branch 'next-release'

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This commit is contained in:
Jeff Parsons 2016-11-18 10:47:04 -08:00
commit a83ae4c0be
35 changed files with 2739 additions and 1648 deletions
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152
apps/pdp11/boot/monitor/BOOTMON.json
View file

@ -1,8 +1,9 @@
{"load":0xC000/*140000*/,"exec":0xC000/*140000*/, {"load":0xC000/*140000*/,
"exec":0xC000/*140000*/,
"words":[ "words":[
0x0005/*000005*/,0x0A1F/*005037*/,0xFFFE/*177776*/,0x15C6/*012706*/,0xC000/*140000*/,0x0A1F/*005037*/,0xFF74/*177564*/,0x15C0/*012700*/, 0x0005/*000005*/,0x0A1F/*005037*/,0xFFFE/*177776*/,0x15C6/*012706*/,0xC000/*140000*/,0x0A1F/*005037*/,0xFF74/*177564*/,0x15C0/*012700*/,
0xC251/*141121*/,0x09F7/*004767*/,0x0052/*000122*/,0x15DF/*012737*/,0xC054/*140124*/,0x0040/*000100*/,0x15DF/*012737*/,0x00E0/*000340*/, 0xC25E/*141136*/,0x09F7/*004767*/,0x0052/*000122*/,0x15DF/*012737*/,0xC054/*140124*/,0x0040/*000100*/,0x15DF/*012737*/,0x00E0/*000340*/,
0x0042/*000102*/,0x55DF/*052737*/,0x0040/*000100*/,0xFF66/*177546*/,0x15C0/*012700*/,0xC269/*141151*/,0x09F7/*004767*/,0x0038/*000070*/, 0x0042/*000102*/,0x55DF/*052737*/,0x0040/*000100*/,0xFF66/*177546*/,0x15C0/*012700*/,0xC276/*141166*/,0x09F7/*004767*/,0x0038/*000070*/,
0xE5C6/*162706*/,0x00AE/*000256*/,0x1180/*010600*/,0x09F7/*004767*/,0x006A/*000152*/,0x0A00/*005000*/,0x0001/*000001*/,0x0A80/*005200*/, 0xE5C6/*162706*/,0x00AE/*000256*/,0x1180/*010600*/,0x09F7/*004767*/,0x006A/*000152*/,0x0A00/*005000*/,0x0001/*000001*/,0x0A80/*005200*/,
0x0BF7/*005767*/,0x000C/*000014*/,0x03FB/*001773*/,0x15E6/*012746*/,0x5800/*054000*/,0x1DE6/*016746*/,0x0002/*000002*/,0x0002/*000002*/, 0x0BF7/*005767*/,0x000C/*000014*/,0x03FB/*001773*/,0x15E6/*012746*/,0x5800/*054000*/,0x1DE6/*016746*/,0x0002/*000002*/,0x0002/*000002*/,
0x0000/*000000*/,0x0000/*000000*/,0x0AB7/*005267*/,0xFFFA/*177772*/,0x0002/*000002*/,0x8BDF/*105737*/,0xFF74/*177564*/,0x80FD/*100375*/, 0x0000/*000000*/,0x0000/*000000*/,0x0AB7/*005267*/,0xFFFA/*177772*/,0x0002/*000002*/,0x8BDF/*105737*/,0xFF74/*177564*/,0x80FD/*100375*/,
@ -14,76 +15,101 @@
0x0030/*000060*/,0x15DF/*012737*/,0x0080/*000200*/,0x0032/*000062*/,0xD5DF/*152737*/,0x0040/*000100*/,0xFF70/*177560*/,0x0087/*000207*/, 0x0030/*000060*/,0x15DF/*012737*/,0x0080/*000200*/,0x0032/*000062*/,0xD5DF/*152737*/,0x0040/*000100*/,0xFF70/*177560*/,0x0087/*000207*/,
0x1026/*010046*/,0x97C0/*113700*/,0xFF72/*177562*/,0xA017/*120027*/,0x000D/*000015*/,0x032D/*001455*/,0xA017/*120027*/,0x007F/*000177*/, 0x1026/*010046*/,0x97C0/*113700*/,0xFF72/*177562*/,0xA017/*120027*/,0x000D/*000015*/,0x032D/*001455*/,0xA017/*120027*/,0x007F/*000177*/,
0x0303/*001403*/,0xA017/*120027*/,0x0008/*000010*/,0x020A/*001012*/,0x0BF7/*005767*/,0xFFC6/*177706*/,0x0306/*001406*/,0x0AF7/*005367*/, 0x0303/*001403*/,0xA017/*120027*/,0x0008/*000010*/,0x020A/*001012*/,0x0BF7/*005767*/,0xFFC6/*177706*/,0x0306/*001406*/,0x0AF7/*005367*/,
0xFFC0/*177700*/,0x15C0/*012700*/,0xC21F/*141037*/,0x09F7/*004767*/,0xFF7E/*177576*/,0x012B/*000453*/,0xA017/*120027*/,0x0020/*000040*/, 0xFFC0/*177700*/,0x15C0/*012700*/,0xC227/*141047*/,0x09F7/*004767*/,0xFF7E/*177576*/,0x012B/*000453*/,0xA017/*120027*/,0x0020/*000040*/,
0x0528/*002450*/,0xA017/*120027*/,0x007F/*000177*/,0x0425/*002045*/,0x09F7/*004767*/,0xFF5E/*177536*/,0xA017/*120027*/,0x007A/*000172*/, 0x0528/*002450*/,0xA017/*120027*/,0x007F/*000177*/,0x0425/*002045*/,0x09F7/*004767*/,0xFF5E/*177536*/,0xA017/*120027*/,0x007A/*000172*/,
0x0605/*003005*/,0xA017/*120027*/,0x0061/*000141*/,0x0502/*002402*/,0xC5C0/*142700*/,0x0020/*000040*/,0x2DD7/*026727*/,0xFF92/*177622*/, 0x0605/*003005*/,0xA017/*120027*/,0x0061/*000141*/,0x0502/*002402*/,0xC5C0/*142700*/,0x0020/*000040*/,0x2DD7/*026727*/,0xFF92/*177622*/,
0x00AC/*000254*/,0x0417/*002027*/,0x9026/*110046*/,0x1DC0/*016700*/,0xFF86/*177606*/,0x6DC0/*066700*/,0xFF84/*177604*/,0x9588/*112610*/, 0x00AC/*000254*/,0x0417/*002027*/,0x9026/*110046*/,0x1DC0/*016700*/,0xFF86/*177606*/,0x6DC0/*066700*/,0xFF84/*177604*/,0x9588/*112610*/,
0x0AB7/*005267*/,0xFF7E/*177576*/,0x010E/*000416*/,0x1DC0/*016700*/,0xFF76/*177566*/,0x6DC0/*066700*/,0xFF74/*177564*/,0x8A08/*105010*/, 0x0AB7/*005267*/,0xFF7E/*177576*/,0x010E/*000416*/,0x1DC0/*016700*/,0xFF76/*177566*/,0x6DC0/*066700*/,0xFF74/*177564*/,0x8A08/*105010*/,
0x15DF/*012737*/,0xC146/*140506*/,0x00A0/*000240*/,0x15DF/*012737*/,0x0040/*000100*/,0x00A2/*000242*/,0x15DF/*012737*/,0x0400/*002000*/, 0x15DF/*012737*/,0xC146/*140506*/,0x00A0/*000240*/,0x15DF/*012737*/,0x0040/*000100*/,0x00A2/*000242*/,0x15DF/*012737*/,0x0400/*002000*/,
0xFFFA/*177772*/,0x1580/*012600*/,0x0002/*000002*/,0x0A1F/*005037*/,0xFFFA/*177772*/,0x1026/*010046*/,0x1066/*010146*/,0x10A6/*010246*/, 0xFFFA/*177772*/,0x1580/*012600*/,0x0002/*000002*/,0x0A1F/*005037*/,0xFFFA/*177772*/,0x1026/*010046*/,0x1066/*010146*/,0x10A6/*010246*/,
0x10E6/*010346*/,0x1126/*010446*/,0x15C0/*012700*/,0xC21C/*141034*/,0x09F7/*004767*/,0xFF0C/*177414*/,0xB5DF/*132737*/,0x0040/*000100*/, 0x10E6/*010346*/,0x1126/*010446*/,0x15C0/*012700*/,0xC224/*141044*/,0x09F7/*004767*/,0xFF0C/*177414*/,0xB5DF/*132737*/,0x0040/*000100*/,
0xFF74/*177564*/,0x02FC/*001374*/,0x0A04/*005004*/,0x15C3/*012703*/,0xC223/*141043*/,0x94C0/*112300*/,0x0319/*001431*/,0x1DC2/*016702*/, 0xFF74/*177564*/,0x02FC/*001374*/,0x0A04/*005004*/,0x15C3/*012703*/,0xC22B/*141053*/,0x94C0/*112300*/,0x0319/*001431*/,0x1DC2/*016702*/,
0xFF2E/*177456*/,0x9481/*112201*/,0x0319/*001431*/,0xA057/*120127*/,0x0020/*000040*/,0x03FB/*001773*/,0xA001/*120001*/,0x0208/*001010*/, 0xFF2E/*177456*/,0x9481/*112201*/,0x0319/*001431*/,0xA057/*120127*/,0x0020/*000040*/,0x03FB/*001773*/,0xA001/*120001*/,0x0208/*001010*/,
0x94C0/*112300*/,0x030A/*001412*/,0x9481/*112201*/,0x0308/*001410*/,0xA057/*120127*/,0x0020/*000040*/,0x02F7/*001367*/,0x0104/*000404*/, 0x94C0/*112300*/,0x030A/*001412*/,0x9481/*112201*/,0x0308/*001410*/,0xA057/*120127*/,0x0020/*000040*/,0x02F7/*001367*/,0x0104/*000404*/,
0x94C0/*112300*/,0x02FE/*001376*/,0x0A84/*005204*/,0x01E9/*000751*/,0x0CC4/*006304*/,0x09FC/*004774*/,0xC1C0/*140700*/,0x0104/*000404*/, 0x94C0/*112300*/,0x02FE/*001376*/,0x0A84/*005204*/,0x01E9/*000751*/,0x0CC4/*006304*/,0x09FC/*004774*/,0xC1C0/*140700*/,0x0104/*000404*/,
0x15C0/*012700*/,0xC23F/*141077*/,0x09F7/*004767*/,0xFEC0/*177300*/,0x0A37/*005067*/,0xFEF6/*177366*/,0x15C0/*012700*/,0xC269/*141151*/, 0x15C0/*012700*/,0xC24C/*141114*/,0x09F7/*004767*/,0xFEC0/*177300*/,0x0A37/*005067*/,0xFEF6/*177366*/,0x15C0/*012700*/,0xC276/*141166*/,
0x09F7/*004767*/,0xFEB4/*177264*/,0x1584/*012604*/,0x1583/*012603*/,0x1582/*012602*/,0x1581/*012601*/,0x1580/*012600*/,0x0002/*000002*/, 0x09F7/*004767*/,0xFEB4/*177264*/,0x1584/*012604*/,0x1583/*012603*/,0x1582/*012602*/,0x1581/*012601*/,0x1580/*012600*/,0x0002/*000002*/,
0xC428/*142050*/,0xC2A4/*141244*/,0xC2B0/*141260*/,0xC2F4/*141364*/,0xC29A/*141232*/,0x4F43/*047503*/,0x4D4D/*046515*/,0x4E41/*047101*/, 0xC5AE/*142656*/,0xC2C4/*141304*/,0xC2D0/*141320*/,0xC316/*141426*/,0xC47A/*142172*/,0xC2BA/*141272*/,0x4F43/*047503*/,0x4D4D/*046515*/,
0x5344/*051504*/,0x4120/*040440*/,0x4552/*042522*/,0x4220/*041040*/,0x4F4F/*047517*/,0x2C54/*026124*/,0x4820/*044040*/,0x4C41/*046101*/, 0x4E41/*047101*/,0x5344/*051504*/,0x4120/*040440*/,0x4552/*042522*/,0x4220/*041040*/,0x4F4F/*047517*/,0x2C54/*026124*/,0x4820/*044040*/,
0x2C54/*026124*/,0x4C20/*046040*/,0x4749/*043511*/,0x5448/*052110*/,0x2C53/*026123*/,0x5420/*052040*/,0x5345/*051505*/,0x2054/*020124*/, 0x4C41/*046101*/,0x2C54/*026124*/,0x5420/*052040*/,0x5345/*051505*/,0x2C54/*026124*/,0x4420/*042040*/,0x4149/*040511*/,0x2C47/*026107*/,
0x4E41/*047101*/,0x2044/*020104*/,0x4548/*042510*/,0x504C/*050114*/,0x0A0D/*005015*/,0x4F42/*047502*/,0x544F/*052117*/,0x4420/*042040*/, 0x4C20/*046040*/,0x4749/*043511*/,0x5448/*052110*/,0x2053/*020123*/,0x4E41/*047101*/,0x2044/*020104*/,0x4548/*042510*/,0x504C/*050114*/,
0x5645/*053105*/,0x4349/*041511*/,0x5345/*051505*/,0x4120/*040440*/,0x4552/*042522*/,0x5220/*051040*/,0x3F4B/*037513*/,0x5220/*051040*/, 0x0A0D/*005015*/,0x4F42/*047502*/,0x544F/*052117*/,0x4420/*042040*/,0x5645/*053105*/,0x4349/*041511*/,0x5345/*051505*/,0x4120/*040440*/,
0x3F4C/*037514*/,0x4F20/*047440*/,0x2052/*020122*/,0x5052/*050122*/,0x0D3F/*006477*/,0x000A/*000012*/,0x0A0D/*005015*/,0x0800/*004000*/, 0x4552/*042522*/,0x5220/*051040*/,0x3F4B/*037513*/,0x5220/*051040*/,0x3F4C/*037514*/,0x4F20/*047440*/,0x2052/*020122*/,0x5052/*050122*/,
0x0820/*004040*/,0x4200/*041000*/,0x4F4F/*047517*/,0x0054/*000124*/,0x4148/*040510*/,0x544C/*052114*/,0x5400/*052000*/,0x5345/*051505*/, 0x0D3F/*006477*/,0x000A/*000012*/,0x0A0D/*005015*/,0x0800/*004000*/,0x0820/*004040*/,0x4200/*041000*/,0x4F4F/*047517*/,0x0054/*000124*/,
0x0054/*000124*/,0x494C/*044514*/,0x4847/*044107*/,0x5354/*051524*/,0x4800/*044000*/,0x4C45/*046105*/,0x0050/*000120*/,0x5500/*052400*/, 0x4148/*040510*/,0x544C/*052114*/,0x5400/*052000*/,0x5345/*051505*/,0x0054/*000124*/,0x4944/*044504*/,0x4741/*043501*/,0x4C00/*046000*/,
0x4B4E/*045516*/,0x4F4E/*047516*/,0x4E57/*047127*/,0x4320/*041440*/,0x4D4F/*046517*/,0x414D/*040515*/,0x444E/*042116*/,0x0D0A/*006412*/, 0x4749/*043511*/,0x5448/*052110*/,0x0053/*000123*/,0x4548/*042510*/,0x504C/*050114*/,0x0000/*000000*/,0x4E55/*047125*/,0x4E4B/*047113*/,
0x5000/*050000*/,0x5044/*050104*/,0x312D/*030455*/,0x2031/*020061*/,0x4F4D/*047515*/,0x494E/*044516*/,0x4F54/*047524*/,0x2052/*020122*/, 0x574F/*053517*/,0x204E/*020116*/,0x4F43/*047503*/,0x4D4D/*046515*/,0x4E41/*047101*/,0x0A44/*005104*/,0x000D/*000015*/,0x4450/*042120*/,
0x3156/*030526*/,0x302E/*030056*/,0x0D0A/*006412*/,0x0D0A/*006412*/,0x4200/*041000*/,0x4F4F/*047517*/,0x3E54/*037124*/,0x0020/*000040*/, 0x2D50/*026520*/,0x3131/*030461*/,0x4D20/*046440*/,0x4E4F/*047117*/,0x5449/*052111*/,0x524F/*051117*/,0x5620/*053040*/,0x2E31/*027061*/,
0x4E55/*047125*/,0x4E4B/*047113*/,0x574F/*053517*/,0x204E/*020116*/,0x4F42/*047502*/,0x544F/*052117*/,0x4420/*042040*/,0x5645/*053105*/, 0x0A30/*005060*/,0x0A0D/*005015*/,0x000D/*000015*/,0x4F42/*047502*/,0x544F/*052117*/,0x203E/*020076*/,0x5500/*052400*/,0x4B4E/*045516*/,
0x4349/*041511*/,0x0A45/*005105*/,0x000D/*000015*/,0x2020/*020040*/,0x2020/*020040*/,0x2020/*020040*/,0x4C43/*046103*/,0x434F/*041517*/, 0x4F4E/*047516*/,0x4E57/*047127*/,0x4220/*041040*/,0x4F4F/*047517*/,0x2054/*020124*/,0x4544/*042504*/,0x4956/*044526*/,0x4543/*042503*/,
0x204B/*020113*/,0x4954/*044524*/,0x4B43/*045503*/,0x0A53/*005123*/,0x000D/*000015*/,0x15C0/*012700*/,0xC1CA/*140712*/,0x09F7/*004767*/, 0x0D0A/*006412*/,0x2000/*020000*/,0x2020/*020040*/,0x2020/*020040*/,0x4320/*041440*/,0x4F4C/*047514*/,0x4B43/*045503*/,0x5420/*052040*/,
0xFDC6/*176706*/,0x0087/*000207*/,0x0000/*000000*/,0x15C0/*012700*/,0xC21C/*141034*/,0x09F7/*004767*/,0xFDBA/*176672*/,0x0087/*000207*/, 0x4349/*041511*/,0x534B/*051513*/,0x0D0A/*006412*/,0x2000/*020000*/,0x2020/*020040*/,0x2020/*020040*/,0x4920/*044440*/,0x4554/*042524*/,
0x0A37/*005067*/,0xFD9E/*176636*/,0x15C5/*012705*/,0x1A00/*015000*/,0x115F/*010537*/,0xFF78/*177570*/,0x1144/*010504*/,0x0C84/*006204*/, 0x4152/*040522*/,0x4954/*044524*/,0x4E4F/*047117*/,0x0A53/*005123*/,0x000D/*000015*/,0x15C0/*012700*/,0xC1CC/*140714*/,0x09F7/*004767*/,
0xFDA6/*176646*/,0x0087/*000207*/,0x0000/*000000*/,0x15C0/*012700*/,0xC224/*141044*/,0x09F7/*004767*/,0xFD9A/*176632*/,0x0087/*000207*/,
0x0A37/*005067*/,0xFD7E/*176576*/,0x15C5/*012705*/,0x1A00/*015000*/,0x115F/*010537*/,0xFF78/*177570*/,0x1144/*010504*/,0x0C84/*006204*/,
0x0A00/*005000*/,0x1141/*010501*/,0x7204/*071004*/,0x1002/*010002*/,0x7084/*070204*/,0x60C1/*060301*/,0x2045/*020105*/,0x0301/*001401*/, 0x0A00/*005000*/,0x1141/*010501*/,0x7204/*071004*/,0x1002/*010002*/,0x7084/*070204*/,0x60C1/*060301*/,0x2045/*020105*/,0x0301/*001401*/,
0x0000/*000000*/,0x7F0A/*077412*/,0x7F4F/*077517*/,0x15C0/*012700*/,0xC28B/*141213*/,0x1DC3/*016703*/,0xFD74/*176564*/,0x0A02/*005002*/, 0x0000/*000000*/,0x7F0A/*077412*/,0x7F4F/*077517*/,0x15C0/*012700*/,0xC298/*141230*/,0x1DC3/*016703*/,0xFD54/*176524*/,0x0A02/*005002*/,
0x7297/*071227*/,0x0008/*000010*/,0x65C3/*062703*/,0x0030/*000060*/,0x90E0/*110340*/,0x1083/*010203*/,0x02F8/*001370*/,0x09F7/*004767*/, 0x7297/*071227*/,0x0008/*000010*/,0x65C3/*062703*/,0x0030/*000060*/,0x90E0/*110340*/,0x1083/*010203*/,0x02F8/*001370*/,0x09F7/*004767*/,
0xFD76/*176566*/,0x0087/*000207*/,0x15C3/*012703*/,0x7F06/*077406*/,0x0A02/*005002*/,0x0A01/*005001*/,0x15C0/*012700*/,0x0008/*000010*/, 0xFD56/*176526*/,0x0087/*000207*/,0x0000/*000000*/,0x0A37/*005067*/,0xFFFA/*177772*/,0x0A37/*005067*/,0xFD34/*176464*/,0x0A05/*005005*/,
0x10F1/*010361*/,0xF4C0/*172300*/,0x10B1/*010261*/,0xF4E0/*172340*/,0x10F1/*010361*/,0xF4D0/*172320*/,0x10B1/*010261*/,0xF4F0/*172360*/, 0x8104/*100404*/,0x8503/*102403*/,0x8202/*101002*/,0x0501/*002401*/,0x8301/*101401*/,0x0000/*000000*/,0x0AC5/*005305*/,0x8003/*100003*/,
0x10F1/*010361*/,0xF480/*172200*/,0x10B1/*010261*/,0xF4A0/*172240*/,0x10F1/*010361*/,0xF490/*172220*/,0x10B1/*010261*/,0xF4B0/*172260*/, 0x0302/*001402*/,0x0401/*002001*/,0x0701/*003401*/,0x0000/*000000*/,0x0C05/*006005*/,0x8402/*102002*/,0x8601/*103001*/,0x0201/*001001*/,
0x10F1/*010361*/,0xFF80/*177600*/,0x10B1/*010261*/,0xFFA0/*177640*/,0x10F1/*010361*/,0xFF90/*177620*/,0x10F1/*010361*/,0xFFB0/*177660*/, 0x0000/*000000*/,0x95DF/*112737*/,0x000F/*000017*/,0xFFFE/*177776*/,0x8004/*100004*/,0x8403/*102003*/,0x0502/*002402*/,0x8201/*101001*/,
0x65C2/*062702*/,0x0080/*000200*/,0x65C1/*062701*/,0x0002/*000002*/,0x7E1D/*077035*/,0x55DF/*052737*/,0xFC00/*176000*/,0xF4FE/*172376*/, 0x8101/*100401*/,0x0000/*000000*/,0x15C3/*012703*/,0x7FFF/*077777*/,0x65C3/*062703*/,0x7FFF/*077777*/,0xA7D7/*123727*/,0xFFFE/*177776*/,
0x55DF/*052737*/,0xFC00/*176000*/,0xF4BE/*172276*/,0x55DF/*052737*/,0xFC00/*176000*/,0xFFBE/*177676*/,0x15DF/*012737*/,0x003F/*000077*/, 0x0005/*000005*/,0x0201/*001001*/,0x0000/*000000*/,0x95C4/*112704*/,0x03C0/*001700*/,0x8003/*100003*/,0x2117/*020427*/,0xFFC0/*177700*/,
0xF54E/*172516*/,0x15DF/*012737*/,0x0001/*000001*/,0xFF7A/*177572*/,0x15DF/*012737*/,0x03C0/*001700*/,0xF4A4/*172244*/,0x15DF/*012737*/, 0x0301/*001401*/,0x0000/*000000*/,0x8A04/*105004*/,0x2117/*020427*/,0xFF00/*177400*/,0x0301/*001401*/,0x0000/*000000*/,0x15C5/*012705*/,
0x03C0/*001700*/,0xF4B4/*172264*/,0x15DF/*012737*/,0x1000/*010000*/,0xFFFE/*177776*/,0x15C3/*012703*/,0x4080/*040200*/,0x15C2/*012702*/, 0xAAAA/*125252*/,0x1140/*010500*/,0x1001/*010001*/,0x1042/*010102*/,0x1083/*010203*/,0x10C4/*010304*/,0x1105/*010405*/,0xE141/*160501*/,
0xC384/*141604*/,0x14A6/*012246*/,0x0D93/*006623*/,0x2097/*020227*/,0xC428/*142050*/,0x87FB/*103773*/,0x15F7/*012767*/,0x4080/*040200*/, 0x0501/*002401*/,0x0301/*001401*/,0x0000/*000000*/,0x0C42/*006102*/,0x8601/*103001*/,0x0501/*002401*/,0x0000/*000000*/,0x6083/*060203*/,
0xFCCE/*176316*/,0x0087/*000207*/,0x15C0/*012700*/,0x001F/*000037*/,0x15C1/*012701*/,0xF800/*174000*/,0x35DF/*032737*/,0x0001/*000001*/, 0x0A83/*005203*/,0x0A43/*005103*/,0x60C1/*060301*/,0x8701/*103401*/,0x0701/*003401*/,0x0000/*000000*/,0x0C04/*006004*/,0x5103/*050403*/,
0xFF78/*177570*/,0x030C/*001414*/,0x15C0/*012700*/,0x0F0F/*007417*/,0x1001/*010001*/,0x0A41/*005101*/,0x35DF/*032737*/,0x0002/*000002*/, 0x6143/*060503*/,0x0A83/*005203*/,0x8702/*103402*/,0x0AC1/*005301*/,0x0501/*002401*/,0x0000/*000000*/,0x0A40/*005100*/,0x8301/*101401*/,
0xFF78/*177570*/,0x0304/*001404*/,0x15C0/*012700*/,0x3C73/*036163*/,0x15C1/*012701*/,0x3E00/*037000*/,0x1042/*010102*/,0xE5C2/*162702*/, 0x0000/*000000*/,0x4001/*040001*/,0x6041/*060101*/,0x0601/*003001*/,0x0701/*003401*/,0x0000/*000000*/,0x00C1/*000301*/,0x2057/*020127*/,
0x0002/*000002*/,0x45C2/*042702*/,0x0001/*000001*/,0x1083/*010203*/,0x45C3/*042703*/,0xFFC1/*177701*/,0x15F3/*012763*/,0x0001/*000001*/, 0x5455/*052125*/,0x0204/*001004*/,0x3105/*030405*/,0x0602/*003002*/,0x0A45/*005105*/,0x0201/*001001*/,0x0000/*000000*/,0x95C0/*112700*/,
0x4000/*040000*/,0x65C3/*062703*/,0x0002/*000002*/,0x15F3/*012763*/,0x004B/*000113*/,0x4000/*040000*/,0x1084/*010204*/,0x7517/*072427*/, 0xFF01/*177401*/,0x8001/*100001*/,0x0000/*000000*/,0x7E02/*077002*/,0x0A01/*005001*/,0x0A81/*005201*/,0x7E02/*077002*/,0x0BC0/*005700*/,
0xFFFA/*177772*/,0x45C4/*042704*/,0xFF80/*177600*/,0x15C5/*012705*/,0x03C0/*001700*/,0xE105/*160405*/,0x1084/*010204*/,0x7517/*072427*/, 0x0202/*001002*/,0x0BC1/*005701*/,0x0301/*001401*/,0x0000/*000000*/,0x15C7/*012707*/,0xC3FE/*141776*/,0x0000/*000000*/,0x0BD7/*005727*/,
0xFFF4/*177764*/,0x45C4/*042704*/,0xFFF1/*177761*/,0x1174/*010564*/,0xF4A0/*172240*/,0x1043/*010103*/,0x74D7/*072327*/,0xFFF4/*177764*/, 0x0000/*000000*/,0x15E6/*012746*/,0xC40A/*142012*/,0x0087/*000207*/,0x0000/*000000*/,0x0A26/*005046*/,0x15E6/*012746*/,0xC414/*142024*/,
0x45C3/*042703*/,0xFFF1/*177761*/,0x20C4/*020304*/,0x030A/*001412*/,0x1044/*010104*/,0x7517/*072427*/,0xFFFA/*177772*/,0x45C4/*042704*/, 0x0002/*000002*/,0x0000/*000000*/,0x005F/*000137*/,0xC41A/*142032*/,0x0000/*000000*/,0x15C5/*012705*/,0x0003/*000003*/,0x0A1F/*005037*/,
0xFF80/*177600*/,0x15C5/*012705*/,0x03C0/*001700*/,0xE105/*160405*/,0x1173/*010563*/,0xF4A0/*172240*/,0x15C4/*012704*/,0x0003/*000003*/, 0x0006/*000006*/,0x15DF/*012737*/,0xC42C/*142054*/,0x0004/*000004*/,0x0BE5/*005745*/,0x0000/*000000*/,0x65C6/*062706*/,0x0004/*000004*/,
0x67C4/*063704*/,0xFF78/*177570*/,0x15C3/*012703*/,0x0002/*000002*/,0x61C3/*060703*/,0x004A/*000112*/,0x7F02/*077402*/,0x1002/*010002*/, 0x0A00/*005000*/,0x15C1/*012701*/,0x0FFF/*007777*/,0x1002/*010002*/,0x65C2/*062702*/,0x0005/*000005*/,0x2432/*022062*/,0xFFFB/*177773*/,
0x0C02/*006002*/,0x0C41/*006101*/,0x0C00/*006000*/,0x01C2/*000702*/,0x0A03/*005003*/,0x9481/*112201*/,0x0365/*001545*/,0xA057/*120127*/, 0x0302/*001402*/,0x0000/*000000*/,0x0000/*000000*/,0x7E49/*077111*/,0x0AB7/*005267*/,0xFEC8/*177310*/,0x8601/*103001*/,0x0000/*000000*/,
0x0020/*000040*/,0x03FB/*001773*/,0xA057/*120127*/,0x0052/*000122*/,0x0305/*001405*/,0x15C0/*012700*/,0xC270/*141160*/,0x09F7/*004767*/, 0x2DD7/*026727*/,0xFBFE/*175776*/,0x0480/*002200*/,0x8202/*101002*/,0x0077/*000167*/,0xFEC2/*177302*/,0x15C0/*012700*/,0xC2AC/*141254*/,
0xFC26/*176046*/,0x0087/*000207*/,0x9481/*112201*/,0x9480/*112200*/,0x030E/*001416*/,0xA017/*120027*/,0x0020/*000040*/,0x030B/*001413*/, 0x1DC3/*016703*/,0xFEB0/*177260*/,0x0A02/*005002*/,0x7297/*071227*/,0x0008/*000010*/,0x65C3/*062703*/,0x0030/*000060*/,0x90E0/*110340*/,
0xA017/*120027*/,0x0037/*000067*/,0x0619/*003031*/,0xE5C0/*162700*/,0x0030/*000060*/,0x0516/*002426*/,0x0CC3/*006303*/,0x0CC3/*006303*/, 0x1083/*010203*/,0x02F8/*001370*/,0x09F7/*004767*/,0xFBF0/*175760*/,0x0087/*000207*/,0x15C3/*012703*/,0x7F06/*077406*/,0x0A02/*005002*/,
0x0CC3/*006303*/,0x5003/*050003*/,0x01F0/*000760*/,0x0A02/*005002*/,0x15D2/*012722*/,0x005F/*000137*/,0x15D2/*012722*/,0xC000/*140000*/, 0x0A01/*005001*/,0x15C0/*012700*/,0x0008/*000010*/,0x10F1/*010361*/,0xF4C0/*172300*/,0x10B1/*010261*/,0xF4E0/*172340*/,0x10F1/*010361*/,
0x15D2/*012722*/,0xC000/*140000*/,0x0A12/*005022*/,0xA057/*120127*/,0x004B/*000113*/,0x033E/*001476*/,0xA057/*120127*/,0x004C/*000114*/, 0xF4D0/*172320*/,0x10B1/*010261*/,0xF4F0/*172360*/,0x10F1/*010361*/,0xF480/*172200*/,0x10B1/*010261*/,0xF4A0/*172240*/,0x10F1/*010361*/,
0x0308/*001410*/,0xA057/*120127*/,0x0050/*000120*/,0x034F/*001517*/,0x15C0/*012700*/,0xC23F/*141077*/,0x09F7/*004767*/,0xFBD8/*175730*/, 0xF490/*172220*/,0x10B1/*010261*/,0xF4B0/*172260*/,0x10F1/*010361*/,0xFF80/*177600*/,0x10B1/*010261*/,0xFFA0/*177640*/,0x10F1/*010361*/,
0x0087/*000207*/,0x0005/*000005*/,0x00C3/*000303*/,0x15C1/*012701*/,0xF900/*174400*/,0x15F1/*012761*/,0x000B/*000013*/,0x0004/*000004*/, 0xFF90/*177620*/,0x10F1/*010361*/,0xFFB0/*177660*/,0x65C2/*062702*/,0x0080/*000200*/,0x65C1/*062701*/,0x0002/*000002*/,0x7E1D/*077035*/,
0x55C3/*052703*/,0x0004/*000004*/,0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x8A03/*105003*/,0x55C3/*052703*/,0x0008/*000010*/, 0x55DF/*052737*/,0xFC00/*176000*/,0xF4FE/*172376*/,0x55DF/*052737*/,0xFC00/*176000*/,0xF4BE/*172276*/,0x55DF/*052737*/,0xFC00/*176000*/,
0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x1C42/*016102*/,0x0006/*000006*/,0x45C2/*042702*/,0x003F/*000077*/,0x0A82/*005202*/, 0xFFBE/*177676*/,0x15DF/*012737*/,0x003F/*000077*/,0xF54E/*172516*/,0x15DF/*012737*/,0x0001/*000001*/,0xFF7A/*177572*/,0x15DF/*012737*/,
0x10B1/*010261*/,0x0004/*000004*/,0x8A03/*105003*/,0x55C3/*052703*/,0x0006/*000006*/,0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/, 0x03C0/*001700*/,0xF4A4/*172244*/,0x15DF/*012737*/,0x03C0/*001700*/,0xF4B4/*172264*/,0x15DF/*012737*/,0x1000/*010000*/,0xFFFE/*177776*/,
0x0A31/*005061*/,0x0002/*000002*/,0x0A31/*005061*/,0x0004/*000004*/,0x15F1/*012761*/,0xFE00/*177000*/,0x0006/*000006*/,0x8A03/*105003*/, 0x15C3/*012703*/,0x4080/*040200*/,0x15C2/*012702*/,0xC50A/*142412*/,0x14A6/*012246*/,0x0D93/*006623*/,0x2097/*020227*/,0xC5AE/*142656*/,
0x55C3/*052703*/,0x000C/*000014*/,0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x45C9/*042711*/,0x00FF/*000377*/,0x0A02/*005002*/, 0x87FB/*103773*/,0x15F7/*012767*/,0x4080/*040200*/,0xFB48/*175510*/,0x0087/*000207*/,0x15C0/*012700*/,0x001F/*000037*/,0x15C1/*012701*/,
0x0A03/*005003*/,0x0A04/*005004*/,0x0A05/*005005*/,0x0A07/*005007*/,0x0005/*000005*/,0x00C3/*000303*/,0x0CC3/*006303*/,0x0CC3/*006303*/, 0xF800/*174000*/,0x35DF/*032737*/,0x0001/*000001*/,0xFF78/*177570*/,0x030C/*001414*/,0x15C0/*012700*/,0x0F0F/*007417*/,0x1001/*010001*/,
0x0CC3/*006303*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x15C1/*012701*/,0xFF0A/*177412*/,0x10C9/*010311*/,0x0A21/*005041*/,0x15E1/*012741*/, 0x0A41/*005101*/,0x35DF/*032737*/,0x0002/*000002*/,0xFF78/*177570*/,0x0304/*001404*/,0x15C0/*012700*/,0x3C73/*036163*/,0x15C1/*012701*/,
0xFE00/*177000*/,0x15E1/*012741*/,0x0005/*000005*/,0x0A02/*005002*/,0x0A03/*005003*/,0x0A04/*005004*/,0x0A05/*005005*/,0x8BC9/*105711*/, 0x3E00/*037000*/,0x1042/*010102*/,0xE5C2/*162702*/,0x0002/*000002*/,0x45C2/*042702*/,0x0001/*000001*/,0x1083/*010203*/,0x45C3/*042703*/,
0x80FE/*100376*/,0x8A09/*105011*/,0x0A07/*005007*/,0x0005/*000005*/,0x15C1/*012701*/,0xFDC0/*176700*/,0x15F1/*012761*/,0x0020/*000040*/, 0xFFC1/*177701*/,0x15F3/*012763*/,0x0001/*000001*/,0x4000/*040000*/,0x65C3/*062703*/,0x0002/*000002*/,0x15F3/*012763*/,0x004B/*000113*/,
0x0008/*000010*/,0x10F1/*010361*/,0x0008/*000010*/,0x15C9/*012711*/,0x0011/*000021*/,0x15F1/*012761*/,0x1000/*010000*/,0x001A/*000032*/, 0x4000/*040000*/,0x1084/*010204*/,0x7517/*072427*/,0xFFFA/*177772*/,0x45C4/*042704*/,0xFF80/*177600*/,0x15C5/*012705*/,0x03C0/*001700*/,
0x15F1/*012761*/,0xFE00/*177000*/,0x0002/*000002*/,0x0A31/*005061*/,0x0004/*000004*/,0x0A31/*005061*/,0x0006/*000006*/,0x0A31/*005061*/, 0xE105/*160405*/,0x1084/*010204*/,0x7517/*072427*/,0xFFF4/*177764*/,0x45C4/*042704*/,0xFFF1/*177761*/,0x1174/*010564*/,0xF4A0/*172240*/,
0x001C/*000034*/,0x15C9/*012711*/,0x0039/*000071*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x8A09/*105011*/,0x10C0/*010300*/,0x0A07/*005007*/] 0x1043/*010103*/,0x74D7/*072327*/,0xFFF4/*177764*/,0x45C3/*042703*/,0xFFF1/*177761*/,0x20C4/*020304*/,0x030A/*001412*/,0x1044/*010104*/,
0x7517/*072427*/,0xFFFA/*177772*/,0x45C4/*042704*/,0xFF80/*177600*/,0x15C5/*012705*/,0x03C0/*001700*/,0xE105/*160405*/,0x1173/*010563*/,
0xF4A0/*172240*/,0x15C4/*012704*/,0x0003/*000003*/,0x67C4/*063704*/,0xFF78/*177570*/,0x15C3/*012703*/,0x0002/*000002*/,0x61C3/*060703*/,
0x004A/*000112*/,0x7F02/*077402*/,0x1002/*010002*/,0x0C02/*006002*/,0x0C41/*006101*/,0x0C00/*006000*/,0x01C2/*000702*/,0x0A03/*005003*/,
0x9481/*112201*/,0x0365/*001545*/,0xA057/*120127*/,0x0020/*000040*/,0x03FB/*001773*/,0xA057/*120127*/,0x0052/*000122*/,0x0305/*001405*/,
0x15C0/*012700*/,0xC27D/*141175*/,0x09F7/*004767*/,0xFAA0/*175240*/,0x0087/*000207*/,0x9481/*112201*/,0x9480/*112200*/,0x030E/*001416*/,
0xA017/*120027*/,0x0020/*000040*/,0x030B/*001413*/,0xA017/*120027*/,0x0037/*000067*/,0x0619/*003031*/,0xE5C0/*162700*/,0x0030/*000060*/,
0x0516/*002426*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x5003/*050003*/,0x01F0/*000760*/,0x0A02/*005002*/,0x15D2/*012722*/,
0x005F/*000137*/,0x15D2/*012722*/,0xC000/*140000*/,0x15D2/*012722*/,0xC000/*140000*/,0x0A12/*005022*/,0xA057/*120127*/,0x004B/*000113*/,
0x033E/*001476*/,0xA057/*120127*/,0x004C/*000114*/,0x0308/*001410*/,0xA057/*120127*/,0x0050/*000120*/,0x034F/*001517*/,0x15C0/*012700*/,
0xC24C/*141114*/,0x09F7/*004767*/,0xFA52/*175122*/,0x0087/*000207*/,0x0005/*000005*/,0x00C3/*000303*/,0x15C1/*012701*/,0xF900/*174400*/,
0x15F1/*012761*/,0x000B/*000013*/,0x0004/*000004*/,0x55C3/*052703*/,0x0004/*000004*/,0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,
0x8A03/*105003*/,0x55C3/*052703*/,0x0008/*000010*/,0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x1C42/*016102*/,0x0006/*000006*/,
0x45C2/*042702*/,0x003F/*000077*/,0x0A82/*005202*/,0x10B1/*010261*/,0x0004/*000004*/,0x8A03/*105003*/,0x55C3/*052703*/,0x0006/*000006*/,
0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x0A31/*005061*/,0x0002/*000002*/,0x0A31/*005061*/,0x0004/*000004*/,0x15F1/*012761*/,
0xFE00/*177000*/,0x0006/*000006*/,0x8A03/*105003*/,0x55C3/*052703*/,0x000C/*000014*/,0x10C9/*010311*/,0x8BC9/*105711*/,0x80FE/*100376*/,
0x45C9/*042711*/,0x00FF/*000377*/,0x0A02/*005002*/,0x0A03/*005003*/,0x0A04/*005004*/,0x0A05/*005005*/,0x0A07/*005007*/,0x0005/*000005*/,
0x00C3/*000303*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x0CC3/*006303*/,0x15C1/*012701*/,0xFF0A/*177412*/,
0x10C9/*010311*/,0x0A21/*005041*/,0x15E1/*012741*/,0xFE00/*177000*/,0x15E1/*012741*/,0x0005/*000005*/,0x0A02/*005002*/,0x0A03/*005003*/,
0x0A04/*005004*/,0x0A05/*005005*/,0x8BC9/*105711*/,0x80FE/*100376*/,0x8A09/*105011*/,0x0A07/*005007*/,0x0005/*000005*/,0x15C1/*012701*/,
0xFDC0/*176700*/,0x15F1/*012761*/,0x0020/*000040*/,0x0008/*000010*/,0x10F1/*010361*/,0x0008/*000010*/,0x15C9/*012711*/,0x0011/*000021*/,
0x15F1/*012761*/,0x1000/*010000*/,0x001A/*000032*/,0x15F1/*012761*/,0xFE00/*177000*/,0x0002/*000002*/,0x0A31/*005061*/,0x0004/*000004*/,
0x0A31/*005061*/,0x0006/*000006*/,0x0A31/*005061*/,0x001C/*000034*/,0x15C9/*012711*/,0x0039/*000071*/,0x8BC9/*105711*/,0x80FE/*100376*/,
0x8A09/*105011*/,0x10C0/*010300*/,0x0A07/*005007*/]
} }

179
apps/pdp11/boot/monitor/BOOTMON.mac
View file

@ -174,13 +174,14 @@ CMD:
RTI RTI
CMDTBL: .WORD BOOT,HALT,TEST,LIGHTS,HELP CMDTBL: .WORD BOOT,HALT,TEST,DIAG,LIGHTS,HELP
HLPMSG: .ASCIZ 'COMMANDS ARE BOOT, HALT, LIGHTS, TEST AND HELP'<15><12>'BOOT DEVICES ARE RK? RL? OR RP?'<15><12> HLPMSG: .ASCIZ 'COMMANDS ARE BOOT, HALT, TEST, DIAG, LIGHTS AND HELP'<15><12>'BOOT DEVICES ARE RK? RL? OR RP?'<15><12>
EOL: .BYTE 15,12,0 EOL: .BYTE 15,12,0
DEL: .BYTE 10,40,10,0 DEL: .BYTE 10,40,10,0
CMDLST: .ASCIZ 'BOOT' CMDLST: .ASCIZ 'BOOT'
.ASCIZ 'HALT' .ASCIZ 'HALT'
.ASCIZ 'TEST' .ASCIZ 'TEST'
.ASCIZ 'DIAG'
.ASCIZ 'LIGHTS' .ASCIZ 'LIGHTS'
.ASCIZ 'HELP' .ASCIZ 'HELP'
.BYTE 0 .BYTE 0
@ -190,6 +191,7 @@ BANNER: .ASCIZ 'PDP-11 MONITOR V1.0'<12><15><12><15>
PROMPT: .ASCIZ 'BOOT> ' PROMPT: .ASCIZ 'BOOT> '
BADBOO: .ASCIZ 'UNKNOWN BOOT DEVICE'<12><15> BADBOO: .ASCIZ 'UNKNOWN BOOT DEVICE'<12><15>
PERMSG: .ASCIZ ' CLOCK TICKS'<12><15> PERMSG: .ASCIZ ' CLOCK TICKS'<12><15>
LOOMSG: .ASCIZ ' ITERATIONS'<12><15>
.EVEN .EVEN
@ -236,6 +238,179 @@ TEST:
JSR PC,PRINT JSR PC,PRINT
RTS PC RTS PC
LOOCNT: .WORD 0
DIAG:
CLR LOOCNT
CLR CLKTIC
DIAGLP:
CLR R5
BMI L1
BVS L1
BHI L1
BLT L1
BLOS L2
L1: HALT
L2: DEC R5
BPL L3
BEQ L3
BGE L3
BLE L4
L3: HALT
L4: ROR R5
BVC L5
BCC L5
BNE L6
L5: HALT
L6: MOVB #17,@#177776
BPL L7
BVC L7
BLT L7
BHI L7
BMI L8
L7: HALT
L8: MOV #77777,R3
ADD #77777,R3
CMPB @#177776,#5
BNE L9
HALT
L9: MOVB #1700,R4
BPL L10
CMP R4,#177700
BEQ L11
L10: HALT
L11: CLRB R4
CMP R4,#177400
BEQ L12
HALT
L12: MOV #125252,R5
MOV R5,R0
MOV R0,R1
MOV R1,R2
MOV R2,R3
MOV R3,R4
MOV R4,R5
SUB R5,R1
BLT NODIAG
BEQ L13
NODIAG: HALT
L13: ROL R2
BCC L14
BLT L15
L14: HALT
L15: ADD R2,R3
INC R3
COM R3
ADD R3,R1
BCS L16
BLE L17
L16: HALT
L17: ROR R4
BIS R4,R3
ADD R5,R3
INC R3
BCS L18
DEC R1
BLT L19
L18: HALT
L19: COM R0
BLOS L20
HALT
L20: BIC R0,R1
ADD R1,R1
BGT L21
BLE L22
L21: HALT
L22: SWAB R1
CMP R1,#052125
BNE L23
BIT R4,R5
BGT L23
COM R5
BNE L24
L23: HALT
L24: MOVB #177401,R0
BPL L26
L25: HALT
L26: SOB R0,L25
CLR R1
L27: INC R1
SOB R0,L27
TST R0
BNE L28
TST R1
BEQ L29
L28: HALT
L29: MOV #N1,PC
HALT
N1: TST (PC)+
HALT
N2: MOV #N3,-(SP)
RTS PC
HALT
N3: CLR -(SP)
MOV #N4,-(SP)
RTI
HALT
N4: JMP @#N5
HALT
N5: MOV #3,R5
CLR @#6
MOV #N6,@#4
TST -(R5)
HALT
N6: ADD #4,SP
CLR R0
MOV #7777,R1
N7: MOV R0,R2
ADD #5,R2
CMP (R0)+,-5(R2)
BEQ N8
HALT
D1: .WORD 0
N8: SOB R1,N7
INC LOOCNT
BCC 10$
HALT
10$: CMP CLKTIC,#2200
BHI 20$
JMP DIAGLP
20$: MOV #LOOMSG+5,R0
MOV LOOCNT,R3
25$: CLR R2
DIV #10,R2
ADD #'0,R3
MOVB R3,-(R0)
MOV R2,R3
BNE 25$
JSR PC,PRINT
RTS PC
MMR0=177572 MMR0=177572
MMR1=177574 MMR1=177574

906
apps/pdp11/boot/monitor/BOOTMON.txt
View file

@ -16,13 +16,13 @@
16 140002 005037 177776 CLR @#PSW 16 140002 005037 177776 CLR @#PSW
17 140006 012706 140000 MOV #START,SP 17 140006 012706 140000 MOV #START,SP
18 140012 005037 177564 CLR @#DL11XCSR ; CLEAR THE XCSR 18 140012 005037 177564 CLR @#DL11XCSR ; CLEAR THE XCSR
19 140016 012700 141121 MOV #BANNER,R0 19 140016 012700 141136 MOV #BANNER,R0
20 140022 004767 140150' JSR PC,PRINT 20 140022 004767 140150' JSR PC,PRINT
21 140026 012737 140124 000100 MOV #CLKAST,@#KW11VEC 21 140026 012737 140124 000100 MOV #CLKAST,@#KW11VEC
22 140034 012737 000340 000102 MOV #340,@#KW11VEC+2 22 140034 012737 000340 000102 MOV #340,@#KW11VEC+2
23 140042 052737 000100 177546 BIS #100,@#KW11LKS ; SET CLOCK TICKING 23 140042 052737 000100 177546 BIS #100,@#KW11LKS ; SET CLOCK TICKING
24 24
25 140050 012700 141151 MOV #PROMPT,R0 25 140050 012700 141166 MOV #PROMPT,R0
26 140054 004767 140150' JSR PC,PRINT 26 140054 004767 140150' JSR PC,PRINT
27 140060 162706 000256 SUB #256,SP 27 140060 162706 000256 SUB #256,SP
28 140064 010600 MOV SP,R0 28 140064 010600 MOV SP,R0
@ -92,7 +92,7 @@
92 140330 005767 140242' 2$: TST LENGTH ; DATA IN BUFFER? 92 140330 005767 140242' 2$: TST LENGTH ; DATA IN BUFFER?
93 140334 001406 BEQ 3$ 93 140334 001406 BEQ 3$
94 140336 005367 140242' DEC LENGTH ; LENGTH 94 140336 005367 140242' DEC LENGTH ; LENGTH
95 140342 012700 141037 MOV #DEL,R0 95 140342 012700 141047 MOV #DEL,R0
96 140346 004767 140150' JSR PC,PRINT 96 140346 004767 140150' JSR PC,PRINT
97 140352 000453 3$: BR 9$ 97 140352 000453 3$: BR 9$
98 140354 120027 000040 4$: CMPB R0,#40 98 140354 120027 000040 4$: CMPB R0,#40
@ -130,12 +130,12 @@
130 140516 010246 MOV R2,-(SP) 130 140516 010246 MOV R2,-(SP)
131 140520 010346 MOV R3,-(SP) 131 140520 010346 MOV R3,-(SP)
132 140522 010446 MOV R4,-(SP) 132 140522 010446 MOV R4,-(SP)
133 140524 012700 141034 MOV #EOL,R0 133 140524 012700 141044 MOV #EOL,R0
134 140530 004767 140150' JSR PC,PRINT 134 140530 004767 140150' JSR PC,PRINT
135 140534 132737 000100 177564 1$: BITB #100,@#177564 135 140534 132737 000100 177564 1$: BITB #100,@#177564
136 140542 001374 BNE 1$ 136 140542 001374 BNE 1$
137 140544 005004 CLR R4 137 140544 005004 CLR R4
138 140546 012703 141043 MOV #CMDLST,R3 ; CMD LIST 138 140546 012703 141053 MOV #CMDLST,R3 ; CMD LIST
139 140552 112300 3$: MOVB (R3)+,R0 139 140552 112300 3$: MOVB (R3)+,R0
140 140554 001431 BEQ 13$ 140 140554 001431 BEQ 13$
141 140556 016702 140240' MOV BUFFER,R2 ; USER CMD 141 140556 016702 140240' MOV BUFFER,R2 ; USER CMD
@ -160,11 +160,11 @@
160 140632 004774 140700 JSR PC,@CMDTBL(R4) ; EXECUTE 160 140632 004774 140700 JSR PC,@CMDTBL(R4) ; EXECUTE
161 140636 000404 BR 15$ 161 140636 000404 BR 15$
162 162
163 140640 012700 141077 13$: MOV #UNKMSG,R0 163 140640 012700 141114 13$: MOV #UNKMSG,R0
164 140644 004767 140150' JSR PC,PRINT 164 140644 004767 140150' JSR PC,PRINT
165 165
166 140650 005067 140242' 15$: CLR LENGTH 166 140650 005067 140242' 15$: CLR LENGTH
167 140654 012700 141151 MOV #PROMPT,R0 167 140654 012700 141166 MOV #PROMPT,R0
168 140660 004767 140150' JSR PC,PRINT 168 140660 004767 140150' JSR PC,PRINT
169 140664 012604 MOV (SP)+,R4 169 140664 012604 MOV (SP)+,R4
170 140666 012603 MOV (SP)+,R3 170 140666 012603 MOV (SP)+,R3
@ -174,360 +174,544 @@
174 140676 000002 RTI 174 140676 000002 RTI
175 175
176 176
177 140700 142050 141244 141260 CMDTBL: .WORD BOOT,HALT,TEST,LIGHTS,HELP 177 140700 142656 141304 141320 CMDTBL: .WORD BOOT,HALT,TEST,DIAG,LIGHTS,HELP
140706 141364 141232 140706 141426 142172 141272
178 140712 103 117 115 HLPMSG: .ASCIZ 'COMMANDS ARE BOOT, HALT, LIGHTS, TEST AND HELP'<15><12>'BOOT DEVICES ARE RK? RL? OR RP?'<15><12> 178 140714 103 117 115 HLPMSG: .ASCIZ 'COMMANDS ARE BOOT, HALT, TEST, DIAG, LIGHTS AND HELP'<15><12>'BOOT DEVICES ARE RK? RL? OR RP?'<15><12>
140715 115 101 116 140717 115 101 116
140720 104 123 040 140722 104 123 040
140723 101 122 105 140725 101 122 105
140726 040 102 117 140730 040 102 117
140731 117 124 054 140733 117 124 054
140734 040 110 101 140736 040 110 101
140737 114 124 054 140741 114 124 054
140742 040 114 111 140744 040 124 105
140745 107 110 124 140747 123 124 054
140750 123 054 040 140752 040 104 111
140753 124 105 123 140755 101 107 054
140756 124 040 101 140760 040 114 111
140761 116 104 040 140763 107 110 124
140764 110 105 114 140766 123 040 101
140767 120 015 012 140771 116 104 040
140772 102 117 117 140774 110 105 114
140775 124 040 104 140777 120 015 012
141000 105 126 111 141002 102 117 117
141003 103 105 123 141005 124 040 104
141006 040 101 122 141010 105 126 111
141011 105 040 122 141013 103 105 123
141014 113 077 040 141016 040 101 122
141017 122 114 077 141021 105 040 122
141022 040 117 122 141024 113 077 040
141025 040 122 120 141027 122 114 077
141030 077 015 012 141032 040 117 122
141033 000 141035 040 122 120
179 141034 015 012 000 EOL: .BYTE 15,12,0 141040 077 015 012
180 141037 010 040 010 DEL: .BYTE 10,40,10,0 141043 000
141042 000 179 141044 015 012 000 EOL: .BYTE 15,12,0
181 141043 102 117 117 CMDLST: .ASCIZ 'BOOT' 180 141047 010 040 010 DEL: .BYTE 10,40,10,0
141046 124 000 141052 000
182 141050 110 101 114 .ASCIZ 'HALT' 181 141053 102 117 117 CMDLST: .ASCIZ 'BOOT'
141053 124 000 141056 124 000
183 141055 124 105 123 .ASCIZ 'TEST' 182 141060 110 101 114 .ASCIZ 'HALT'
141060 124 000 141063 124 000
184 141062 114 111 107 .ASCIZ 'LIGHTS' 183 141065 124 105 123 .ASCIZ 'TEST'
141065 110 124 123 141070 124 000
141070 000 184 141072 104 111 101 .ASCIZ 'DIAG'
185 141071 110 105 114 .ASCIZ 'HELP' 141075 107 000
141074 120 000 185 141077 114 111 107 .ASCIZ 'LIGHTS'
186 141076 000 .BYTE 0 141102 110 124 123
187 141077 125 116 113 UNKMSG: .ASCIZ 'UNKNOWN COMMAND'<12><15> 141105 000
141102 116 117 127 186 141106 110 105 114 .ASCIZ 'HELP'
141105 116 040 103 141111 120 000
141110 117 115 115 187 141113 000 .BYTE 0
141113 101 116 104 188 141114 125 116 113 UNKMSG: .ASCIZ 'UNKNOWN COMMAND'<12><15>
141116 012 015 000 141117 116 117 127
188 141121 120 104 120 BANNER: .ASCIZ 'PDP-11 MONITOR V1.0'<12><15><12><15> 141122 116 040 103
141124 055 061 061 141125 117 115 115
141127 040 115 117 141130 101 116 104
141132 116 111 124 141133 012 015 000
141135 117 122 040 189 141136 120 104 120 BANNER: .ASCIZ 'PDP-11 MONITOR V1.0'<12><15><12><15>
141140 126 061 056 141141 055 061 061
141143 060 012 015 141144 040 115 117
141146 012 015 000 141147 116 111 124
189 ; 'ADAPTED FROM CODE BY PAUL NANKERVIS <PAULNANK@HOTMAIL.COM>'<12><15><12><15> 141152 117 122 040
190 141151 102 117 117 PROMPT: .ASCIZ 'BOOT> ' 141155 126 061 056
141154 124 076 040 141160 060 012 015
141157 000 141163 012 015 000
191 141160 125 116 113 BADBOO: .ASCIZ 'UNKNOWN BOOT DEVICE'<12><15> 190 ; 'ADAPTED FROM CODE BY PAUL NANKERVIS <PAULNANK@HOTMAIL.COM>'<12><15><12><15>
141163 116 117 127 191 141166 102 117 117 PROMPT: .ASCIZ 'BOOT> '
141166 116 040 102 141171 124 076 040
141171 117 117 124 141174 000
141174 040 104 105 192 141175 125 116 113 BADBOO: .ASCIZ 'UNKNOWN BOOT DEVICE'<12><15>
141177 126 111 103 141200 116 117 127
141202 105 012 015 141203 116 040 102
141205 000 141206 117 117 124
192 141206 040 040 040 PERMSG: .ASCIZ ' CLOCK TICKS'<12><15> 141211 040 104 105
141211 040 040 040 141214 126 111 103
141214 103 114 117 141217 105 012 015
141217 103 113 040 141222 000
141222 124 111 103 193 141223 040 040 040 PERMSG: .ASCIZ ' CLOCK TICKS'<12><15>
141225 113 123 012 141226 040 040 040
141230 015 000 141231 103 114 117
193 141234 103 113 040
194 .EVEN 141237 124 111 103
141242 113 123 012
141245 015 000
194 141247 040 040 040 LOOMSG: .ASCIZ ' ITERATIONS'<12><15>
141252 040 040 040
141255 111 124 105
141260 122 101 124
141263 111 117 116
141266 123 012 015
141271 000
195 195
196 HELP: 196 .EVEN
197 141232 012700 140712 MOV #HLPMSG,R0 197
198 141236 004767 140150' JSR PC,PRINT 198 HELP:
199 141242 000207 RTS PC 199 141272 012700 140714 MOV #HLPMSG,R0
200 200 141276 004767 140150' JSR PC,PRINT
201 HALT: 201 141302 000207 RTS PC
202 141244 000000 HALT 202
203 141246 012700 141034 MOV #EOL,R0 203 HALT:
204 141252 004767 140150' JSR PC,PRINT 204 141304 000000 HALT
205 141256 000207 RTS PC 205 141306 012700 141044 MOV #EOL,R0
206 206 141312 004767 140150' JSR PC,PRINT
207 TEST: 207 141316 000207 RTS PC
208 141260 005067 140122' CLR CLKTIC 208
209 209 TEST:
210 141264 012705 015000 MOV #15000,R5 210 141320 005067 140122' CLR CLKTIC
211 141270 010537 177570 10$: MOV R5,@#177570 ; DISPLAY 211
212 141274 010504 MOV R5,R4 212 141324 012705 015000 MOV #15000,R5
213 141276 006204 ASR R4 213 141330 010537 177570 10$: MOV R5,@#177570 ; DISPLAY
214 141300 005000 15$: CLR R0 214 141334 010504 MOV R5,R4
215 141302 010501 MOV R5,R1 215 141336 006204 ASR R4
216 141304 071004 DIV R4,R0 216 141340 005000 15$: CLR R0
217 141306 010002 MOV R0,R2 217 141342 010501 MOV R5,R1
218 141310 070204 MUL R4,R2 218 141344 071004 DIV R4,R0
219 141312 060301 ADD R3,R1 219 141346 010002 MOV R0,R2
220 141314 020105 CMP R1,R5 220 141350 070204 MUL R4,R2
221 141316 001401 BEQ 20$ 221 141352 060301 ADD R3,R1
222 141320 000000 HALT 222 141354 020105 CMP R1,R5
223 141322 077412 20$: SOB R4,15$ 223 141356 001401 BEQ 20$
224 141324 077517 SOB R5,10$ 224 141360 000000 HALT
225 225 141362 077412 20$: SOB R4,15$
226 141326 012700 141213 MOV #PERMSG+5,R0 226 141364 077517 SOB R5,10$
227 141332 016703 140122' MOV CLKTIC,R3 227
228 228 141366 012700 141230 MOV #PERMSG+5,R0
229 141336 005002 25$: CLR R2 229 141372 016703 140122' MOV CLKTIC,R3
230 141340 071227 000010 DIV #10,R2 230
231 141344 062703 000060 ADD #'0,R3 231 141376 005002 25$: CLR R2
232 141350 110340 MOVB R3,-(R0) 232 141400 071227 000010 DIV #10,R2
233 141352 010203 MOV R2,R3 233 141404 062703 000060 ADD #'0,R3
234 141354 001370 BNE 25$ 234 141410 110340 MOVB R3,-(R0)
235 235 141412 010203 MOV R2,R3
236 141356 004767 140150' JSR PC,PRINT 236 141414 001370 BNE 25$
237 141362 000207 RTS PC 237
238 238 141416 004767 140150' JSR PC,PRINT
239 239 141422 000207 RTS PC
240 177572 MMR0=177572 240
241 177574 MMR1=177574 241 141424 000000 LOOCNT: .WORD 0
242 177576 MMR2=177576 242
243 172516 MMR3=172516 243 DIAG:
244 244 141426 005067 141424' CLR LOOCNT
245 LIGHTS: 245 141432 005067 140122' CLR CLKTIC
246 141364 012703 077406 MOV #77406,R3 ; DEFAULT PDR 246 DIAGLP:
247 141370 005002 CLR R2 247 141436 005005 CLR R5
248 141372 005001 CLR R1 248 141440 100404 BMI L1
249 141374 012700 000010 MOV #8.,R0 249 141442 102403 BVS L1
250 141400 010361 172300 1$: MOV R3,172300(R1) ; KERNEL I PDR 250 141444 101002 BHI L1
251 141404 010261 172340 MOV R2,172340(R1) ; KERNEL I PAR 251 141446 002401 BLT L1
252 141410 010361 172320 MOV R3,172320(R1) ; KERNEL D PDR 252 141450 101401 BLOS L2
253 141414 010261 172360 MOV R2,172360(R1) ; KERNEL D PAR 253 141452 000000 L1: HALT
254 141420 010361 172200 MOV R3,172200(R1) ; SUPER I PDR 254
255 141424 010261 172240 MOV R2,172240(R1) ; SUPER I PAR 255 141454 005305 L2: DEC R5
256 141430 010361 172220 MOV R3,172220(R1) ; SUPER D PDR 256 141456 100003 BPL L3
257 141434 010261 172260 MOV R2,172260(R1) ; SUPER D PAR 257 141460 001402 BEQ L3
258 141440 010361 177600 MOV R3,177600(R1) ; USER I PDR 258 141462 002001 BGE L3
259 141444 010261 177640 MOV R2,177640(R1) ; USER I PAR 259 141464 003401 BLE L4
260 141450 010361 177620 MOV R3,177620(R1) ; USER D PDR 260 141466 000000 L3: HALT
261 141454 010361 177660 MOV R3,177660(R1) ; USER D PAR 261
262 141460 062702 000200 ADD #200,R2 262 141470 006005 L4: ROR R5
263 141464 062701 000002 ADD #2,R1 263 141472 102002 BVC L5
264 141470 077035 SOB R0,1$ 264 141474 103001 BCC L5
265 141472 052737 176000 172376 BIS #176000,@#172376 ; KERNEL D POINTS TO I/O SPACE 265 141476 001001 BNE L6
266 141500 052737 176000 172276 BIS #176000,@#172276 ; SUPER D POINTS TO I/O SPACE 266 141500 000000 L5: HALT
267 141506 052737 176000 177676 BIS #176000,@#177676 ; USER D POINTS TO I/O SPACE 267
268 141514 012737 000077 172516 MOV #77,@#MMR3 ; 77 FOR 22 BIT 268 141502 112737 000017 177776 L6: MOVB #17,@#177776
269 141522 012737 000001 177572 MOV #1,@#MMR0 269 141510 100004 BPL L7
270 270 141512 102003 BVC L7
271 141530 012737 001700 172244 MOV #1700,@#172244 ; BASE SUPER I (PAR 2) #40000 AT #170000 271 141514 002402 BLT L7
272 141536 012737 001700 172264 MOV #1700,@#172264 ; BASE SUPER D (PAR 2) #40000 AT #170000 272 141516 101001 BHI L7
273 141544 012737 010000 177776 MOV #010000,@#177776 ; SET PM TO SUPER 273 141520 100401 BMI L8
274 274 141522 000000 L7: HALT
275 141552 012703 040200 MOV #40200,R3 ; SUPER CODE ADDRESS 275
276 141556 012702 141604 MOV #SUPERS,R2 ; ADDRESS SUPER CODE 276 141524 012703 077777 L8: MOV #77777,R3
277 141562 012246 10$: MOV (R2)+,-(SP) 277 141530 062703 077777 ADD #77777,R3
278 141564 006623 MTPI (R3)+ 278 141534 123727 177776 000005 CMPB @#177776,#5
279 141566 020227 142050 CMP R2,#SUPERE 279 141542 001001 BNE L9
280 141572 103773 BLO 10$ 280 141544 000000 HALT
281 281
282 141574 012767 040200 140120' MOV #40200,LGHTON ; CHANGE IDLE TASK 282 141546 112704 001700 L9: MOVB #1700,R4
283 141602 000207 RTS PC 283 141552 100003 BPL L10
284 284 141554 020427 177700 CMP R4,#177700
285 ; 285 141560 001401 BEQ L11
286 ; TO BE COPIED TO SUPER #40200 AT PHYSICAL #170000 286 141562 000000 L10: HALT
287 ; #40000 TO #40200 FOR WAIT & JMP INSTRUCTIONS 287
288 ; 288 141564 105004 L11: CLRB R4
289 SUPERS: 289 141566 020427 177400 CMP R4,#177400
290 141604 012700 000037 MOV #37,R0 ; LOAD PATTERN 290 141572 001401 BEQ L12
291 141610 012701 174000 MOV #174000,R1 291 141574 000000 HALT
292 141614 032737 000001 177570 BIT #1,@#177570 292
293 141622 001414 BEQ 10$ 293 141576 012705 125252 L12: MOV #125252,R5
294 141624 012700 007417 MOV #7417,R0 294 141602 010500 MOV R5,R0
295 141630 010001 MOV R0,R1 295 141604 010001 MOV R0,R1
296 141632 005101 COM R1 296 141606 010102 MOV R1,R2
297 141634 032737 000002 177570 BIT #2,@#177570 297 141610 010203 MOV R2,R3
298 141642 001404 BEQ 10$ 298 141612 010304 MOV R3,R4
299 141644 012700 036163 MOV #36163,R0 299 141614 010405 MOV R4,R5
300 141650 012701 037000 MOV #37000,R1 300 141616 160501 SUB R5,R1
301 141654 010102 10$: MOV R1,R2 301 141620 002401 BLT NODIAG
302 141656 162702 000002 SUB #2,R2 302 141622 001401 BEQ L13
303 141662 042702 000001 BIC #1,R2 ; WAIT ADDRESS 303 141624 000000 NODIAG: HALT
304 141666 010203 MOV R2,R3 304
305 141670 042703 177701 BIC #177701,R3 ; ADDRESS OFFSET 305 141626 006102 L13: ROL R2
306 141674 012763 000001 040000 MOV #0000001,40000(R3) ; WRITE WAIT 306 141630 103001 BCC L14
307 141702 062703 000002 ADD #2,R3 307 141632 002401 BLT L15
308 141706 012763 000113 040000 MOV #0000113,40000(R3) ; WRITE JMP (R3) 308 141634 000000 L14: HALT
309 309
310 141714 010204 MOV R2,R4 310 141636 060203 L15: ADD R2,R3
311 141716 072427 177772 ASH #-6,R4 311 141640 005203 INC R3
312 141722 042704 177600 BIC #177600,R4 312 141642 005103 COM R3
313 141726 012705 001700 MOV #1700,R5 313 141644 060301 ADD R3,R1
314 141732 160405 SUB R4,R5 ; PAR ADDRESS BASE FOR WAIT 314 141646 103401 BCS L16
315 141734 010204 MOV R2,R4 315 141650 003401 BLE L17
316 141736 072427 177764 ASH #-12.,R4 316 141652 000000 L16: HALT
317 141742 042704 177761 BIC #177761,R4 ; PAR SELECT OFFSET 317
318 141746 010564 172240 MOV R5,172240(R4) ; SUPER I SPACE 318 141654 006004 L17: ROR R4
319 319 141656 050403 BIS R4,R3
320 141752 010103 MOV R1,R3 320 141660 060503 ADD R5,R3
321 141754 072327 177764 ASH #-12.,R3 321 141662 005203 INC R3
322 141760 042703 177761 BIC #177761,R3 ; PAR SELECT OFFSET 322 141664 103402 BCS L18
323 141764 020304 CMP R3,R4 ; SAME PAR 323 141666 005301 DEC R1
324 141766 001412 BEQ 30$ 324 141670 002401 BLT L19
325 141770 010104 MOV R1,R4 325 141672 000000 L18: HALT
326 141772 072427 177772 ASH #-6,R4 326
327 141776 042704 177600 BIC #177600,R4 327 141674 005100 L19: COM R0
328 142002 012705 001700 MOV #1700,R5 328 141676 101401 BLOS L20
329 142006 160405 SUB R4,R5 ; PAR ADDRESS BASE FOR JMP 329 141700 000000 HALT
330 142010 010563 172240 MOV R5,172240(R3) ; SUPER I SPACE 330
331 30$: 331 141702 040001 L20: BIC R0,R1
332 142014 012704 000003 MOV #3,R4 332 141704 060101 ADD R1,R1
333 142020 063704 177570 ADD @#177570,R4 333 141706 003001 BGT L21
334 142024 012703 000002 MOV #2,R3 334 141710 003401 BLE L22
335 142030 060703 ADD PC,R3 335 141712 000000 L21: HALT
336 142032 000112 40$: JMP (R2) 336
337 142034 077402 SOB R4,40$ 337 141714 000301 L22: SWAB R1
338 142036 010002 MOV R0,R2 338 141716 020127 052125 CMP R1,#052125
339 142040 006002 ROR R2 ; ROTATE PATTERN 339 141722 001004 BNE L23
340 142042 006101 ROL R1 340 141724 030405 BIT R4,R5
341 142044 006000 ROR R0 341 141726 003002 BGT L23
342 142046 000702 BR 10$ 342 141730 005105 COM R5
343 SUPERE: 343 141732 001001 BNE L24
344 344 141734 000000 L23: HALT
345 BOOT: 345
346 142050 005003 CLR R3 ; UNIT 346 141736 112700 177401 L24: MOVB #177401,R0
347 142052 112201 1$: MOVB (R2)+,R1 347 141742 100001 BPL L26
348 142054 001545 BEQ BOOTRK ; DEFAULT DEVICE IS RK0 348 141744 000000 L25: HALT
349 142056 120127 000040 CMPB R1,#40 349
350 142062 001773 BEQ 1$ 350 141746 077002 L26: SOB R0,L25
351 142064 120127 000122 CMPB R1,#'R 351 141750 005001 CLR R1
352 142070 001405 BEQ 5$ 352 141752 005201 L27: INC R1
353 353 141754 077002 SOB R0,L27
354 142072 012700 141160 MOV #BADBOO,R0 354 141756 005700 TST R0
355 142076 004767 140150' JSR PC,PRINT 355 141760 001002 BNE L28
356 142102 000207 RTS PC 356 141762 005701 TST R1
357 357 141764 001401 BEQ L29
358 142104 112201 5$: MOVB (R2)+,R1 ; HOPEFULLY K, L OR P 358 141766 000000 L28: HALT
359 142106 112200 7$: MOVB (R2)+,R0 ; DIGIT 359
360 142110 001416 BEQ 9$ 360 141770 012707 141776 L29: MOV #N1,PC
361 142112 120027 000040 CMPB R0,#40 361 141774 000000 HALT
362 142116 001413 BEQ 9$ 362
363 142120 120027 000067 CMPB R0,#'7 363 141776 005727 N1: TST (PC)+
364 142124 003031 BGT 11$ 364 142000 000000 HALT
365 142126 162700 000060 SUB #'0,R0 365
366 142132 002426 BLT 11$ 366 142002 012746 142012 N2: MOV #N3,-(SP)
367 142134 006303 ASL R3 367 142006 000207 RTS PC
368 142136 006303 ASL R3 368 142010 000000 HALT
369 142140 006303 ASL R3 369
370 142142 050003 BIS R0,R3 ; PUT DIGIT INTO UNIT 370 142012 005046 N3: CLR -(SP)
371 142144 000760 BR 7$ 371 142014 012746 142024 MOV #N4,-(SP)
372 142146 005002 9$: CLR R2 372 142020 000002 RTI
373 142150 012722 000137 MOV #137,(R2)+ ; STORE "JMP @#140000" INSTRUCTION AT ADDRESS 0 373 142022 000000 HALT
374 142154 012722 140000 MOV #START,(R2)+ 374
375 142160 012722 140000 MOV #START,(R2)+ ; STORE #140000 IN VECTOR 4, IN CASE OF TRAP TO 4 375 142024 000137 142032 N4: JMP @#N5
376 142164 005022 CLR (R2)+ 376 142030 000000 HALT
377 142166 120127 000113 CMPB R1,#'K 377
378 142172 001476 BEQ BOOTRK 378 142032 012705 000003 N5: MOV #3,R5
379 142174 120127 000114 CMPB R1,#'L 379 142036 005037 000006 CLR @#6
380 142200 001410 BEQ BOOTRL 380 142042 012737 142054 000004 MOV #N6,@#4
381 142202 120127 000120 CMPB R1,#'P 381 142050 005745 TST -(R5)
382 142206 001517 BEQ BOOTRP 382 142052 000000 HALT
383 383 142054 062706 000004 N6: ADD #4,SP
384 142210 012700 141077 11$: MOV #UNKMSG,R0 384
385 142214 004767 140150' JSR PC,PRINT 385 142060 005000 CLR R0
386 142220 000207 RTS PC 386 142062 012701 007777 MOV #7777,R1
387 387 142066 010002 N7: MOV R0,R2
388 174400 RLCS=174400 388 142070 062702 000005 ADD #5,R2
389 BOOTRL: 389 142074 022062 177773 CMP (R0)+,-5(R2)
390 142222 000005 RESET 390 142100 001402 BEQ N8
391 142224 000303 SWAB R3 ; UNIT NUMBER 391 142102 000000 HALT
392 142226 012701 174400 MOV #RLCS,R1 ; CSR 392 142104 000000 D1: .WORD 0
393 142232 012761 000013 000004 MOV #13,4(R1) ; CLR ERR 393
394 142240 052703 000004 BIS #4,R3 ; UNIT+GSTAT 394 142106 077111 N8: SOB R1,N7
395 142244 010311 MOV R3,(R1) ; ISSUE CMD 395
396 142246 105711 TSTB (R1) ; WAIT 396 142110 005267 141424' INC LOOCNT
397 142250 100376 BPL .-2 397 142114 103001 BCC 10$
398 142252 105003 CLRB R3 398 142116 000000 HALT
399 142254 052703 000010 BIS #10,R3 ; UNIT+RDHDR 399 142120 026727 140122' 002200 10$: CMP CLKTIC,#2200
400 142260 010311 MOV R3,(R1) ; ISSUE CMD 400 142126 101002 BHI 20$
401 142262 105711 TSTB (R1) ; WAIT 401 142130 000167 141436' JMP DIAGLP
402 142264 100376 BPL .-2 402 142134 012700 141254 20$: MOV #LOOMSG+5,R0
403 142266 016102 000006 MOV 6(R1),R2 ; GET HDR 403 142140 016703 141424' MOV LOOCNT,R3
404 142272 042702 000077 BIC #77,R2 ; CLR SECTOR 404
405 142276 005202 INC R2 ; MAGIC BIT 405 142144 005002 25$: CLR R2
406 142300 010261 000004 MOV R2,4(R1) ; SEEK TO 0 406 142146 071227 000010 DIV #10,R2
407 142304 105003 CLRB R3 407 142152 062703 000060 ADD #'0,R3
408 142306 052703 000006 BIS #6,R3 ; UNIT+SEEK 408 142156 110340 MOVB R3,-(R0)
409 142312 010311 MOV R3,(R1) ; ISSUE CMD 409 142160 010203 MOV R2,R3
410 142314 105711 TSTB (R1) ; WAIT 410 142162 001370 BNE 25$
411 142316 100376 BPL .-2 411
412 142320 005061 000002 CLR 2(R1) ; CLR BA 412 142164 004767 140150' JSR PC,PRINT
413 142324 005061 000004 CLR 4(R1) ; CLR DA 413 142170 000207 RTS PC
414 142330 012761 177000 000006 MOV #-512.,6(R1) ; SET WC 414
415 142336 105003 CLRB R3 415 177572 MMR0=177572
416 142340 052703 000014 BIS #14,R3 ; UNIT+READ 416 177574 MMR1=177574
417 142344 010311 MOV R3,(R1) ; ISSUE CMD 417 177576 MMR2=177576
418 142346 105711 TSTB (R1) ; WAIT 418 172516 MMR3=172516
419 142350 100376 BPL .-2 419
420 142352 042711 000377 BIC #377,(R1) 420 LIGHTS:
421 142356 005002 CLR R2 421 142172 012703 077406 MOV #77406,R3 ; DEFAULT PDR
422 142360 005003 CLR R3 422 142176 005002 CLR R2
423 142362 005004 CLR R4 423 142200 005001 CLR R1
424 142364 005005 CLR R5 424 142202 012700 000010 MOV #8.,R0
425 142366 005007 CLR PC 425 142206 010361 172300 1$: MOV R3,172300(R1) ; KERNEL I PDR
426 426 142212 010261 172340 MOV R2,172340(R1) ; KERNEL I PAR
427 177412 RKDA=177412 427 142216 010361 172320 MOV R3,172320(R1) ; KERNEL D PDR
428 000005 READGO=5 428 142222 010261 172360 MOV R2,172360(R1) ; KERNEL D PAR
429 BOOTRK: 429 142226 010361 172200 MOV R3,172200(R1) ; SUPER I PDR
430 142370 000005 RESET 430 142232 010261 172240 MOV R2,172240(R1) ; SUPER I PAR
431 142372 000303 SWAB R3 ; UNIT NUMBER 431 142236 010361 172220 MOV R3,172220(R1) ; SUPER D PDR
432 142374 006303 ASL R3 432 142242 010261 172260 MOV R2,172260(R1) ; SUPER D PAR
433 142376 006303 ASL R3 433 142246 010361 177600 MOV R3,177600(R1) ; USER I PDR
434 142400 006303 ASL R3 434 142252 010261 177640 MOV R2,177640(R1) ; USER I PAR
435 142402 006303 ASL R3 435 142256 010361 177620 MOV R3,177620(R1) ; USER D PDR
436 142404 006303 ASL R3 436 142262 010361 177660 MOV R3,177660(R1) ; USER D PAR
437 142406 012701 177412 MOV #RKDA,R1 ; CSR 437 142266 062702 000200 ADD #200,R2
438 142412 010311 MOV R3,(R1) ; LOAD DA 438 142272 062701 000002 ADD #2,R1
439 142414 005041 CLR -(R1) ; CLEAR BA 439 142276 077035 SOB R0,1$
440 142416 012741 177000 MOV #-256.*2,-(R1) ; LOAD WC 440 142300 052737 176000 172376 BIS #176000,@#172376 ; KERNEL D POINTS TO I/O SPACE
441 142422 012741 000005 MOV #READGO,-(R1) ; READ & GO 441 142306 052737 176000 172276 BIS #176000,@#172276 ; SUPER D POINTS TO I/O SPACE
442 142426 005002 CLR R2 442 142314 052737 176000 177676 BIS #176000,@#177676 ; USER D POINTS TO I/O SPACE
443 142430 005003 CLR R3 443 142322 012737 000077 172516 MOV #77,@#MMR3 ; 77 FOR 22 BIT
444 142432 005004 CLR R4 444 142330 012737 000001 177572 MOV #1,@#MMR0
445 142434 005005 CLR R5 445
446 142436 105711 TSTB (R1) 446 142336 012737 001700 172244 MOV #1700,@#172244 ; BASE SUPER I (PAR 2) #40000 AT #170000
447 142440 100376 BPL .-2 447 142344 012737 001700 172264 MOV #1700,@#172264 ; BASE SUPER D (PAR 2) #40000 AT #170000
448 142442 105011 CLRB (R1) 448 142352 012737 010000 177776 MOV #010000,@#177776 ; SET PM TO SUPER
449 142444 005007 CLR PC 449
450 450 142360 012703 040200 MOV #40200,R3 ; SUPER CODE ADDRESS
451 176700 RPCSR=0176700 451 142364 012702 142412 MOV #SUPERS,R2 ; ADDRESS SUPER CODE
452 BOOTRP: 452 142370 012246 10$: MOV (R2)+,-(SP)
453 142446 000005 RESET 453 142372 006623 MTPI (R3)+
454 142450 012701 176700 MOV #RPCSR, R1 454 142374 020227 142656 CMP R2,#SUPERE
455 142454 012761 000040 000010 MOV #0000040, 10(R1) ; RESET 455 142400 103773 BLO 10$
456 142462 010361 000010 MOV R3, 10(R1) ; SET UNIT 456
457 142466 012711 000021 MOV #0000021, (R1) ; PACK ACK 457 142402 012767 040200 140120' MOV #40200,LGHTON ; CHANGE IDLE TASK
458 142472 012761 010000 000032 MOV #0010000, 32(R1) ; 16B MODE 458 142410 000207 RTS PC
459 142500 012761 177000 000002 MOV #-512., 2(R1) ; SET WC 459
460 142506 005061 000004 CLR 4(R1) ; CLR BA 460 ;
461 142512 005061 000006 CLR 6(R1) ; CLR DA 461 ; TO BE COPIED TO SUPER #40200 AT PHYSICAL #170000
462 142516 005061 000034 CLR 34(R1) ; CLR CYL 462 ; #40000 TO #40200 FOR WAIT & JMP INSTRUCTIONS
463 142522 012711 000071 MOV #0000071, (R1) ; READ 463 ;
464 142526 105711 TSTB (R1) ; WAIT 464 SUPERS:
465 142530 100376 BPL .-2 465 142412 012700 000037 MOV #37,R0 ; LOAD PATTERN
466 142532 105011 CLRB (R1) 466 142416 012701 174000 MOV #174000,R1
467 142534 010300 MOV R3,R0 467 142422 032737 000001 177570 BIT #1,@#177570
468 142536 005007 CLR PC 468 142430 001414 BEQ 10$
469 469 142432 012700 007417 MOV #7417,R0
470 .END START 470 142436 010001 MOV R0,R1
470 471 142440 005101 COM R1
472 142442 032737 000002 177570 BIT #2,@#177570
473 142450 001404 BEQ 10$
474 142452 012700 036163 MOV #36163,R0
475 142456 012701 037000 MOV #37000,R1
476 142462 010102 10$: MOV R1,R2
477 142464 162702 000002 SUB #2,R2
478 142470 042702 000001 BIC #1,R2 ; WAIT ADDRESS
479 142474 010203 MOV R2,R3
480 142476 042703 177701 BIC #177701,R3 ; ADDRESS OFFSET
481 142502 012763 000001 040000 MOV #0000001,40000(R3) ; WRITE WAIT
482 142510 062703 000002 ADD #2,R3
483 142514 012763 000113 040000 MOV #0000113,40000(R3) ; WRITE JMP (R3)
484
485 142522 010204 MOV R2,R4
486 142524 072427 177772 ASH #-6,R4
487 142530 042704 177600 BIC #177600,R4
488 142534 012705 001700 MOV #1700,R5
489 142540 160405 SUB R4,R5 ; PAR ADDRESS BASE FOR WAIT
490 142542 010204 MOV R2,R4
491 142544 072427 177764 ASH #-12.,R4
492 142550 042704 177761 BIC #177761,R4 ; PAR SELECT OFFSET
493 142554 010564 172240 MOV R5,172240(R4) ; SUPER I SPACE
494
495 142560 010103 MOV R1,R3
496 142562 072327 177764 ASH #-12.,R3
497 142566 042703 177761 BIC #177761,R3 ; PAR SELECT OFFSET
498 142572 020304 CMP R3,R4 ; SAME PAR
499 142574 001412 BEQ 30$
500 142576 010104 MOV R1,R4
501 142600 072427 177772 ASH #-6,R4
502 142604 042704 177600 BIC #177600,R4
503 142610 012705 001700 MOV #1700,R5
504 142614 160405 SUB R4,R5 ; PAR ADDRESS BASE FOR JMP
505 142616 010563 172240 MOV R5,172240(R3) ; SUPER I SPACE
506 30$:
507 142622 012704 000003 MOV #3,R4
508 142626 063704 177570 ADD @#177570,R4
509 142632 012703 000002 MOV #2,R3
510 142636 060703 ADD PC,R3
511 142640 000112 40$: JMP (R2)
512 142642 077402 SOB R4,40$
513 142644 010002 MOV R0,R2
514 142646 006002 ROR R2 ; ROTATE PATTERN
515 142650 006101 ROL R1
516 142652 006000 ROR R0
517 142654 000702 BR 10$
518 SUPERE:
519
520 BOOT:
521 142656 005003 CLR R3 ; UNIT
522 142660 112201 1$: MOVB (R2)+,R1
523 142662 001545 BEQ BOOTRK ; DEFAULT DEVICE IS RK0
524 142664 120127 000040 CMPB R1,#40
525 142670 001773 BEQ 1$
526 142672 120127 000122 CMPB R1,#'R
527 142676 001405 BEQ 5$
528
529 142700 012700 141175 MOV #BADBOO,R0
530 142704 004767 140150' JSR PC,PRINT
531 142710 000207 RTS PC
532
533 142712 112201 5$: MOVB (R2)+,R1 ; HOPEFULLY K, L OR P
534 142714 112200 7$: MOVB (R2)+,R0 ; DIGIT
535 142716 001416 BEQ 9$
536 142720 120027 000040 CMPB R0,#40
537 142724 001413 BEQ 9$
538 142726 120027 000067 CMPB R0,#'7
539 142732 003031 BGT 11$
540 142734 162700 000060 SUB #'0,R0
541 142740 002426 BLT 11$
542 142742 006303 ASL R3
543 142744 006303 ASL R3
544 142746 006303 ASL R3
545 142750 050003 BIS R0,R3 ; PUT DIGIT INTO UNIT
546 142752 000760 BR 7$
547 142754 005002 9$: CLR R2
548 142756 012722 000137 MOV #137,(R2)+ ; STORE "JMP @#140000" INSTRUCTION AT ADDRESS 0
549 142762 012722 140000 MOV #START,(R2)+
550 142766 012722 140000 MOV #START,(R2)+ ; STORE #140000 IN VECTOR 4, IN CASE OF TRAP TO 4
551 142772 005022 CLR (R2)+
552 142774 120127 000113 CMPB R1,#'K
553 143000 001476 BEQ BOOTRK
554 143002 120127 000114 CMPB R1,#'L
555 143006 001410 BEQ BOOTRL
556 143010 120127 000120 CMPB R1,#'P
557 143014 001517 BEQ BOOTRP
558
559 143016 012700 141114 11$: MOV #UNKMSG,R0
560 143022 004767 140150' JSR PC,PRINT
561 143026 000207 RTS PC
562
563 174400 RLCS=174400
564 BOOTRL:
565 143030 000005 RESET
566 143032 000303 SWAB R3 ; UNIT NUMBER
567 143034 012701 174400 MOV #RLCS,R1 ; CSR
568 143040 012761 000013 000004 MOV #13,4(R1) ; CLR ERR
569 143046 052703 000004 BIS #4,R3 ; UNIT+GSTAT
570 143052 010311 MOV R3,(R1) ; ISSUE CMD
571 143054 105711 TSTB (R1) ; WAIT
572 143056 100376 BPL .-2
573 143060 105003 CLRB R3
574 143062 052703 000010 BIS #10,R3 ; UNIT+RDHDR
575 143066 010311 MOV R3,(R1) ; ISSUE CMD
576 143070 105711 TSTB (R1) ; WAIT
577 143072 100376 BPL .-2
578 143074 016102 000006 MOV 6(R1),R2 ; GET HDR
579 143100 042702 000077 BIC #77,R2 ; CLR SECTOR
580 143104 005202 INC R2 ; MAGIC BIT
581 143106 010261 000004 MOV R2,4(R1) ; SEEK TO 0
582 143112 105003 CLRB R3
583 143114 052703 000006 BIS #6,R3 ; UNIT+SEEK
584 143120 010311 MOV R3,(R1) ; ISSUE CMD
585 143122 105711 TSTB (R1) ; WAIT
586 143124 100376 BPL .-2
587 143126 005061 000002 CLR 2(R1) ; CLR BA
588 143132 005061 000004 CLR 4(R1) ; CLR DA
589 143136 012761 177000 000006 MOV #-512.,6(R1) ; SET WC
590 143144 105003 CLRB R3
591 143146 052703 000014 BIS #14,R3 ; UNIT+READ
592 143152 010311 MOV R3,(R1) ; ISSUE CMD
593 143154 105711 TSTB (R1) ; WAIT
594 143156 100376 BPL .-2
595 143160 042711 000377 BIC #377,(R1)
596 143164 005002 CLR R2
597 143166 005003 CLR R3
598 143170 005004 CLR R4
599 143172 005005 CLR R5
600 143174 005007 CLR PC
601
602 177412 RKDA=177412
603 000005 READGO=5
604 BOOTRK:
605 143176 000005 RESET
606 143200 000303 SWAB R3 ; UNIT NUMBER
607 143202 006303 ASL R3
608 143204 006303 ASL R3
609 143206 006303 ASL R3
610 143210 006303 ASL R3
611 143212 006303 ASL R3
612 143214 012701 177412 MOV #RKDA,R1 ; CSR
613 143220 010311 MOV R3,(R1) ; LOAD DA
614 143222 005041 CLR -(R1) ; CLEAR BA
615 143224 012741 177000 MOV #-256.*2,-(R1) ; LOAD WC
616 143230 012741 000005 MOV #READGO,-(R1) ; READ & GO
617 143234 005002 CLR R2
618 143236 005003 CLR R3
619 143240 005004 CLR R4
620 143242 005005 CLR R5
621 143244 105711 TSTB (R1)
622 143246 100376 BPL .-2
623 143250 105011 CLRB (R1)
624 143252 005007 CLR PC
625
626 176700 RPCSR=0176700
627 BOOTRP:
628 143254 000005 RESET
629 143256 012701 176700 MOV #RPCSR, R1
630 143262 012761 000040 000010 MOV #0000040, 10(R1) ; RESET
631 143270 010361 000010 MOV R3, 10(R1) ; SET UNIT
632 143274 012711 000021 MOV #0000021, (R1) ; PACK ACK
633 143300 012761 010000 000032 MOV #0010000, 32(R1) ; 16B MODE
634 143306 012761 177000 000002 MOV #-512., 2(R1) ; SET WC
635 143314 005061 000004 CLR 4(R1) ; CLR BA
636 143320 005061 000006 CLR 6(R1) ; CLR DA
637 143324 005061 000034 CLR 34(R1) ; CLR CYL
638 143330 012711 000071 MOV #0000071, (R1) ; READ
639 143334 105711 TSTB (R1) ; WAIT
640 143336 100376 BPL .-2
641 143340 105011 CLRB (R1)
642 143342 010300 MOV R3,R0
643 143344 005007 CLR PC
644
645 .END START
645

861
apps/pdp11/boot/monitor/README.md
View file

@ -33,232 +33,407 @@ The **BOOTMON.mac** source code is shown below.
KW11LKS = 177546 KW11LKS = 177546
KW11VEC = 100 KW11VEC = 100
.ASECT .ASECT
.=140000 .=140000
START: RESET START: RESET
CLR @#PSW CLR @#PSW
MOV #START,SP MOV #START,SP
CLR @#DL11XCSR ; CLEAR THE XCSR CLR @#DL11XCSR ; CLEAR THE XCSR
MOV #BANNER,R0 MOV #BANNER,R0
JSR PC,PRINT JSR PC,PRINT
MOV #CLKAST,@#KW11VEC MOV #CLKAST,@#KW11VEC
MOV #340,@#KW11VEC+2 MOV #340,@#KW11VEC+2
BIS #100,@#KW11LKS ; SET CLOCK TICKING BIS #100,@#KW11LKS ; SET CLOCK TICKING
MOV #PROMPT,R0 MOV #PROMPT,R0
JSR PC,PRINT JSR PC,PRINT
SUB #256,SP SUB #256,SP
MOV SP,R0 MOV SP,R0
JSR PC,INPUT JSR PC,INPUT
CLR R0 CLR R0
1$: WAIT 1$: WAIT
INC R0 INC R0
TST LGHTON TST LGHTON
BEQ 1$ BEQ 1$
MOV #054000,-(SP) ; SUPER PRIORITY 0 ALT REG MOV #054000,-(SP) ; SUPER PRIORITY 0 ALT REG
MOV LGHTON,-(SP) ; CALL SUPER LOOP START MOV LGHTON,-(SP) ; CALL SUPER LOOP START
RTI RTI
LGHTON: .WORD 0 LGHTON: .WORD 0
CLKTIC: .WORD 0 CLKTIC: .WORD 0
CLKAST: CLKAST:
INC CLKTIC INC CLKTIC
RTI RTI
ONECHR: ONECHR:
TSTB @#DL11XCSR TSTB @#DL11XCSR
BPL ONECHR BPL ONECHR
MOVB R0,@#177566 MOVB R0,@#177566
RTS PC RTS PC
PRTPTR: .WORD 0 PRTPTR: .WORD 0
PRINT: PRINT:
BITB #100,@#DL11XCSR BITB #100,@#DL11XCSR
BNE PRINT BNE PRINT
MOV R0,PRTPTR MOV R0,PRTPTR
MOV #PRTAST,@#DL11VEC MOV #PRTAST,@#DL11VEC
MOV #200,@#DL11VEC+2 MOV #200,@#DL11VEC+2
BISB #100,@#DL11XCSR BISB #100,@#DL11XCSR
RTS PC RTS PC
PRTAST: PRTAST:
TSTB @PRTPTR TSTB @PRTPTR
BEQ 2$ BEQ 2$
MOVB @PRTPTR,@#177566 MOVB @PRTPTR,@#177566
INC PRTPTR INC PRTPTR
RTI RTI
2$: CLRB @#177564 2$: CLRB @#177564
RTI RTI
BUFFER: .WORD 0 ; INPUT BUFFER POINTER BUFFER: .WORD 0 ; INPUT BUFFER POINTER
LENGTH: .WORD 0 ; INPUT BUFFER LENGTH LENGTH: .WORD 0 ; INPUT BUFFER LENGTH
INPUT: INPUT:
MOV R0,BUFFER MOV R0,BUFFER
CLR LENGTH CLR LENGTH
MOV #INPAST,@#60 MOV #INPAST,@#60
MOV #200,@#62 MOV #200,@#62
BISB #100,@#177560 BISB #100,@#177560
RTS PC RTS PC
INPAST: INPAST:
MOV R0,-(SP) MOV R0,-(SP)
MOVB @#177562,R0 MOVB @#177562,R0
CMPB R0,#15 CMPB R0,#15
BEQ 7$ ; CARRIAGE RETURN BEQ 7$ ; CARRIAGE RETURN
CMPB R0,#127. CMPB R0,#127.
BEQ 2$ ; <DEL> BEQ 2$ ; <DEL>
CMPB R0,#10 CMPB R0,#10
BNE 4$ ; BACK SPACE BNE 4$ ; BACK SPACE
2$: TST LENGTH ; DATA IN BUFFER? 2$: TST LENGTH ; DATA IN BUFFER?
BEQ 3$ BEQ 3$
DEC LENGTH ; LENGTH DEC LENGTH ; LENGTH
MOV #DEL,R0 MOV #DEL,R0
JSR PC,PRINT JSR PC,PRINT
3$: BR 9$ 3$: BR 9$
4$: CMPB R0,#40 4$: CMPB R0,#40
BLT 9$ ; BELOW SPACE BLT 9$ ; BELOW SPACE
CMPB R0,#177 CMPB R0,#177
BGE 9$ ; SKIP STUFF TOO BIG BGE 9$ ; SKIP STUFF TOO BIG
JSR PC,ONECHR ; ECHO CHAR JSR PC,ONECHR ; ECHO CHAR
CMPB R0,#172 CMPB R0,#172
BGT 5$ ; ABOVE Z BGT 5$ ; ABOVE Z
CMPB R0,#141 CMPB R0,#141
BLT 5$ ; BELOW A BLT 5$ ; BELOW A
BICB #40,R0 ; CONVERT TO UPPER CASE BICB #40,R0 ; CONVERT TO UPPER CASE
5$: CMP LENGTH,#254 5$: CMP LENGTH,#254
BGE 9$ BGE 9$
MOVB R0,-(SP) MOVB R0,-(SP)
MOV BUFFER,R0 MOV BUFFER,R0
ADD LENGTH,R0 ADD LENGTH,R0
MOVB (SP)+,(R0) MOVB (SP)+,(R0)
INC LENGTH INC LENGTH
BR 9$ BR 9$
7$: MOV BUFFER,R0 7$: MOV BUFFER,R0
ADD LENGTH,R0 ADD LENGTH,R0
CLRB (R0) CLRB (R0)
MOV #CMD,@#240 ; CALL CMD AT PRIORITY 2 MOV #CMD,@#240 ; CALL CMD AT PRIORITY 2
MOV #100,@#242 MOV #100,@#242
MOV #2000,@#177772 MOV #2000,@#177772
9$: MOV (SP)+,R0 9$: MOV (SP)+,R0
RTI RTI
CMD: CMD:
CLR @#177772 ; NO MORE PIR CALLS CLR @#177772 ; NO MORE PIR CALLS
MOV R0,-(SP) MOV R0,-(SP)
MOV R1,-(SP) MOV R1,-(SP)
MOV R2,-(SP) MOV R2,-(SP)
MOV R3,-(SP) MOV R3,-(SP)
MOV R4,-(SP) MOV R4,-(SP)
MOV #EOL,R0 MOV #EOL,R0
JSR PC,PRINT JSR PC,PRINT
1$: BITB #100,@#177564 1$: BITB #100,@#177564
BNE 1$ BNE 1$
CLR R4 CLR R4
MOV #CMDLST,R3 ; CMD LIST MOV #CMDLST,R3 ; CMD LIST
3$: MOVB (R3)+,R0 3$: MOVB (R3)+,R0
BEQ 13$ BEQ 13$
MOV BUFFER,R2 ; USER CMD MOV BUFFER,R2 ; USER CMD
4$: MOVB (R2)+,R1 4$: MOVB (R2)+,R1
BEQ 15$ ; NULL COMMAND? BEQ 15$ ; NULL COMMAND?
CMPB R1,#40 CMPB R1,#40
BEQ 4$ ; SKIP SPACE BEQ 4$ ; SKIP SPACE
5$: CMPB R0,R1 5$: CMPB R0,R1
BNE 7$ BNE 7$
MOVB (R3)+,R0 MOVB (R3)+,R0
BEQ 9$ BEQ 9$
MOVB (R2)+,R1 MOVB (R2)+,R1
BEQ 9$ BEQ 9$
CMPB R1,#40 CMPB R1,#40
BNE 5$ BNE 5$
BR 9$ BR 9$
7$: MOVB (R3)+,R0 7$: MOVB (R3)+,R0
BNE 7$ BNE 7$
INC R4 INC R4
BR 3$ BR 3$
9$: ASL R4 9$: ASL R4
JSR PC,@CMDTBL(R4) ; EXECUTE JSR PC,@CMDTBL(R4) ; EXECUTE
BR 15$ BR 15$
13$: MOV #UNKMSG,R0 13$: MOV #UNKMSG,R0
JSR PC,PRINT JSR PC,PRINT
15$: CLR LENGTH 15$: CLR LENGTH
MOV #PROMPT,R0 MOV #PROMPT,R0
JSR PC,PRINT JSR PC,PRINT
MOV (SP)+,R4 MOV (SP)+,R4
MOV (SP)+,R3 MOV (SP)+,R3
MOV (SP)+,R2 MOV (SP)+,R2
MOV (SP)+,R1 MOV (SP)+,R1
MOV (SP)+,R0 MOV (SP)+,R0
RTI RTI
CMDTBL: .WORD BOOT,HALT,TEST,LIGHTS,HELP CMDTBL: .WORD BOOT,HALT,TEST,DIAG,LIGHTS,HELP
HLPMSG: .ASCIZ 'COMMANDS ARE BOOT, HALT, LIGHTS, TEST AND HELP'<15><12>'BOOT DEVICES ARE RK? RL? OR RP?'<15><12> HLPMSG: .ASCIZ 'COMMANDS ARE BOOT, HALT, TEST, DIAG, LIGHTS AND HELP'<15><12>'BOOT DEVICES ARE RK? RL? OR RP?'<15><12>
EOL: .BYTE 15,12,0 EOL: .BYTE 15,12,0
DEL: .BYTE 10,40,10,0 DEL: .BYTE 10,40,10,0
CMDLST: .ASCIZ 'BOOT' CMDLST: .ASCIZ 'BOOT'
.ASCIZ 'HALT' .ASCIZ 'HALT'
.ASCIZ 'TEST' .ASCIZ 'TEST'
.ASCIZ 'LIGHTS' .ASCIZ 'DIAG'
.ASCIZ 'HELP' .ASCIZ 'LIGHTS'
.BYTE 0 .ASCIZ 'HELP'
.BYTE 0
UNKMSG: .ASCIZ 'UNKNOWN COMMAND'<12><15> UNKMSG: .ASCIZ 'UNKNOWN COMMAND'<12><15>
BANNER: .ASCIZ 'PDP-11 MONITOR V1.0'<12><15><12><15> BANNER: .ASCIZ 'PDP-11 MONITOR V1.0'<12><15><12><15>
; 'ADAPTED FROM CODE BY PAUL NANKERVIS <PAULNANK@HOTMAIL.COM>'<12><15><12><15> ; 'ADAPTED FROM CODE BY PAUL NANKERVIS <PAULNANK@HOTMAIL.COM>'<12><15><12><15>
PROMPT: .ASCIZ 'BOOT> ' PROMPT: .ASCIZ 'BOOT> '
BADBOO: .ASCIZ 'UNKNOWN BOOT DEVICE'<12><15> BADBOO: .ASCIZ 'UNKNOWN BOOT DEVICE'<12><15>
PERMSG: .ASCIZ ' CLOCK TICKS'<12><15> PERMSG: .ASCIZ ' CLOCK TICKS'<12><15>
LOOMSG: .ASCIZ ' ITERATIONS'<12><15>
.EVEN .EVEN
HELP: HELP:
MOV #HLPMSG,R0 MOV #HLPMSG,R0
JSR PC,PRINT JSR PC,PRINT
RTS PC RTS PC
HALT: HALT:
HALT HALT
MOV #EOL,R0 MOV #EOL,R0
JSR PC,PRINT JSR PC,PRINT
RTS PC RTS PC
TEST: TEST:
CLR CLKTIC CLR CLKTIC
MOV #15000,R5 MOV #15000,R5
10$: MOV R5,@#177570 ; DISPLAY 10$: MOV R5,@#177570 ; DISPLAY
MOV R5,R4 MOV R5,R4
ASR R4 ASR R4
15$: CLR R0 15$: CLR R0
MOV R5,R1 MOV R5,R1
DIV R4,R0 DIV R4,R0
MOV R0,R2 MOV R0,R2
MUL R4,R2 MUL R4,R2
ADD R3,R1 ADD R3,R1
CMP R1,R5 CMP R1,R5
BEQ 20$ BEQ 20$
HALT HALT
20$: SOB R4,15$ 20$: SOB R4,15$
SOB R5,10$ SOB R5,10$
MOV #PERMSG+5,R0 MOV #PERMSG+5,R0
MOV CLKTIC,R3 MOV CLKTIC,R3
25$: CLR R2 25$: CLR R2
DIV #10,R2 DIV #10,R2
ADD #'0,R3 ADD #'0,R3
MOVB R3,-(R0) MOVB R3,-(R0)
MOV R2,R3 MOV R2,R3
BNE 25$ BNE 25$
JSR PC,PRINT JSR PC,PRINT
RTS PC RTS PC
LOOCNT: .WORD 0
DIAG:
CLR LOOCNT
CLR CLKTIC
DIAGLP:
CLR R5
BMI L1
BVS L1
BHI L1
BLT L1
BLOS L2
L1: HALT
L2: DEC R5
BPL L3
BEQ L3
BGE L3
BLE L4
L3: HALT
L4: ROR R5
BVC L5
BCC L5
BNE L6
L5: HALT
L6: MOVB #17,@#177776
BPL L7
BVC L7
BLT L7
BHI L7
BMI L8
L7: HALT
L8: MOV #77777,R3
ADD #77777,R3
CMPB @#177776,#5
BNE L9
HALT
L9: MOVB #1700,R4
BPL L10
CMP R4,#177700
BEQ L11
L10: HALT
L11: CLRB R4
CMP R4,#177400
BEQ L12
HALT
L12: MOV #125252,R5
MOV R5,R0
MOV R0,R1
MOV R1,R2
MOV R2,R3
MOV R3,R4
MOV R4,R5
SUB R5,R1
BLT NODIAG
BEQ L13
NODIAG: HALT
L13: ROL R2
BCC L14
BLT L15
L14: HALT
L15: ADD R2,R3
INC R3
COM R3
ADD R3,R1
BCS L16
BLE L17
L16: HALT
L17: ROR R4
BIS R4,R3
ADD R5,R3
INC R3
BCS L18
DEC R1
BLT L19
L18: HALT
L19: COM R0
BLOS L20
HALT
L20: BIC R0,R1
ADD R1,R1
BGT L21
BLE L22
L21: HALT
L22: SWAB R1
CMP R1,#052125
BNE L23
BIT R4,R5
BGT L23
COM R5
BNE L24
L23: HALT
L24: MOVB #177401,R0
BPL L26
L25: HALT
L26: SOB R0,L25
CLR R1
L27: INC R1
SOB R0,L27
TST R0
BNE L28
TST R1
BEQ L29
L28: HALT
L29: MOV #N1,PC
HALT
N1: TST (PC)+
HALT
N2: MOV #N3,-(SP)
RTS PC
HALT
N3: CLR -(SP)
MOV #N4,-(SP)
RTI
HALT
N4: JMP @#N5
HALT
N5: MOV #3,R5
CLR @#6
MOV #N6,@#4
TST -(R5)
HALT
N6: ADD #4,SP
CLR R0
MOV #7777,R1
N7: MOV R0,R2
ADD #5,R2
CMP (R0)+,-5(R2)
BEQ N8
HALT
D1: .WORD 0
N8: SOB R1,N7
INC LOOCNT
BCC 10$
HALT
10$: CMP CLKTIC,#2200
BHI 20$
JMP DIAGLP
20$: MOV #LOOMSG+5,R0
MOV LOOCNT,R3
25$: CLR R2
DIV #10,R2
ADD #'0,R3
MOVB R3,-(R0)
MOV R2,R3
BNE 25$
JSR PC,PRINT
RTS PC
MMR0=177572 MMR0=177572
MMR1=177574 MMR1=177574
@ -266,228 +441,228 @@ The **BOOTMON.mac** source code is shown below.
MMR3=172516 MMR3=172516
LIGHTS: LIGHTS:
MOV #77406,R3 ; DEFAULT PDR MOV #77406,R3 ; DEFAULT PDR
CLR R2 CLR R2
CLR R1 CLR R1
MOV #8.,R0 MOV #8.,R0
1$: MOV R3,172300(R1) ; KERNEL I PDR 1$: MOV R3,172300(R1) ; KERNEL I PDR
MOV R2,172340(R1) ; KERNEL I PAR MOV R2,172340(R1) ; KERNEL I PAR
MOV R3,172320(R1) ; KERNEL D PDR MOV R3,172320(R1) ; KERNEL D PDR
MOV R2,172360(R1) ; KERNEL D PAR MOV R2,172360(R1) ; KERNEL D PAR
MOV R3,172200(R1) ; SUPER I PDR MOV R3,172200(R1) ; SUPER I PDR
MOV R2,172240(R1) ; SUPER I PAR MOV R2,172240(R1) ; SUPER I PAR
MOV R3,172220(R1) ; SUPER D PDR MOV R3,172220(R1) ; SUPER D PDR
MOV R2,172260(R1) ; SUPER D PAR MOV R2,172260(R1) ; SUPER D PAR
MOV R3,177600(R1) ; USER I PDR MOV R3,177600(R1) ; USER I PDR
MOV R2,177640(R1) ; USER I PAR MOV R2,177640(R1) ; USER I PAR
MOV R3,177620(R1) ; USER D PDR MOV R3,177620(R1) ; USER D PDR
MOV R3,177660(R1) ; USER D PAR MOV R3,177660(R1) ; USER D PAR
ADD #200,R2 ADD #200,R2
ADD #2,R1 ADD #2,R1
SOB R0,1$ SOB R0,1$
BIS #176000,@#172376 ; KERNEL D POINTS TO I/O SPACE BIS #176000,@#172376 ; KERNEL D POINTS TO I/O SPACE
BIS #176000,@#172276 ; SUPER D POINTS TO I/O SPACE BIS #176000,@#172276 ; SUPER D POINTS TO I/O SPACE
BIS #176000,@#177676 ; USER D POINTS TO I/O SPACE BIS #176000,@#177676 ; USER D POINTS TO I/O SPACE
MOV #77,@#MMR3 ; 77 FOR 22 BIT MOV #77,@#MMR3 ; 77 FOR 22 BIT
MOV #1,@#MMR0 MOV #1,@#MMR0
MOV #1700,@#172244 ; BASE SUPER I (PAR 2) #40000 AT #170000 MOV #1700,@#172244 ; BASE SUPER I (PAR 2) #40000 AT #170000
MOV #1700,@#172264 ; BASE SUPER D (PAR 2) #40000 AT #170000 MOV #1700,@#172264 ; BASE SUPER D (PAR 2) #40000 AT #170000
MOV #010000,@#177776 ; SET PM TO SUPER MOV #010000,@#177776 ; SET PM TO SUPER
MOV #40200,R3 ; SUPER CODE ADDRESS MOV #40200,R3 ; SUPER CODE ADDRESS
MOV #SUPERS,R2 ; ADDRESS SUPER CODE MOV #SUPERS,R2 ; ADDRESS SUPER CODE
10$: MOV (R2)+,-(SP) 10$: MOV (R2)+,-(SP)
MTPI (R3)+ MTPI (R3)+
CMP R2,#SUPERE CMP R2,#SUPERE
BLO 10$ BLO 10$
MOV #40200,LGHTON ; CHANGE IDLE TASK MOV #40200,LGHTON ; CHANGE IDLE TASK
RTS PC RTS PC
; ;
; TO BE COPIED TO SUPER #40200 AT PHYSICAL #170000 ; TO BE COPIED TO SUPER #40200 AT PHYSICAL #170000
; #40000 TO #40200 FOR WAIT & JMP INSTRUCTIONS ; #40000 TO #40200 FOR WAIT & JMP INSTRUCTIONS
; ;
SUPERS: SUPERS:
MOV #37,R0 ; LOAD PATTERN MOV #37,R0 ; LOAD PATTERN
MOV #174000,R1 MOV #174000,R1
BIT #1,@#177570 BIT #1,@#177570
BEQ 10$ BEQ 10$
MOV #7417,R0 MOV #7417,R0
MOV R0,R1 MOV R0,R1
COM R1 COM R1
BIT #2,@#177570 BIT #2,@#177570
BEQ 10$ BEQ 10$
MOV #36163,R0 MOV #36163,R0
MOV #37000,R1 MOV #37000,R1
10$: MOV R1,R2 10$: MOV R1,R2
SUB #2,R2 SUB #2,R2
BIC #1,R2 ; WAIT ADDRESS BIC #1,R2 ; WAIT ADDRESS
MOV R2,R3 MOV R2,R3
BIC #177701,R3 ; ADDRESS OFFSET BIC #177701,R3 ; ADDRESS OFFSET
MOV #0000001,40000(R3) ; WRITE WAIT MOV #0000001,40000(R3) ; WRITE WAIT
ADD #2,R3 ADD #2,R3
MOV #0000113,40000(R3) ; WRITE JMP (R3) MOV #0000113,40000(R3) ; WRITE JMP (R3)
MOV R2,R4 MOV R2,R4
ASH #-6,R4 ASH #-6,R4
BIC #177600,R4 BIC #177600,R4
MOV #1700,R5 MOV #1700,R5
SUB R4,R5 ; PAR ADDRESS BASE FOR WAIT SUB R4,R5 ; PAR ADDRESS BASE FOR WAIT
MOV R2,R4 MOV R2,R4
ASH #-12.,R4 ASH #-12.,R4
BIC #177761,R4 ; PAR SELECT OFFSET BIC #177761,R4 ; PAR SELECT OFFSET
MOV R5,172240(R4) ; SUPER I SPACE MOV R5,172240(R4) ; SUPER I SPACE
MOV R1,R3 MOV R1,R3
ASH #-12.,R3 ASH #-12.,R3
BIC #177761,R3 ; PAR SELECT OFFSET BIC #177761,R3 ; PAR SELECT OFFSET
CMP R3,R4 ; SAME PAR CMP R3,R4 ; SAME PAR
BEQ 30$ BEQ 30$
MOV R1,R4 MOV R1,R4
ASH #-6,R4 ASH #-6,R4
BIC #177600,R4 BIC #177600,R4
MOV #1700,R5 MOV #1700,R5
SUB R4,R5 ; PAR ADDRESS BASE FOR JMP SUB R4,R5 ; PAR ADDRESS BASE FOR JMP
MOV R5,172240(R3) ; SUPER I SPACE MOV R5,172240(R3) ; SUPER I SPACE
30$: 30$:
MOV #3,R4 MOV #3,R4
ADD @#177570,R4 ADD @#177570,R4
MOV #2,R3 MOV #2,R3
ADD PC,R3 ADD PC,R3
40$: JMP (R2) 40$: JMP (R2)
SOB R4,40$ SOB R4,40$
MOV R0,R2 MOV R0,R2
ROR R2 ; ROTATE PATTERN ROR R2 ; ROTATE PATTERN
ROL R1 ROL R1
ROR R0 ROR R0
BR 10$ BR 10$
SUPERE: SUPERE:
BOOT: BOOT:
CLR R3 ; UNIT CLR R3 ; UNIT
1$: MOVB (R2)+,R1 1$: MOVB (R2)+,R1
BEQ BOOTRK ; DEFAULT DEVICE IS RK0 BEQ BOOTRK ; DEFAULT DEVICE IS RK0
CMPB R1,#40 CMPB R1,#40
BEQ 1$ BEQ 1$
CMPB R1,#'R CMPB R1,#'R
BEQ 5$ BEQ 5$
MOV #BADBOO,R0 MOV #BADBOO,R0
JSR PC,PRINT JSR PC,PRINT
RTS PC RTS PC
5$: MOVB (R2)+,R1 ; HOPEFULLY K, L OR P 5$: MOVB (R2)+,R1 ; HOPEFULLY K, L OR P
7$: MOVB (R2)+,R0 ; DIGIT 7$: MOVB (R2)+,R0 ; DIGIT
BEQ 9$ BEQ 9$
CMPB R0,#40 CMPB R0,#40
BEQ 9$ BEQ 9$
CMPB R0,#'7 CMPB R0,#'7
BGT 11$ BGT 11$
SUB #'0,R0 SUB #'0,R0
BLT 11$ BLT 11$
ASL R3 ASL R3
ASL R3 ASL R3
ASL R3 ASL R3
BIS R0,R3 ; PUT DIGIT INTO UNIT BIS R0,R3 ; PUT DIGIT INTO UNIT
BR 7$ BR 7$
9$: CLR R2 9$: CLR R2
MOV #137,(R2)+ ; STORE "JMP @#140000" INSTRUCTION AT ADDRESS 0 MOV #137,(R2)+ ; STORE "JMP @#140000" INSTRUCTION AT ADDRESS 0
MOV #START,(R2)+ MOV #START,(R2)+
MOV #START,(R2)+ ; STORE #140000 IN VECTOR 4, IN CASE OF TRAP TO 4 MOV #START,(R2)+ ; STORE #140000 IN VECTOR 4, IN CASE OF TRAP TO 4
CLR (R2)+ CLR (R2)+
CMPB R1,#'K CMPB R1,#'K
BEQ BOOTRK BEQ BOOTRK
CMPB R1,#'L CMPB R1,#'L
BEQ BOOTRL BEQ BOOTRL
CMPB R1,#'P CMPB R1,#'P
BEQ BOOTRP BEQ BOOTRP
11$: MOV #UNKMSG,R0 11$: MOV #UNKMSG,R0
JSR PC,PRINT JSR PC,PRINT
RTS PC RTS PC
RLCS=174400 RLCS=174400
BOOTRL: BOOTRL:
RESET RESET
SWAB R3 ; UNIT NUMBER SWAB R3 ; UNIT NUMBER
MOV #RLCS,R1 ; CSR MOV #RLCS,R1 ; CSR
MOV #13,4(R1) ; CLR ERR MOV #13,4(R1) ; CLR ERR
BIS #4,R3 ; UNIT+GSTAT BIS #4,R3 ; UNIT+GSTAT
MOV R3,(R1) ; ISSUE CMD MOV R3,(R1) ; ISSUE CMD
TSTB (R1) ; WAIT TSTB (R1) ; WAIT
BPL .-2 BPL .-2
CLRB R3 CLRB R3
BIS #10,R3 ; UNIT+RDHDR BIS #10,R3 ; UNIT+RDHDR
MOV R3,(R1) ; ISSUE CMD MOV R3,(R1) ; ISSUE CMD
TSTB (R1) ; WAIT TSTB (R1) ; WAIT
BPL .-2 BPL .-2
MOV 6(R1),R2 ; GET HDR MOV 6(R1),R2 ; GET HDR
BIC #77,R2 ; CLR SECTOR BIC #77,R2 ; CLR SECTOR
INC R2 ; MAGIC BIT INC R2 ; MAGIC BIT
MOV R2,4(R1) ; SEEK TO 0 MOV R2,4(R1) ; SEEK TO 0
CLRB R3 CLRB R3
BIS #6,R3 ; UNIT+SEEK BIS #6,R3 ; UNIT+SEEK
MOV R3,(R1) ; ISSUE CMD MOV R3,(R1) ; ISSUE CMD
TSTB (R1) ; WAIT TSTB (R1) ; WAIT
BPL .-2 BPL .-2
CLR 2(R1) ; CLR BA CLR 2(R1) ; CLR BA
CLR 4(R1) ; CLR DA CLR 4(R1) ; CLR DA
MOV #-512.,6(R1) ; SET WC MOV #-512.,6(R1) ; SET WC
CLRB R3 CLRB R3
BIS #14,R3 ; UNIT+READ BIS #14,R3 ; UNIT+READ
MOV R3,(R1) ; ISSUE CMD MOV R3,(R1) ; ISSUE CMD
TSTB (R1) ; WAIT TSTB (R1) ; WAIT
BPL .-2 BPL .-2
BIC #377,(R1) BIC #377,(R1)
CLR R2 CLR R2
CLR R3 CLR R3
CLR R4 CLR R4
CLR R5 CLR R5
CLR PC CLR PC
RKDA=177412 RKDA=177412
READGO=5 READGO=5
BOOTRK: BOOTRK:
RESET RESET
SWAB R3 ; UNIT NUMBER SWAB R3 ; UNIT NUMBER
ASL R3 ASL R3
ASL R3 ASL R3
ASL R3 ASL R3
ASL R3 ASL R3
ASL R3 ASL R3
MOV #RKDA,R1 ; CSR MOV #RKDA,R1 ; CSR
MOV R3,(R1) ; LOAD DA MOV R3,(R1) ; LOAD DA
CLR -(R1) ; CLEAR BA CLR -(R1) ; CLEAR BA
MOV #-256.*2,-(R1) ; LOAD WC MOV #-256.*2,-(R1) ; LOAD WC
MOV #READGO,-(R1) ; READ & GO MOV #READGO,-(R1) ; READ & GO
CLR R2 CLR R2
CLR R3 CLR R3
CLR R4 CLR R4
CLR R5 CLR R5
TSTB (R1) TSTB (R1)
BPL .-2 BPL .-2
CLRB (R1) CLRB (R1)
CLR PC CLR PC
RPCSR=0176700 RPCSR=0176700
BOOTRP: BOOTRP:
RESET RESET
MOV #RPCSR, R1 MOV #RPCSR, R1
MOV #0000040, 10(R1) ; RESET MOV #0000040, 10(R1) ; RESET
MOV R3, 10(R1) ; SET UNIT MOV R3, 10(R1) ; SET UNIT
MOV #0000021, (R1) ; PACK ACK MOV #0000021, (R1) ; PACK ACK
MOV #0010000, 32(R1) ; 16B MODE MOV #0010000, 32(R1) ; 16B MODE
MOV #-512., 2(R1) ; SET WC MOV #-512., 2(R1) ; SET WC
CLR 4(R1) ; CLR BA CLR 4(R1) ; CLR BA
CLR 6(R1) ; CLR DA CLR 6(R1) ; CLR DA
CLR 34(R1) ; CLR CYL CLR 34(R1) ; CLR CYL
MOV #0000071, (R1) ; READ MOV #0000071, (R1) ; READ
TSTB (R1) ; WAIT TSTB (R1) ; WAIT
BPL .-2 BPL .-2
CLRB (R1) CLRB (R1)
MOV R3,R0 MOV R3,R0
CLR PC CLR PC
.END START .END START

2
apps/pdp11/boot/monitor/makefile
View file

@ -8,7 +8,7 @@ BOOTMON.txt: BOOTMON.mac
macro11 BOOTMON.mac -l BOOTMON.txt macro11 BOOTMON.mac -l BOOTMON.txt
BOOTMON.json: BOOTMON.txt BOOTMON.json: BOOTMON.txt
node ../../../../modules/filedump/bin/filedump --file=BOOTMON.txt --format=octal --output=BOOTMON.json --overwrite node ../../../../modules/filedump/bin/filedump --file=BOOTMON.txt --format=octal --output=BOOTMON.json --load=0xC000 --exec=0xC000 --overwrite
BOOTMON.md: BOOTMON.mac BOOTMON.md: BOOTMON.mac
tabify -8 -d BOOTMON.mac > BOOTMON.md tabify -8 -d BOOTMON.mac > BOOTMON.md

5
devices/pdp11/machine/1170/README.md
View file

@ -10,6 +10,9 @@ PDP-11/70 Machine Configurations
PDPjs is currently being tested with the following PDP-11/70 machine configurations: PDPjs is currently being tested with the following PDP-11/70 machine configurations:
* [PDP-11/70 Boot Monitor](/devices/pdp11/machine/1170/monitor/) (with [Debugger](/devices/pdp11/machine/1170/monitor/debugger/)) * [PDP-11/70 Boot Monitor](/devices/pdp11/machine/1170/monitor/) (with [Debugger](/devices/pdp11/machine/1170/monitor/debugger/))
* [PDP-11/70 with Front Panel](/devices/pdp11/machine/1170/panel) (with [Debugger](/devices/pdp11/machine/1170/panel/debugger/)) * [PDP-11/70 with Front Panel](/devices/pdp11/machine/1170/panel/) (with [Debugger](/devices/pdp11/machine/1170/panel/debugger/))
* [PDP-11/70 "Server Array"](/devices/pdp11/machine/1170/array/) * [PDP-11/70 "Server Array"](/devices/pdp11/machine/1170/array/)
* [PDP-11/70 with VT100 Terminal](/devices/pdp11/machine/1170/vt100/) (with [Debugger](/devices/pdp11/machine/1170/vt100/debugger/)) * [PDP-11/70 with VT100 Terminal](/devices/pdp11/machine/1170/vt100/) (with [Debugger](/devices/pdp11/machine/1170/vt100/debugger/))
The [PDP-11/70 with Front Panel and Debugger](/devices/pdp11/machine/1170/panel/debugger/) also features a section
on "[Toggle-Ins](/devices/pdp11/machine/1170/panel/debugger/#toggle-ins)" for your switch-toggling enjoyment.

2
devices/pdp11/machine/1170/monitor/debugger/machine.xml
View file

@ -4,7 +4,7 @@
<name pos="center">PDP-11/70 Boot Monitor with Debugger</name> <name pos="center">PDP-11/70 Boot Monitor with Debugger</name>
<computer id="computer" busWidth="22"/> <computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667"/> <cpu id="cpu" model="1170" cycles="6666667"/>
<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/> <ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<device id="default" type="default"/> <device id="default" type="default"/>
<serial id="dl11" adapter="0" binding="print"/> <serial id="dl11" adapter="0" binding="print"/>
<panel ref="/devices/pdp11/panel/test/debugger/terminal.xml"/> <panel ref="/devices/pdp11/panel/test/debugger/terminal.xml"/>

2
devices/pdp11/machine/1170/monitor/machine.xml
View file

@ -4,7 +4,7 @@
<name pos="center">PDP-11/70 Boot Monitor</name> <name pos="center">PDP-11/70 Boot Monitor</name>
<computer id="computer" busWidth="22"/> <computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/> <cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/>
<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/> <ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<device id="default" type="default"/> <device id="default" type="default"/>
<serial id="dl11" adapter="0" binding="print"/> <serial id="dl11" adapter="0" binding="print"/>
<panel ref="/devices/pdp11/panel/test/terminal.xml"/> <panel ref="/devices/pdp11/panel/test/terminal.xml"/>

2
devices/pdp11/machine/1170/panel/README.md
View file

@ -1,6 +1,6 @@
--- ---
layout: page layout: page
title: PDP-11/70 with Front Panel title: PDP-11/70 with 256Kb and Front Panel
permalink: /devices/pdp11/machine/1170/panel/ permalink: /devices/pdp11/machine/1170/panel/
machines: machines:
- id: test1170 - id: test1170

2
devices/pdp11/machine/1170/panel/debugger/README.md
View file

@ -1,6 +1,6 @@
--- ---
layout: page layout: page
title: PDP-11/70 with Front Panel and Debugger title: PDP-11/70 with 256Kb, Front Panel, and Debugger
permalink: /devices/pdp11/machine/1170/panel/debugger/ permalink: /devices/pdp11/machine/1170/panel/debugger/
machines: machines:
- id: test1170 - id: test1170

4
devices/pdp11/machine/1170/panel/debugger/machine.xml
View file

@ -1,10 +1,10 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?> <?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?>
<machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7"> <machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7">
<name pos="center">PDP-11/70 with Front Panel and Debugger</name> <name pos="center">PDP-11/70 with 256Kb, Front Panel and Debugger</name>
<computer id="computer" busWidth="22"/> <computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667"/> <cpu id="cpu" model="1170" cycles="6666667"/>
<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/> <ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/> <rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>
<device id="default" type="default"/> <device id="default" type="default"/>
<serial id="dl11" adapter="0" binding="print" upperCase="true"/> <serial id="dl11" adapter="0" binding="print" upperCase="true"/>

19
devices/pdp11/machine/1170/panel/debugger/xxdp/README.md Normal file
View file

@ -0,0 +1,19 @@
---
layout: page
title: PDP-11/70 with Front Panel and Debugger
permalink: /devices/pdp11/machine/1170/panel/debugger/xxdp/
machines:
- id: test1170
type: pdp11
debugger: true
autoStart: true
autoMount:
RL0:
path: http://archive.pcjs.org/disks/dec/rl02k/RL02K-XXDP.json
---
{% include machine.html id="test1170" %}
Other interesting things to know about this machine:
* It includes an [M9312 ROM](/devices/pdp11/rom/M9312/) at address 165000. The exact ROM is [23-616F1](/devices/pdp11/rom/M9312/23-616F1.txt).

15
devices/pdp11/machine/1170/panel/debugger/xxdp/machine.xml Normal file
View file

@ -0,0 +1,15 @@
<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?>
<machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7">
<name pos="center">PDP-11/70 with 256Kb, Front Panel and Debugger</name>
<computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667"/>
<ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>
<device id="default" type="default"/>
<serial id="dl11" adapter="0" binding="print" upperCase="true"/>
<panel ref="/devices/pdp11/panel/1170/debugger/front.xml"/>
<debugger id="debugger" base="8" messages="" commands=""/>
<device ref="/devices/pdp11/pc11/default.xml"/>
<device ref="/devices/pdp11/rl11/default.xml"/>
</machine>

4
devices/pdp11/machine/1170/panel/machine.xml
View file

@ -1,10 +1,10 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?> <?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?>
<machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7"> <machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7">
<name pos="center">PDP-11/70 with Front Panel</name> <name pos="center">PDP-11/70 with 256Kb and Front Panel</name>
<computer id="computer" busWidth="22"/> <computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/> <cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/>
<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/> <ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/> <rom id="m9312" addr="0xEA00" size="0x200" file="/devices/pdp11/rom/M9312/23-616F1.json"/>
<device id="default" type="default"/> <device id="default" type="default"/>
<serial id="dl11" adapter="0" binding="print" upperCase="true"/> <serial id="dl11" adapter="0" binding="print" upperCase="true"/>

4
devices/pdp11/machine/1170/vt100/debugger/machine.xml
View file

@ -1,10 +1,10 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?> <?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?>
<machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7"> <machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7">
<name pos="center">PDP-11/70 with Front Panel</name> <name pos="center">PDP-11/70 with 256Kb, Front Panel, and Debugger</name>
<computer id="computer" busWidth="22"/> <computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/> <cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/>
<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/> <ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<device id="default" type="default"/> <device id="default" type="default"/>
<serial id="dl11" adapter="0"/> <serial id="dl11" adapter="0"/>
<panel ref="/devices/pdp11/panel/1170/debugger/front.xml"/> <panel ref="/devices/pdp11/panel/1170/debugger/front.xml"/>

4
devices/pdp11/machine/1170/vt100/machine.xml
View file

@ -1,10 +1,10 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?> <?xml-stylesheet type="text/xsl" href="/versions/pdpjs/1.30.3/machine.xsl"?>
<machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7"> <machine id="test1170" class="pdp11" border="1" pos="center" background="#FAEBD7">
<name pos="center">PDP-11/70 with Front Panel</name> <name pos="center">PDP-11/70 with 256Kb and Front Panel</name>
<computer id="computer" busWidth="22"/> <computer id="computer" busWidth="22"/>
<cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/> <cpu id="cpu" model="1170" cycles="6666667" autoStart="true"/>
<ram id="ram" addr="0x00000" size="0x3E000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/> <ram id="ram" addr="0x00000" size="0x40000" file="/apps/pdp11/boot/monitor/BOOTMON.json"/>
<device id="default" type="default"/> <device id="default" type="default"/>
<serial id="dl11" adapter="0"/> <serial id="dl11" adapter="0"/>
<panel ref="/devices/pdp11/panel/1170/front.xml"/> <panel ref="/devices/pdp11/panel/1170/front.xml"/>

6
modules/pcx86/lib/debugger.js
View file

@ -7086,12 +7086,12 @@ if (DEBUGGER) {
DebuggerX86.prototype.doStep = function(sCmd) DebuggerX86.prototype.doStep = function(sCmd)
{ {
var fCallStep = true; var fCallStep = true;
var fRegs = (sCmd == "pr"? 1 : 0); var nRegs = (sCmd == "pr"? 1 : 0);
/* /*
* Set up the value for this.nStep (ie, 1 or 2) depending on whether the user wants * Set up the value for this.nStep (ie, 1 or 2) depending on whether the user wants
* a subsequent register dump ("pr") or not ("p"). * a subsequent register dump ("pr") or not ("p").
*/ */
var nStep = 1 + fRegs; var nStep = 1 + nRegs;
if (!this.nStep) { if (!this.nStep) {
var fPrefix; var fPrefix;
var fRepeat = false; var fRepeat = false;
@ -7186,7 +7186,7 @@ if (DEBUGGER) {
* stopped for reasons unrelated to the temporary breakpoint, but that's OK. * stopped for reasons unrelated to the temporary breakpoint, but that's OK.
*/ */
} else { } else {
this.doTrace(fRegs? "tr" : "t"); this.doTrace(nRegs? "tr" : "t");
} }
} else { } else {
this.println("step in progress"); this.println("step in progress");

74
modules/pdp11/lib/bus.js
View file

@ -166,11 +166,12 @@ Component.subclass(BusPDP11);
BusPDP11.IOPAGE_16BIT = 0xE000; /*000160000*/ // eg, PDP-11/20 BusPDP11.IOPAGE_16BIT = 0xE000; /*000160000*/ // eg, PDP-11/20
BusPDP11.IOPAGE_18BIT = 0x3E000; /*000760000*/ // eg, PDP-11/45 BusPDP11.IOPAGE_18BIT = 0x3E000; /*000760000*/ // eg, PDP-11/45
BusPDP11.IOPAGE_UNIBUS = 0x3C0000; /*017000000*/
BusPDP11.IOPAGE_22BIT = 0x3FE000; /*017760000*/ // eg, PDP-11/70 BusPDP11.IOPAGE_22BIT = 0x3FE000; /*017760000*/ // eg, PDP-11/70
BusPDP11.IOPAGE_LENGTH = 0x2000; // ie, 8Kb BusPDP11.IOPAGE_LENGTH = 0x2000; // ie, 8Kb
BusPDP11.IOPAGE_MASK = BusPDP11.IOPAGE_LENGTH - 1; BusPDP11.IOPAGE_MASK = BusPDP11.IOPAGE_LENGTH - 1;
BusPDP11.MAX_MEMORY = BusPDP11.IOPAGE_UNIBUS - 16384; // Maximum memory address (need less memory for BSD 2.9 boot)
BusPDP11.UNIBUS_22BIT = 0x3C0000; /*017000000*/
BusPDP11.MAX_MEMORY = BusPDP11.UNIBUS_22BIT - 16384; // Maximum memory address (need less memory for BSD 2.9 boot)
BusPDP11.ERROR = { BusPDP11.ERROR = {
RANGE_INUSE: 1, RANGE_INUSE: 1,
@ -319,15 +320,11 @@ BusPDP11.IOController = {
fWrite = true; fWrite = true;
} }
/* /*
* If a writeWord() handler exists, call the readWord() handler first to get the original data, * If a writeWord() handler exists, call the readWord() handler first to get the original data
* then call writeWord() with the new data pre-inserted in the original data. * (with fPreWrite set to true) and call writeWord() with the new data inserted into the original data.
*
* WARNING: Whenever we call readWord() under these circumstances, we zero the address parameter,
* so that the handler can distinguish this case. Thus, if we're dealing with a special register
* where a byte write operation modifies the entire register, the handler can simply return zero.
*/ */
else if (afn[BusPDP11.IOHANDLER.WRITE_WORD]) { else if (afn[BusPDP11.IOHANDLER.WRITE_WORD]) {
w = afn[BusPDP11.IOHANDLER.READ_WORD]? afn[BusPDP11.IOHANDLER.READ_WORD](0) : 0; w = afn[BusPDP11.IOHANDLER.READ_WORD]? afn[BusPDP11.IOHANDLER.READ_WORD](addrMasked, true) : 0;
if (!(addrMasked & 0x1)) { if (!(addrMasked & 0x1)) {
afn[BusPDP11.IOHANDLER.WRITE_WORD]((w & ~0xff) | b, addrMasked); afn[BusPDP11.IOHANDLER.WRITE_WORD]((w & ~0xff) | b, addrMasked);
fWrite = true; fWrite = true;
@ -339,18 +336,14 @@ BusPDP11.IOController = {
} else if (addrMasked & 0x1) { } else if (addrMasked & 0x1) {
/* /*
* If no handler existed, and this address was odd, then perhaps a handler exists for the even address; * If no handler existed, and this address was odd, then perhaps a handler exists for the even address;
* if so, call the readWord() handler first to get the original data, then call writeWord() with the new * if so, call the readWord() handler first to get the original data (with fPreWrite set to true) and call
* data pre-inserted in (the high byte of) the original data. * writeWord() with the new data inserted into (the high byte of) the original data.
*
* WARNING: Whenever we call readWord() under these circumstances, we zero the address parameter,
* so that the handler can distinguish this case. Thus, if we're dealing with a special register
* where a byte write operation modifies the entire register, the handler can simply return zero.
*/ */
afn = bus.aIOHandlers[off & ~0x1]; afn = bus.aIOHandlers[off & ~0x1];
if (afn) { if (afn) {
if (afn[BusPDP11.IOHANDLER.WRITE_WORD]) { if (afn[BusPDP11.IOHANDLER.WRITE_WORD]) {
addrMasked &= ~0x1; addrMasked &= ~0x1;
w = afn[BusPDP11.IOHANDLER.READ_WORD]? afn[BusPDP11.IOHANDLER.READ_WORD](0) : 0; w = afn[BusPDP11.IOHANDLER.READ_WORD]? afn[BusPDP11.IOHANDLER.READ_WORD](addrMasked, true) : 0;
afn[BusPDP11.IOHANDLER.WRITE_WORD]((w & 0xff) | (b << 8), addrMasked); afn[BusPDP11.IOHANDLER.WRITE_WORD]((w & 0xff) | (b << 8), addrMasked);
fWrite = true; fWrite = true;
} else if (afn[BusPDP11.IOHANDLER.WRITE_BYTE]) { } else if (afn[BusPDP11.IOHANDLER.WRITE_BYTE]) {
@ -930,11 +923,11 @@ BusPDP11.prototype.setMemoryBlocks = function(addr, size, aBlocks, type)
BusPDP11.prototype.getByte = function(addr) BusPDP11.prototype.getByte = function(addr)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
return this.aMemBlocks[(addr & this.nBusMask) >>> this.nBlockShift].readByte(addr & this.nBlockLimit, addr); return this.aMemBlocks[(addr & this.nBusMask) >>> this.nBlockShift].readByte(addr & this.nBlockLimit, addr);
@ -952,11 +945,11 @@ BusPDP11.prototype.getByte = function(addr)
BusPDP11.prototype.getByteDirect = function(addr) BusPDP11.prototype.getByteDirect = function(addr)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
this.fFault = false; this.fFault = false;
@ -976,11 +969,11 @@ BusPDP11.prototype.getByteDirect = function(addr)
BusPDP11.prototype.getWord = function(addr) BusPDP11.prototype.getWord = function(addr)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
var off = addr & this.nBlockLimit; var off = addr & this.nBlockLimit;
@ -1003,11 +996,11 @@ BusPDP11.prototype.getWord = function(addr)
BusPDP11.prototype.getWordDirect = function(addr) BusPDP11.prototype.getWordDirect = function(addr)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
var w; var w;
@ -1034,11 +1027,11 @@ BusPDP11.prototype.getWordDirect = function(addr)
BusPDP11.prototype.setByte = function(addr, b) BusPDP11.prototype.setByte = function(addr, b)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
this.aMemBlocks[(addr & this.nBusMask) >>> this.nBlockShift].writeByte(addr & this.nBlockLimit, b & 0xff, addr); this.aMemBlocks[(addr & this.nBusMask) >>> this.nBlockShift].writeByte(addr & this.nBlockLimit, b & 0xff, addr);
@ -1057,11 +1050,11 @@ BusPDP11.prototype.setByte = function(addr, b)
BusPDP11.prototype.setByteDirect = function(addr, b) BusPDP11.prototype.setByteDirect = function(addr, b)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
this.fFault = false; this.fFault = false;
@ -1080,11 +1073,11 @@ BusPDP11.prototype.setByteDirect = function(addr, b)
BusPDP11.prototype.setWord = function(addr, w) BusPDP11.prototype.setWord = function(addr, w)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
var off = addr & this.nBlockLimit; var off = addr & this.nBlockLimit;
@ -1110,11 +1103,11 @@ BusPDP11.prototype.setWord = function(addr, w)
BusPDP11.prototype.setWordDirect = function(addr, w) BusPDP11.prototype.setWordDirect = function(addr, w)
{ {
/* /*
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the * then we have a 22-bit address pointing to the top 256Kb range, so we must pass the address through the
* UNIBUS relocation map. * UNIBUS relocation map.
*/ */
if (addr >= BusPDP11.IOPAGE_UNIBUS) { if (addr >= BusPDP11.UNIBUS_22BIT) {
addr = this.cpu.mapUnibus(addr); addr = this.cpu.mapUnibus(addr);
} }
var off = addr & this.nBlockLimit; var off = addr & this.nBlockLimit;
@ -1272,7 +1265,7 @@ BusPDP11.prototype.getMemorySize = function(type)
}; };
/** /**
* addIOHandlers(start, end, fnReadByte, fnWriteByte, fnReadWord, fnWriteWord, sName) * addIOHandlers(start, end, fnReadByte, fnWriteByte, fnReadWord, fnWriteWord, msgCategory, sName)
* *
* Add I/O notification handlers to the master list (aIOHandlers). The start and end addresses are typically * Add I/O notification handlers to the master list (aIOHandlers). The start and end addresses are typically
* relative to the starting IOPAGE address, but they can also be absolute; we simply mask all addresses with * relative to the starting IOPAGE address, but they can also be absolute; we simply mask all addresses with
@ -1281,7 +1274,9 @@ BusPDP11.prototype.getMemorySize = function(type)
* CAVEATS: If a conflict is reported, a partial set of handlers may still have been added. There is no mechanism * CAVEATS: If a conflict is reported, a partial set of handlers may still have been added. There is no mechanism
* for removing handlers, since this is considered an initialization function. And finally, when a range of addresses * for removing handlers, since this is considered an initialization function. And finally, when a range of addresses
* is used, each successive address is advanced by 2, so if you really want to add a handler for a "+1" (usually odd) * is used, each successive address is advanced by 2, so if you really want to add a handler for a "+1" (usually odd)
* address, then you must add it individually. * address, then you must add it individually. Failure to do is not necessarily fatal, because the IOController's
* fallback behavior for an odd address is to call the byte handler for the preceding even address, but the byte
* handler must be prepared for that (the handlers installed by ROM component's addROM() function are a good example).
* *
* @this {BusPDP11} * @this {BusPDP11}
* @param {number} start address * @param {number} start address
@ -1309,18 +1304,16 @@ BusPDP11.prototype.addIOHandlers = function(start, end, fnReadByte, fnWriteByte,
}; };
/** /**
* addIOTable(component, table, msgCategory, sName) * addIOTable(component, table)
* *
* Add I/O notification handlers from the specified table (a batch version of addIOHandlers). * Add I/O notification handlers from the specified table (a batch version of addIOHandlers).
* *
* @this {BusPDP11} * @this {BusPDP11}
* @param {Component} component * @param {Component} component
* @param {Object} table * @param {Object} table
* @param {number} [msgCategory] (default is BUS)
* @param {string} [sName]
* @return {boolean} (true if entire range successfully registered, false if any conflicts) * @return {boolean} (true if entire range successfully registered, false if any conflicts)
*/ */
BusPDP11.prototype.addIOTable = function(component, table, msgCategory, sName) BusPDP11.prototype.addIOTable = function(component, table)
{ {
for (var port in table) { for (var port in table) {
var addr = +port; var addr = +port;
@ -1336,7 +1329,6 @@ BusPDP11.prototype.addIOTable = function(component, table, msgCategory, sName)
var fnWriteByte = afn[1]? afn[1].bind(component) : null; var fnWriteByte = afn[1]? afn[1].bind(component) : null;
var fnReadWord = afn[2]? afn[2].bind(component) : null; var fnReadWord = afn[2]? afn[2].bind(component) : null;
var fnWriteWord = afn[3]? afn[3].bind(component) : null; var fnWriteWord = afn[3]? afn[3].bind(component) : null;
var nRegs = afn[5] || 1;
/* /*
* As discussed in the IOController comments above, when handlers are being registered for these * As discussed in the IOController comments above, when handlers are being registered for these
@ -1360,9 +1352,11 @@ BusPDP11.prototype.addIOTable = function(component, table, msgCategory, sName)
} }
var sReg = afn[4]; var sReg = afn[4];
var nRegs = afn[5] || 1;
for (var iReg = 0; iReg < nRegs; iReg++, addr += 2) { for (var iReg = 0; iReg < nRegs; iReg++, addr += 2) {
if (sReg && nRegs > 1) sReg = afn[4] + iReg; if (sReg && nRegs > 1) sReg = afn[4] + iReg;
if (!this.addIOHandlers(addr, addr, fnReadByte, fnWriteByte, fnReadWord, fnWriteWord, msgCategory || MessagesPDP11.BUS, sReg || sName)) { if (!this.addIOHandlers(addr, addr, fnReadByte, fnWriteByte, fnReadWord, fnWriteWord, afn[7] || component.bitsMessage || MessagesPDP11.BUS, sReg || component.idComponent)) {
return false; return false;
} }
} }

4
modules/pdp11/lib/computer.js
View file

@ -1067,8 +1067,8 @@ ComputerPDP11.prototype.updateDisplays = function(nUpdate)
* nUpdate will also be -1 whenever the Debugger has modified the state of the machine, implying that we're * nUpdate will also be -1 whenever the Debugger has modified the state of the machine, implying that we're
* not sure what, if anything, actually changed. * not sure what, if anything, actually changed.
*/ */
if (this.cpu) this.cpu.updateDisplay(nUpdate); if (this.cpu) this.cpu.updateDisplay(nUpdate || 0);
if (this.panel) this.panel.updateDisplay(nUpdate); if (this.panel) this.panel.updateDisplay(nUpdate || 0);
}; };
/** /**

13
modules/pdp11/lib/cpu.js
View file

@ -105,6 +105,8 @@ function CPUPDP11(parmsCPU, nCyclesDefault)
var nMultiplier = parmsCPU['multiplier'] || 1; var nMultiplier = parmsCPU['multiplier'] || 1;
this.nDisplayCount = 0;
this.nDisplayLimit = 30;
this.nCyclesPerSecond = nCycles; this.nCyclesPerSecond = nCycles;
/* /*
@ -525,12 +527,17 @@ CPUPDP11.prototype.updateDisplays = function(nUpdate)
* However, this should be called via the Computer's updateDisplays() interface, not directly. * However, this should be called via the Computer's updateDisplays() interface, not directly.
* *
* @this {CPUPDP11} * @this {CPUPDP11}
* @param {number} [nUpdate] (1 for periodic, -1 for forced, 0 or undefined otherwise) * @param {number} [nUpdate] (1 for periodic, -1 for forced, 0 otherwise)
*/ */
CPUPDP11.prototype.updateDisplay = function(nUpdate) CPUPDP11.prototype.updateDisplay = function(nUpdate)
{ {
var controlSpeed = this.bindings["speed"]; var controlSpeed = this.bindings["speed"];
if (controlSpeed) controlSpeed.textContent = this.getSpeedCurrent(); if (controlSpeed) {
if (nUpdate <= 0 || (this.nDisplayCount += nUpdate) >= this.nDisplayLimit) {
controlSpeed.textContent = this.getSpeedCurrent();
this.nDisplayCount = 0;
}
}
}; };
/** /**
@ -684,7 +691,7 @@ CPUPDP11.prototype.getSpeedCurrent = function()
/* /*
* TODO: Has toFixed() been "fixed" in all browsers (eg, IE) to return a rounded value now? * TODO: Has toFixed() been "fixed" in all browsers (eg, IE) to return a rounded value now?
*/ */
return ((this.flags.running && this.mhz)? (this.mhz.toFixed(2) + "Mhz") : "Stopped"); return ((this.flags.running)? (this.mhz.toFixed(2) + "Mhz") : "Stopped");
}; };
/** /**

41
modules/pdp11/lib/cpuops.js
View file

@ -1471,6 +1471,42 @@ PDP11.opRESET = function(opCode)
{ {
if (!(this.regPSW & PDP11.PSW.CMODE)) { if (!(this.regPSW & PDP11.PSW.CMODE)) {
this.resetCPU(); this.resetCPU();
if (this.panel) {
/*
* The PDP-11/70 XXDP test "EKBBF0" reports the following, with PANEL messages on ("m panel on"):
*
* CNSW.writeWord(177570,000101) @033502
* CNSW.readWord(177570): 000000 @032114
* LOOK AT THE CONSOLE LIGHTS
* THE DATA LIGHTS SHOULD READ 166667
* THE ADDRESS LIGHTS SHOULD READ CNSW.readWord(177570): 000000 @032150
* 032236
* CHANGE SWITCH 7 TO CONTINUE
* CNSW.readWord(177570): 000000 @032236
* stopped (31518011 instructions, 358048873 cycles, 58644 ms, 6105465 hz)
* R0=166667 R1=002362 R2=000000 R3=000000 R4=000000 R5=026642
* SP=001074 PC=032236 PS=000344 SR=00000000 T0 N0 Z1 V0 C0
* 032236: 032737 000200 177570 BIT #200,@#177570
* >> tr
* CNSW.readWord(177570): 000000 @032236 (cpu halted)
* R0=166667 R1=002362 R2=000000 R3=000000 R4=000000 R5=026642
* SP=001074 PC=032244 PS=000344 SR=00000000 T0 N0 Z1 V0 C0
* 032244: 001773 BEQ 032234 ;cycles=0
* >> tr
* R0=166667 R1=002362 R2=000000 R3=000000 R4=000000 R5=026642
* SP=001074 PC=032234 PS=000344 SR=00000000 T0 N0 Z1 V0 C0
* 032234: 000005 RESET ;cycles=5
*
* It's a little hard to see why the DATA lights should read 166667, since the PANEL messages indicate
* that the last CNSW.writeWord(177570) was for 000101, not 166667. So I'm guessing that the RESET
* instruction is supposed to propagate R0 to the console's DISPLAY register.
*
* This is similar to what we do for the HALT instruction on the PDP-11/20. None of these Console features
* seem to be very well documented (assuming they exist).
*/
this.panel.setData(this.regsGen[0], true);
}
} }
this.nStepCycles -= 667; // TODO: Review (but it's definitely a big number) this.nStepCycles -= 667; // TODO: Review (but it's definitely a big number)
}; };
@ -1739,7 +1775,7 @@ PDP11.opSWAB = function(opCode)
*/ */
PDP11.opSXT = function(opCode) PDP11.opSXT = function(opCode)
{ {
this.updateNZVFlags(this.writeDstWord(opCode, this.getNF? 0xffff : 0)); this.updateNZVFlags(this.writeDstWord(opCode, this.getNF()? 0xffff : 0));
this.nStepCycles -= (this.dstMode? (8 + 1) : (2 + 1) + (this.dstReg == 7? 2 : 0)); this.nStepCycles -= (this.dstMode? (8 + 1) : (2 + 1) + (this.dstReg == 7? 2 : 0));
}; };
@ -1846,7 +1882,8 @@ PDP11.opWAIT = function(opCode)
*/ */
PDP11.opXOR = function(opCode) PDP11.opXOR = function(opCode)
{ {
this.updateDstWord(opCode, this.readSrcWord(opCode), PDP11.fnXOR); var reg = (opCode >> PDP11.SRCMODE.SHIFT) & PDP11.OPREG.MASK;
this.updateDstWord(opCode, this.regsGen[reg], PDP11.fnXOR);
this.nStepCycles -= (this.dstMode? (8 + 1) : (2 + 1) + (this.dstReg == 7? 2 : 0)); this.nStepCycles -= (this.dstMode? (8 + 1) : (2 + 1) + (this.dstReg == 7? 2 : 0));
}; };

271
modules/pdp11/lib/cpustate.js
View file

@ -169,9 +169,10 @@ CPUStatePDP11.prototype.initRegs = function()
/* /*
* TODO: Verify the initial state of all PDP-11 flags and registers (are they well-documented?) * TODO: Verify the initial state of all PDP-11 flags and registers (are they well-documented?)
*/ */
var f = 0xffff;
this.flagC = 0x10000; // PSW C bit this.flagC = 0x10000; // PSW C bit
this.flagV = 0x8000; // PSW V bit this.flagV = 0x8000; // PSW V bit
this.flagZ = 0xffff; // ~ PSW Z bit (TODO: Why do we clear instead of set Z, like other flags?) this.flagZ = f; // ~ PSW Z bit (TODO: Why do we clear instead of set Z, like other flags?)
this.flagN = 0x8000; // PSW N bit this.flagN = 0x8000; // PSW N bit
this.regPSW = 0x000f; // PSW other bits (TODO: What's the point of setting the flag bits here, too?) this.regPSW = 0x000f; // PSW other bits (TODO: What's the point of setting the flag bits here, too?)
this.regsGen = [ // General R0 - R7 this.regsGen = [ // General R0 - R7
@ -180,24 +181,23 @@ CPUStatePDP11.prototype.initRegs = function()
this.regsAlt = [ // Alternate R0 - R5 this.regsAlt = [ // Alternate R0 - R5
0, 0, 0, 0, 0, 0 0, 0, 0, 0, 0, 0
]; ];
this.regsAltStack = [ // Alternate R6 stack pointers (KERNEL, SUPER, illegal, USER) this.regsAltStack = [ // Alternate R6 stack pointers (KERNEL, SUPER, UNUSED, USER)
0, 0, 0, 0 0, 0, 0, 0
]; ];
this.mmuMode = 0; // current memory management mode (see PDP11.MODE.KERNEL | SUPER | UNUSED | USER) this.mmuMode = 0; // current memory management mode (see PDP11.MODE.KERNEL | SUPER | UNUSED | USER)
this.mmuLastPage = 0; this.mmuLastPage = 0;
this.mmuLastVirtual = 0;
this.mapMMR3 = [4,2,0,1]; // map from mode to MMR3 I/D bit this.mapMMR3 = [4,2,0,1]; // map from mode to MMR3 I/D bit
this.mmuPDR = [ // memory management PDR registers by mode this.mmuPDR = [ // memory management PDR registers by mode
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // kernel 0 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // KERNEL (8 KIPDR regs followed by 8 KDPDR regs)
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // super 1 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // SUPER (8 SIPDR regs followed by 8 SDPDR regs)
[0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff], // mode 2 with illegal PDRs [f, f, f, f, f, f, f, f, f, f, f, f, f, f, f, f], // mode 2 (not used)
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] // user 3 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] // USER (8 UIPDR regs followed by 8 UDPDR regs)
]; ];
this.mmuPAR = [ // memory management PAR registers by mode this.mmuPAR = [ // memory management PAR registers by mode
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // kernel 0 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // KERNEL (8 KIPAR regs followed by 8 KDPAR regs)
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // super 1 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // SUPER (8 SIPDR regs followed by 8 SDPDR regs)
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // mode 2 (not used) [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], // mode 2 (not used)
[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] // user 3 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] // USER (8 UIPDR regs followed by 8 UDPDR regs)
]; ];
this.unibusMap = [ // 32 unibus map registers this.unibusMap = [ // 32 unibus map registers
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
@ -222,7 +222,7 @@ CPUStatePDP11.prototype.initRegs = function()
this.dstMode = this.dstReg = this.dstAddr = 0; this.dstMode = this.dstReg = this.dstAddr = 0;
this.trapPSW = -1; this.trapPSW = -1;
this.resetRegs(); this.resetMMU();
}; };
/** /**
@ -233,35 +233,48 @@ CPUStatePDP11.prototype.initRegs = function()
CPUStatePDP11.prototype.resetCPU = function() CPUStatePDP11.prototype.resetCPU = function()
{ {
this.bus.reset(); this.bus.reset();
this.resetRegs(); this.resetMMU();
}; };
/** /**
* resetRegs() * resetMMU()
* *
* @this {CPUStatePDP11} * @this {CPUStatePDP11}
*/ */
CPUStatePDP11.prototype.resetRegs = function() CPUStatePDP11.prototype.resetMMU = function()
{ {
this.regSL = 0xff; // 177774
this.regErr = 0; // 177766
this.regPIR = 0; // 177772
this.regMMR0 = 0; // 177572 this.regMMR0 = 0; // 177572
this.regMMR1 = 0; // 177574 this.regMMR1 = 0; // 177574
this.regMMR2 = 0; // 177576 this.regMMR2 = 0; // 177576
this.regMMR3 = 0; // 172516 this.regMMR3 = 0; // 172516
this.regErr = 0; // 177766
this.regPIR = 0; // 177772
this.regSL = 0xff; // 177774
this.mmuEnable = 0; // MMU enabled for PDP11.ACCESS.READ or PDP11.ACCESS.WRITE this.mmuEnable = 0; // MMU enabled for PDP11.ACCESS.READ or PDP11.ACCESS.WRITE
this.mmuLastMode = 0; this.mmuLastMode = 0;
this.mmuMask = 0x3ffff; this.mmuMask = 0x3ffff;
this.lastAI = 0; // last auto-incs and/or auto-decs; this gets propagated to MMR1 this.lastAddr = 0; // this is queried by the Panel when it's not using its own ADDRESS register
this.lastPC = 0; // last PC at the time of getOpcode(); this get propagated to MMR2 this.lastOp = 0; // stores the PC and any auto-incs or auto-decs from the last opcode; used to update MMR1 and MMR2
this.resetTriggers(); this.resetTriggers();
if (this.bus) this.setMemoryAccess(); if (this.bus) this.setMemoryAccess();
}; };
/**
* getMMUState()
*
* Returns bit 0 set if 22-bit, bit 1 set if 18-bit, or bit 2 set if 16-bit; used by the Panel component.
*
* @this {CPUStatePDP11}
* @return {number}
*/
CPUStatePDP11.prototype.getMMUState = function()
{
return this.mmuEnable? ((this.regMMR3 & PDP11.MMR3.MMU_22BIT)? 1 : 2) : 4;
};
/** /**
* setMemoryAccess() * setMemoryAccess()
* *
@ -277,12 +290,14 @@ CPUStatePDP11.prototype.setMemoryAccess = function()
{ {
if (this.mmuEnable) { if (this.mmuEnable) {
this.addrDSpace = PDP11.ACCESS.DSPACE; this.addrDSpace = PDP11.ACCESS.DSPACE;
this.addrIOPage = (this.regMMR3 & PDP11.MMR3.MMU_22BIT)? BusPDP11.IOPAGE_22BIT : BusPDP11.IOPAGE_18BIT;
this.getAddr = this.getVirtualAddrByMode; this.getAddr = this.getVirtualAddrByMode;
this.readWord = this.readWordFromVirtual; this.readWord = this.readWordFromVirtual;
this.writeWord = this.writeWordToVirtual; this.writeWord = this.writeWordToVirtual;
this.bus.setIOPageRange((this.regMMR3 & PDP11.MMR3.MMU_22BIT)? 22 : 18); this.bus.setIOPageRange((this.regMMR3 & PDP11.MMR3.MMU_22BIT)? 22 : 18);
} else { } else {
this.addrDSpace = 0; this.addrDSpace = 0;
this.addrIOPage = BusPDP11.IOPAGE_16BIT;
this.getAddr = this.getPhysicalAddrByMode; this.getAddr = this.getPhysicalAddrByMode;
this.readWord = this.readWordFromPhysical; this.readWord = this.readWordFromPhysical;
this.writeWord = this.writeWordToPhysical; this.writeWord = this.writeWordToPhysical;
@ -293,6 +308,8 @@ CPUStatePDP11.prototype.setMemoryAccess = function()
/** /**
* getMMR0() * getMMR0()
* *
* NOTE: It's OK to bypass this function if you're only interested in bits that always stored directly in MMR0.
*
* 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 MMR0 * 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 MMR0
* nonr leng read trap unus unus ena mnt cmp -mode- i/d --page-- enable * nonr leng read trap unus unus ena mnt cmp -mode- i/d --page-- enable
* *
@ -301,7 +318,11 @@ CPUStatePDP11.prototype.setMemoryAccess = function()
*/ */
CPUStatePDP11.prototype.getMMR0 = function() CPUStatePDP11.prototype.getMMR0 = function()
{ {
return (this.regMMR0 & 0xf381) | (this.mmuLastMode << 5) | (this.mmuLastPage << 1); var data = this.regMMR0;
if (!(data & PDP11.MMR0.ABORT)) {
data = (data & ~(PDP11.MMR0.UNUSED | PDP11.MMR0.PAGE | PDP11.MMR0.MODE)) | (this.mmuLastMode << 5) | (this.mmuLastPage << 1);
}
return data;
}; };
/** /**
@ -312,8 +333,22 @@ CPUStatePDP11.prototype.getMMR0 = function()
*/ */
CPUStatePDP11.prototype.setMMR0 = function(newMMR0) CPUStatePDP11.prototype.setMMR0 = function(newMMR0)
{ {
newMMR0 &= 0xf381; newMMR0 &= ~PDP11.MMR0.UNUSED;
if (this.regMMR0 != newMMR0) { if (this.regMMR0 != newMMR0) {
if (newMMR0 & PDP11.MMR0.ABORT) {
/*
* If updates to MMR0[1-7], MMR1, and MMR2 are being shut off (ie, MMR0.ABORT bits are transitioning
* from clear to set), then do one final sync with their real-time counterparts in lastOp.
*/
if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
this.regMMR1 = (this.lastOp >> 16) & 0xffff;
this.regMMR2 = this.lastOp & 0xffff;
}
}
/*
* NOTE: We are not protecting the read-only state of the COMPLETED bit here; that's handled by writeMMR0().
*/
this.regMMR0 = newMMR0; this.regMMR0 = newMMR0;
this.mmuLastMode = (newMMR0 >> 5) & 3; this.mmuLastMode = (newMMR0 >> 5) & 3;
this.mmuLastPage = (newMMR0 >> 1) & 0xf; this.mmuLastPage = (newMMR0 >> 1) & 0xf;
@ -339,8 +374,12 @@ CPUStatePDP11.prototype.setMMR0 = function(newMMR0)
*/ */
CPUStatePDP11.prototype.getMMR1 = function() CPUStatePDP11.prototype.getMMR1 = function()
{ {
/*
* If updates to MMR1 have not been shut off (ie, MMR0.ABORT bits are clear),
* then we are allowed to sync MMR1 with its real-time counterpart in lastOp.
*/
if (!(this.regMMR0 & PDP11.MMR0.ABORT)) { if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
this.regMMR1 = this.lastAI & 0xffff; this.regMMR1 = (this.lastOp >> 16) & 0xffff;
} }
var result = this.regMMR1; var result = this.regMMR1;
if (result & 0xff00) { if (result & 0xff00) {
@ -357,8 +396,12 @@ CPUStatePDP11.prototype.getMMR1 = function()
*/ */
CPUStatePDP11.prototype.getMMR2 = function() CPUStatePDP11.prototype.getMMR2 = function()
{ {
/*
* If updates to MMR2 have not been shut off (ie, MMR0.ABORT bits are clear),
* then we are allowed to sync MMR2 with its real-time counterpart in lastOp.
*/
if (!(this.regMMR0 & PDP11.MMR0.ABORT)) { if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
this.regMMR2 = this.lastPC; this.regMMR2 = this.lastOp & 0xffff;
} }
return this.regMMR2; return this.regMMR2;
}; };
@ -602,8 +645,7 @@ CPUStatePDP11.prototype.setNF = function()
CPUStatePDP11.prototype.getOpcode = function() CPUStatePDP11.prototype.getOpcode = function()
{ {
var pc = this.regsGen[PDP11.REG.PC]; var pc = this.regsGen[PDP11.REG.PC];
this.lastAI = 0; this.lastOp = pc;
this.lastPC = pc;
/* /*
* If PC is unaligned, a BUS trap will be generated, and because it will generate an * If PC is unaligned, a BUS trap will be generated, and because it will generate an
* exception, the next line (the equivalent of advancePC(2)) will not be executed, ensuring that * exception, the next line (the equivalent of advancePC(2)) will not be executed, ensuring that
@ -643,6 +685,17 @@ CPUStatePDP11.prototype.getPC = function()
return this.regsGen[PDP11.REG.PC]; return this.regsGen[PDP11.REG.PC];
}; };
/**
* getLastAddr()
*
* @this {CPUStatePDP11}
* @return {number}
*/
CPUStatePDP11.prototype.getLastAddr = function()
{
return this.lastAddr;
};
/** /**
* getLastPC() * getLastPC()
* *
@ -651,7 +704,7 @@ CPUStatePDP11.prototype.getPC = function()
*/ */
CPUStatePDP11.prototype.getLastPC = function() CPUStatePDP11.prototype.getLastPC = function()
{ {
return this.lastPC; return this.lastOp & 0xffff;
}; };
/** /**
@ -1225,19 +1278,6 @@ CPUStatePDP11.prototype.updateSubFlags = function(result, src, dst)
} }
}; };
/**
* panic(reason)
*
* TODO: Something.
*
* @this {CPUStatePDP11}
* @param {number} reason
*/
CPUStatePDP11.prototype.panic = function(reason)
{
console.log("panic(" + reason + ")");
};
/** /**
* trap(vector, flag, reason) * trap(vector, flag, reason)
* *
@ -1277,8 +1317,19 @@ CPUStatePDP11.prototype.trap = function(vector, flag, reason)
reason = PDP11.REASON.RED; reason = PDP11.REASON.RED;
} }
this.lastPC = vector; /*
this.lastAI = 0; * NOTE: Pre-setting the auto-dec values for MMR1 to 0xF6F6 is a work-around for an "EKBEE1"
* diagnostic (PC 056710), which tests what happens when a misaligned read triggers a BUS trap,
* and that trap then triggers an MMU trap during the first pushWord() below.
*
* One would think it would be fine to zero those bits by setting lastOp to vector alone,
* and then letting each of the pushWord() calls below shift their own 0xF6 auto-dec value into
* lastOp. When the first pushWord() triggers an MMU trap, we obviously won't get to the second
* pushWord(), yet the diagnostic expects TWO auto-decs to be recorded. I'm puzzled why the
* hardware apparently indicates TWO auto-decs, if SP wasn't actually decremented twice, but who
* am I to judge.
*/
this.lastOp = vector | 0xf6f60000;
/* /*
* Read from kernel D space * Read from kernel D space
@ -1381,7 +1432,7 @@ CPUStatePDP11.prototype.getTrapStatus = function()
/** /**
* mapUnibus(addr) * mapUnibus(addr)
* *
* If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.IOPAGE_UNIBUS aka 0x3C0000), * If bits 18-21 of addr are all set (which is implied by addr >= BusPDP11.UNIBUS_22BIT aka 0x3C0000),
* then we have a 22-bit address pointing to the top 256Kb range, so if the UNIBUS relocation map is enabled, * then we have a 22-bit address pointing to the top 256Kb range, so if the UNIBUS relocation map is enabled,
* we must pass the lower 18 bits of that address through the map. * we must pass the lower 18 bits of that address through the map.
* *
@ -1418,8 +1469,19 @@ CPUStatePDP11.prototype.mapUnibus = function(addr)
var idx = (addr >> 13) & 0x1f; var idx = (addr >> 13) & 0x1f;
if (idx < 31) { if (idx < 31) {
if (this.regMMR3 & PDP11.MMR3.UNIBUS_MAP) { if (this.regMMR3 & PDP11.MMR3.UNIBUS_MAP) {
/*
* The UNIBUS map relocation is enabled
*/
addr = (this.unibusMap[idx] + (addr & 0x1ffe)) & 0x3ffffe; addr = (this.unibusMap[idx] + (addr & 0x1ffe)) & 0x3ffffe;
if (addr >= BusPDP11.IOPAGE_UNIBUS && addr < BusPDP11.IOPAGE_22BIT) this.panic(898); this.assert(addr < BusPDP11.UNIBUS_22BIT || addr >= BusPDP11.IOPAGE_22BIT);
} else {
/*
* Since UNIBUS map relocation is NOT enabled, then as explained above:
*
* If the UNIBUS map relocation is not enabled, an incoming 18-bit UNIBUS address has 4 leading zeroes added for
* referencing a 22-bit physical address. The lower 18 bits are the same. No relocation is performed.
*/
addr &= ~BusPDP11.UNIBUS_22BIT;
} }
} }
return addr; return addr;
@ -1490,53 +1552,85 @@ CPUStatePDP11.prototype.mapVirtualToPhysical = function(virtualAddress, accessFl
* This can happen when the DSTMODE (MAINT) bit of MMR0 is set but *not* the ENABLED bit. * This can happen when the DSTMODE (MAINT) bit of MMR0 is set but *not* the ENABLED bit.
*/ */
if (!(accessFlags & this.mmuEnable)) { if (!(accessFlags & this.mmuEnable)) {
return virtualAddress; physicalAddress = virtualAddress & 0xffff;
if (physicalAddress >= BusPDP11.IOPAGE_16BIT) {
physicalAddress |= this.addrIOPage;
}
return physicalAddress;
} }
this.mmuLastVirtual = virtualAddress;
page = virtualAddress >> 13; page = virtualAddress >> 13;
if (!(this.regMMR3 & this.mapMMR3[this.mmuMode])) page &= 7; if (!(this.regMMR3 & this.mapMMR3[this.mmuMode])) page &= 7;
pdr = this.mmuPDR[this.mmuMode][page]; pdr = this.mmuPDR[this.mmuMode][page];
physicalAddress = ((this.mmuPAR[this.mmuMode][page] << 6) + (virtualAddress & 0x1fff)) & this.mmuMask; physicalAddress = ((this.mmuPAR[this.mmuMode][page] << 6) + (virtualAddress & 0x1fff)) & this.mmuMask;
var errorMask = 0; if (this.nDisableTraps) return physicalAddress;
switch (pdr & 0x7) {
case 1: // read-only with trap /*
errorMask = PDP11.MMR0.TRAP_MMU; * This next bit is the weirdness that Paul mentions in the function description above:
*
* As an aside it turns out that it is the memory management unit that does odd address and
* non-existent memory trapping: who knew? :-) I thought these would have been handled at access time.
*
* I haven't imported the non-existent memory checks he performed (yet); I would like to see the problems
* in action first.
*
* As for the ODDADDR error that's supposed to generate a BUS error rather than an MMU error, this happens
* in TEST #122 ("KT BEND") in the "EKBEE1" diagnostic (PC 076456).
*/
if ((physicalAddress & 0x1) && !(accessFlags & PDP11.ACCESS.BYTE)) {
this.regErr |= PDP11.CPUERR.ODDADDR;
this.trap(PDP11.TRAP.BUS, 0, physicalAddress);
}
var newMMR0 = 0;
switch (pdr & PDP11.PDR.ACF.MASK) {
case PDP11.PDR.ACF.RO1: // 0x1: read-only, abort on write attempt, memory management trap on read (11/70 only)
newMMR0 = PDP11.MMR0.TRAP_MMU;
/* falls through */ /* falls through */
case 2: // read-only
pdr |= 0x80; // Set A bit case PDP11.PDR.ACF.RO: // 0x2: read-only, abort on write attempt
pdr |= PDP11.PDR.ACCESSED;
if (accessFlags & PDP11.ACCESS.WRITE) { if (accessFlags & PDP11.ACCESS.WRITE) {
errorMask = PDP11.MMR0.ABORT_RO; newMMR0 = PDP11.MMR0.ABORT_RO;
} }
break; break;
case 4: // read-write with read-write trap
errorMask = PDP11.MMR0.TRAP_MMU; case PDP11.PDR.ACF.RW1: // 0x4: read/write, memory management trap upon completion of a read or write
newMMR0 = PDP11.MMR0.TRAP_MMU;
/* falls through */ /* falls through */
case 5: // read-write with write trap
case PDP11.PDR.ACF.RW2: // 0x5: read/write, memory management trap upon completion of a write (11/70 only)
if (accessFlags & PDP11.ACCESS.WRITE) { if (accessFlags & PDP11.ACCESS.WRITE) {
errorMask = PDP11.MMR0.TRAP_MMU; newMMR0 = PDP11.MMR0.TRAP_MMU;
} }
/* falls through */ /* falls through */
case 6: // read-write: set A & W bits
pdr |= ((accessFlags & PDP11.ACCESS.WRITE) ? 0xc0 : 0x80); case PDP11.PDR.ACF.RW: // 0x6: read/write, no system trap/abort action
pdr |= ((accessFlags & PDP11.ACCESS.WRITE) ? (PDP11.PDR.ACCESSED | PDP11.PDR.MODIFIED) : PDP11.PDR.ACCESSED);
break; break;
default:
errorMask = PDP11.MMR0.ABORT_NR; default: // 0x0 (non-resident, abort all accesses) or 0x3 or 0x7 (unused, abort all accesses)
newMMR0 = PDP11.MMR0.ABORT_NR;
break; break;
} }
if ((pdr & 0x7f08) != 0x7f00) { // skip checking most common case (hopefully) if ((pdr & (PDP11.PDR.PLF | PDP11.PDR.ED)) != PDP11.PDR.PLF) { // skip checking most common case (hopefully)
if (pdr & 0x8) { // expand downwards /*
if (pdr & 0x7f00) { * The Page Descriptor Register (PDR) Page Length Field (PLF) is a 7-bit block number, where a block
if ((virtualAddress & 0x1fc0) < ((pdr >> 2) & 0x1fc0)) { * is 64 bytes. Since the bit 0 of the block number is located at bit 8 of the PDR, we shift the PDR
errorMask |= PDP11.MMR0.ABORT_PL; * right 2 bits and then clear the bottom 6 bits by masking it with 0x1FC0.
*/
if (pdr & PDP11.PDR.ED) {
if (pdr & PDP11.PDR.PLF) {
if ((virtualAddress & 0x1FC0) < ((pdr >> 2) & 0x1FC0)) {
newMMR0 |= PDP11.MMR0.ABORT_PL;
} }
} }
} else { // expand upwards } else {
if ((virtualAddress & 0x1fc0) > ((pdr >> 2) & 0x1fc0)) { if ((virtualAddress & 0x1FC0) > ((pdr >> 2) & 0x1FC0)) {
errorMask |= PDP11.MMR0.ABORT_PL; newMMR0 |= PDP11.MMR0.ABORT_PL;
} }
} }
} }
@ -1551,14 +1645,22 @@ CPUStatePDP11.prototype.mapVirtualToPhysical = function(virtualAddress, accessFl
this.mmuLastPage = page; this.mmuLastPage = page;
} }
var fAbort = false; if (newMMR0) {
if (errorMask) { if (newMMR0 & PDP11.MMR0.ABORT) {
if (errorMask & PDP11.MMR0.ABORT) { if (this.trapPSW >= 0) {
if (this.trapPSW >= 0) errorMask |= 0x80; // Instruction complete newMMR0 |= PDP11.MMR0.COMPLETED;
if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
this.regMMR0 |= errorMask | (this.mmuLastMode << 5) | (this.mmuLastPage << 1);
} }
fAbort = true; if (!(this.regMMR0 & PDP11.MMR0.ABORT)) {
newMMR0 |= (this.regMMR0 & PDP11.MMR0.TRAP_MMU) | (this.mmuLastMode << 5) | (this.mmuLastPage << 1);
this.assert(!(newMMR0 & ~PDP11.MMR0.UPDATE));
this.setMMR0((this.regMMR0 & ~PDP11.MMR0.UPDATE) | (newMMR0 & PDP11.MMR0.UPDATE));
}
/*
* TODO: In unusual circumstances, if regMMR0 already indicated an ABORT condition above,
* we run the risk of infinitely looping; eg, we call trap(), which calls mapVirtualToPhysical()
* on the trap vector, which faults again, etc. We should add some safeguards against that.
*/
this.trap(PDP11.TRAP.MMU, PDP11.OPFLAG.TRAP_MMU, PDP11.REASON.ABORT);
} }
if (!(this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.TRAP_MMU))) { if (!(this.regMMR0 & (PDP11.MMR0.ABORT | PDP11.MMR0.TRAP_MMU))) {
/* /*
@ -1572,9 +1674,6 @@ CPUStatePDP11.prototype.mapVirtualToPhysical = function(virtualAddress, accessFl
} }
} }
} }
if (fAbort) { // don't abort until the end, because it throws an exception
this.trap(PDP11.TRAP.MMU, 0, PDP11.REASON.ABORT);
}
} }
return physicalAddress; return physicalAddress;
}; };
@ -1627,7 +1726,7 @@ CPUStatePDP11.prototype.pushWord = function(data)
{ {
var virtualAddress = (this.regsGen[6] - 2) & 0xffff; var virtualAddress = (this.regsGen[6] - 2) & 0xffff;
this.regsGen[6] = virtualAddress; // BSD needs SP updated before any fault :-( this.regsGen[6] = virtualAddress; // BSD needs SP updated before any fault :-(
this.lastAI = (this.lastAI << 8) | 0xf6; this.lastOp = (this.lastOp & 0xffff) | ((this.lastOp & ~0xffff) << 8) | (0x00f6 << 16);
this.checkStackLimit(0, virtualAddress); this.checkStackLimit(0, virtualAddress);
this.writeWord(virtualAddress, data); this.writeWord(virtualAddress, data);
}; };
@ -1812,7 +1911,7 @@ CPUStatePDP11.prototype.getAddrByMode = function(mode, reg, accessFlags)
} }
this.regsGen[reg] = (this.regsGen[reg] + step) & 0xffff; this.regsGen[reg] = (this.regsGen[reg] + step) & 0xffff;
this.lastAI = (this.lastAI << 8) | ((step << 3) & 0xf8) | reg; this.lastOp = (this.lastOp & 0xffff) | ((this.lastOp & ~0xffff) << 8) | ((((step << 3) & 0xf8) | reg) << 16);
/* /*
* NOTE: We had to eliminate the test for "(accessFlags & PDP11.ACCESS.WRITE)", because DEC's * NOTE: We had to eliminate the test for "(accessFlags & PDP11.ACCESS.WRITE)", because DEC's
@ -1951,7 +2050,7 @@ CPUStatePDP11.prototype.getVirtualAddrByMode = function(mode, reg, accessFlags)
*/ */
CPUStatePDP11.prototype.readWordFromPhysical = function(physicalAddress) CPUStatePDP11.prototype.readWordFromPhysical = function(physicalAddress)
{ {
return this.bus.getWord(physicalAddress); return this.bus.getWord(this.lastAddr = physicalAddress);
}; };
/** /**
@ -1965,7 +2064,7 @@ CPUStatePDP11.prototype.readWordFromPhysical = function(physicalAddress)
*/ */
CPUStatePDP11.prototype.readWordFromVirtual = function(virtualAddress) CPUStatePDP11.prototype.readWordFromVirtual = function(virtualAddress)
{ {
return this.bus.getWord(this.mapVirtualToPhysical(virtualAddress, PDP11.ACCESS.READ_WORD)); return this.bus.getWord(this.lastAddr = this.mapVirtualToPhysical(virtualAddress, PDP11.ACCESS.READ_WORD));
}; };
/** /**
@ -1979,7 +2078,7 @@ CPUStatePDP11.prototype.readWordFromVirtual = function(virtualAddress)
*/ */
CPUStatePDP11.prototype.writeWordToPhysical = function(physicalAddress, data) CPUStatePDP11.prototype.writeWordToPhysical = function(physicalAddress, data)
{ {
this.bus.setWord(physicalAddress, data & 0xffff); this.bus.setWord(this.lastAddr = physicalAddress, data & 0xffff);
}; };
/** /**
@ -1993,7 +2092,7 @@ CPUStatePDP11.prototype.writeWordToPhysical = function(physicalAddress, data)
*/ */
CPUStatePDP11.prototype.writeWordToVirtual = function(virtualAddress, data) CPUStatePDP11.prototype.writeWordToVirtual = function(virtualAddress, data)
{ {
this.bus.setWord(this.mapVirtualToPhysical(virtualAddress, PDP11.ACCESS.WRITE_WORD), data); this.bus.setWord(this.lastAddr = this.mapVirtualToPhysical(virtualAddress, PDP11.ACCESS.WRITE_WORD), data);
}; };
/** /**
@ -2037,7 +2136,7 @@ CPUStatePDP11.prototype.readWordFromPrevSpace = function(opCode, accessFlags)
*/ */
CPUStatePDP11.prototype.writeWordToPrevSpace = function(opCode, accessFlags, data) CPUStatePDP11.prototype.writeWordToPrevSpace = function(opCode, accessFlags, data)
{ {
this.lastAI = 0x0016; this.lastOp = (this.lastOp & 0xffff) | (0x0016 << 16);
var reg = this.dstReg = opCode & PDP11.OPREG.MASK; var reg = this.dstReg = opCode & PDP11.OPREG.MASK;
var mode = this.dstMode = (opCode & PDP11.OPMODE.MASK) >> PDP11.OPMODE.SHIFT; var mode = this.dstMode = (opCode & PDP11.OPMODE.MASK) >> PDP11.OPMODE.SHIFT;
if (!mode) { if (!mode) {

406
modules/pdp11/lib/debugger.js
View file

@ -266,7 +266,32 @@ if (DEBUGGER) {
* Register numbers 0-7 are reserved for cpu.regsGen, 8-15 are reserved for cpu.regsAlt, and 16-19 for cpu.regsStack. * Register numbers 0-7 are reserved for cpu.regsGen, 8-15 are reserved for cpu.regsAlt, and 16-19 for cpu.regsStack.
*/ */
DebuggerPDP11.REG_PSW = 20; DebuggerPDP11.REG_PSW = 20;
DebuggerPDP11.REG_SR = 21; // SWITCH register; see Panel's getSR() and setSR() DebuggerPDP11.REG_PIR = 21;
DebuggerPDP11.REG_ERR = 22;
DebuggerPDP11.REG_SL = 23;
DebuggerPDP11.REG_MMR0 = 24;
DebuggerPDP11.REG_MMR1 = 25;
DebuggerPDP11.REG_MMR2 = 26;
DebuggerPDP11.REG_MMR3 = 27;
DebuggerPDP11.REG_AR = 28; // ADDRESS register; see Panel's getAR() and setAR()
DebuggerPDP11.REG_DR = 29; // DISPLAY/DATA register; see Panel's getDR() and setDR()
DebuggerPDP11.REG_SR = 30; // SWITCH register; see Panel's getSR() and setSR()
DebuggerPDP11.REGS = {
"SP": 6,
"PC": 7,
"PS": DebuggerPDP11.REG_PSW,
"IR": DebuggerPDP11.REG_PIR,
"ER": DebuggerPDP11.REG_ERR,
"SL": DebuggerPDP11.REG_SL,
"MMR0": DebuggerPDP11.REG_MMR0,
"MMR1": DebuggerPDP11.REG_MMR1,
"MMR2": DebuggerPDP11.REG_MMR2,
"MMR3": DebuggerPDP11.REG_MMR3,
"AR": DebuggerPDP11.REG_AR,
"DR": DebuggerPDP11.REG_DR,
"SR": DebuggerPDP11.REG_SR
};
/* /*
* Operand type masks; anything that's not covered by OP_SRC or OP_DST must be a OP_OTHER value. * Operand type masks; anything that's not covered by OP_SRC or OP_DST must be a OP_OTHER value.
@ -322,7 +347,7 @@ if (DEBUGGER) {
0x7200: [DebuggerPDP11.OPS.DIV, DebuggerPDP11.OP_DST, DebuggerPDP11.OP_SRCREG], // 071RSS 0x7200: [DebuggerPDP11.OPS.DIV, DebuggerPDP11.OP_DST, DebuggerPDP11.OP_SRCREG], // 071RSS
0x7400: [DebuggerPDP11.OPS.ASH, DebuggerPDP11.OP_DST, DebuggerPDP11.OP_SRCREG], // 072RSS 0x7400: [DebuggerPDP11.OPS.ASH, DebuggerPDP11.OP_DST, DebuggerPDP11.OP_SRCREG], // 072RSS
0x7600: [DebuggerPDP11.OPS.ASHC, DebuggerPDP11.OP_DST, DebuggerPDP11.OP_SRCREG], // 073RSS 0x7600: [DebuggerPDP11.OPS.ASHC, DebuggerPDP11.OP_DST, DebuggerPDP11.OP_SRCREG], // 073RSS
0x7800: [DebuggerPDP11.OPS.XOR, DebuggerPDP11.OP_SRCREG, DebuggerPDP11.OP_DST], // 074RSS 0x7800: [DebuggerPDP11.OPS.XOR, DebuggerPDP11.OP_SRCREG, DebuggerPDP11.OP_DST], // 074RDD
0x7E00: [DebuggerPDP11.OPS.SOB, DebuggerPDP11.OP_SRCREG, DebuggerPDP11.OP_DSTOFF] // 077Rnn 0x7E00: [DebuggerPDP11.OPS.SOB, DebuggerPDP11.OP_SRCREG, DebuggerPDP11.OP_DSTOFF] // 077Rnn
}, },
0xFF00: { 0xFF00: {
@ -559,7 +584,7 @@ if (DEBUGGER) {
var fCompleted = false; var fCompleted = false;
if (!dbg.isBusy(true)) { if (!dbg.isBusy(true)) {
dbg.setBusy(true); dbg.setBusy(true);
fCompleted = dbg.stepCPU(fRepeat? 1 : 0); fCompleted = dbg.stepCPU(fRepeat? 1 : 0, null);
dbg.setBusy(false); dbg.setBusy(false);
} }
return fCompleted; return fCompleted;
@ -583,7 +608,7 @@ if (DEBUGGER) {
{ {
if (this.controlDebug) { if (this.controlDebug) {
/* /*
* This seems to be recommended work-around to prevent the browser from scrolling the focused element * This is the recommended work-around to prevent the browser from scrolling the focused element
* into view. The CPU is not a visual component, so when the CPU wants to set focus, the primary intent * into view. The CPU is not a visual component, so when the CPU wants to set focus, the primary intent
* is to ensure that keyboard input is fielded properly. * is to ensure that keyboard input is fielded properly.
*/ */
@ -1118,24 +1143,14 @@ if (DEBUGGER) {
*/ */
DebuggerPDP11.prototype.getRegIndex = function(sReg, off) DebuggerPDP11.prototype.getRegIndex = function(sReg, off)
{ {
var iReg = -1;
sReg = sReg.toUpperCase(); sReg = sReg.toUpperCase();
switch(sReg) { var iReg = DebuggerPDP11.REGS[sReg];
case "SP": if (iReg == null) {
iReg = 6; iReg = -1;
break;
case "PC":
iReg = 7;
break;
case "SR":
iReg = 21;
break;
default:
if (sReg.charAt(0) == "R") { if (sReg.charAt(0) == "R") {
iReg = +sReg.charAt(1); iReg = +sReg.charAt(1);
if (iReg < 0 || iReg > 7) iReg = -1; if (iReg < 0 || iReg > 7) iReg = -1;
} }
break;
} }
return iReg; return iReg;
}; };
@ -1156,7 +1171,7 @@ if (DEBUGGER) {
* getRegValue(iReg) * getRegValue(iReg)
* *
* Register numbers 0-7 are reserved for cpu.regsGen, 8-15 are reserved for cpu.regsAlt, * Register numbers 0-7 are reserved for cpu.regsGen, 8-15 are reserved for cpu.regsAlt,
* 16-19 for cpu.regsAltStack, 20 for regPSW, and 21 for SR (SWITCH register). * 16-19 for cpu.regsAltStack, 20 for regPSW, etc.
* *
* @this {DebuggerPDP11} * @this {DebuggerPDP11}
* @param {number} iReg * @param {number} iReg
@ -1175,11 +1190,46 @@ if (DEBUGGER) {
else if (iReg < 20) { else if (iReg < 20) {
value = this.cpu.regsAltStack[iReg-16]; value = this.cpu.regsAltStack[iReg-16];
} }
else if (iReg == DebuggerPDP11.REG_PSW) { else {
value = this.cpu.getPSW(); var cpu = this.cpu;
} var panel = this.panel;
else if (iReg == DebuggerPDP11.REG_SR && this.panel && this.panel.hasSwitches()) { switch(iReg) {
value = this.panel.getSR(); case DebuggerPDP11.REG_PSW:
value = this.cpu.getPSW();
break;
case DebuggerPDP11.REG_PIR:
value = cpu.regPIR;
break;
case DebuggerPDP11.REG_ERR:
value = cpu.regErr;
break;
case DebuggerPDP11.REG_SL:
value = cpu.regSL;
break;
case DebuggerPDP11.REG_MMR0:
value = cpu.getMMR0();
break;
case DebuggerPDP11.REG_MMR1:
value = cpu.getMMR1();
break;
case DebuggerPDP11.REG_MMR2:
value = cpu.getMMR2();
break;
case DebuggerPDP11.REG_MMR3:
value = cpu.getMMR3();
break;
case DebuggerPDP11.REG_AR:
if (panel) value = panel.getAR();
break;
case DebuggerPDP11.REG_DR:
if (panel) value = panel.getDR();
break;
case DebuggerPDP11.REG_SR:
if (panel && panel.hasSwitches()) {
value = panel.getSR();
}
break;
}
} }
} }
return value; return value;
@ -1220,9 +1270,10 @@ if (DEBUGGER) {
if (this.sMessagePrev && sMessage == this.sMessagePrev) return; if (this.sMessagePrev && sMessage == this.sMessagePrev) return;
this.sMessagePrev = sMessage; this.sMessagePrev = sMessage;
if ((this.bitsMessage & MessagesPDP11.HALT) && this.cpu && this.cpu.isRunning() || this.isBusy(true)) { var fRunning = false;
if ((this.bitsMessage & MessagesPDP11.HALT) && this.cpu && (fRunning = this.cpu.isRunning()) || this.isBusy(true)) {
this.stopCPU(); this.stopCPU();
sMessage += " (cpu halted)"; if (fRunning) sMessage += " (cpu halted)";
} }
this.println(sMessage); // + " (" + this.cpu.getCycles() + " cycles)" this.println(sMessage); // + " (" + this.cpu.getCycles() + " cycles)"
@ -1317,7 +1368,7 @@ if (DEBUGGER) {
* *
* @this {DebuggerPDP11} * @this {DebuggerPDP11}
* @param {number} nCycles (0 for one instruction without checking breakpoints) * @param {number} nCycles (0 for one instruction without checking breakpoints)
* @param {boolean} [fRegs] is true to display registers after step (default is false) * @param {boolean|null} [fRegs] is true to display registers after step (default is false; use null for previous setting)
* @param {boolean} [fUpdateDisplays] is false to disable Computer display updates (default is true) * @param {boolean} [fUpdateDisplays] is false to disable Computer display updates (default is true)
* @return {boolean} * @return {boolean}
*/ */
@ -1325,6 +1376,10 @@ if (DEBUGGER) {
{ {
if (!this.checkCPU()) return false; if (!this.checkCPU()) return false;
if (fRegs === null) {
fRegs = (!this.sTraceCmdPrev || this.sTraceCmdPrev == "tr");
}
this.nCycles = 0; this.nCycles = 0;
if (!nCycles) { if (!nCycles) {
@ -1367,6 +1422,7 @@ if (DEBUGGER) {
* is calling us in a loop, in which case it will perform its own updateDisplays() when it's done. * is calling us in a loop, in which case it will perform its own updateDisplays() when it's done.
*/ */
if (fUpdateDisplays !== false) { if (fUpdateDisplays !== false) {
if (this.panel && this.panel.stop) this.panel.stop();
this.cmp.updateDisplays(-1); this.cmp.updateDisplays(-1);
} }
@ -1583,9 +1639,9 @@ if (DEBUGGER) {
if (this.checksEnabled()) { if (this.checksEnabled()) {
sStopped += this.cInstructions + " instructions, "; sStopped += this.cInstructions + " instructions, ";
/* /*
* $ops displays progress by calculating cOpcodes - cOpcodesStart, so before * $ops displays progress by calculating cInstructions - cInstructionsStart, so before
* zeroing cOpcodes, we should subtract cOpcodes from cOpcodesStart (since we're * zeroing cInstructions, we should subtract cInstructions from cInstructionsStart (since
* effectively subtracting cOpcodes from cOpcodes as well). * we're effectively subtracting cInstructions from cInstructions as well).
*/ */
this.cInstructionsStart -= this.cInstructions; this.cInstructionsStart -= this.cInstructions;
this.cInstructions = 0; this.cInstructions = 0;
@ -2147,16 +2203,16 @@ if (DEBUGGER) {
sOperands += (sOperand || "???"); sOperands += (sOperand || "???");
} }
var sOpcodes = ""; var sOpCodes = "";
var sLine = this.toStrAddr(dbgAddrOp) + ":"; var sLine = this.toStrAddr(dbgAddrOp) + ":";
if (dbgAddrOp.addr !== PDP11.ADDR_INVALID && dbgAddr.addr !== PDP11.ADDR_INVALID) { if (dbgAddrOp.addr !== PDP11.ADDR_INVALID && dbgAddr.addr !== PDP11.ADDR_INVALID) {
do { do {
sOpcodes += ' ' + this.toStrBase(this.getWord(dbgAddrOp, 2)); sOpCodes += ' ' + this.toStrBase(this.getWord(dbgAddrOp, 2));
if (dbgAddrOp.addr == null) break; if (dbgAddrOp.addr == null) break;
} while (dbgAddrOp.addr != dbgAddr.addr); } while (dbgAddrOp.addr != dbgAddr.addr);
} }
sLine += str.pad(sOpcodes, 24); sLine += str.pad(sOpCodes, 24);
sLine += str.pad(sOpName, 5); sLine += str.pad(sOpName, 5);
if (sOperands) sLine += ' ' + sOperands; if (sOperands) sLine += ' ' + sOperands;
@ -2389,28 +2445,86 @@ if (DEBUGGER) {
else if (iReg >= 16 && iReg < 20) { else if (iReg >= 16 && iReg < 20) {
sReg = "S" + (iReg - 16) + '=' + this.toStrBase(cpu.regsAltStack[iReg - 16]); sReg = "S" + (iReg - 16) + '=' + this.toStrBase(cpu.regsAltStack[iReg - 16]);
} }
else if (iReg == DebuggerPDP11.REG_PSW) { else {
sReg = "PS=" + this.toStrBase(cpu.getPSW()); switch(iReg) {
} case DebuggerPDP11.REG_PSW:
else if (iReg == DebuggerPDP11.REG_SR && this.panel && this.panel.hasSwitches()) { sReg = "PS=" + this.toStrBase(cpu.getPSW());
sReg = "SR=" + this.toStrBase(this.panel.getSR(), 3); break;
case DebuggerPDP11.REG_PIR:
sReg = "IR=" + this.toStrBase(cpu.regPIR);
break;
case DebuggerPDP11.REG_ERR:
sReg = "ER=" + this.toStrBase(cpu.regErr);
break;
case DebuggerPDP11.REG_SL:
sReg = "SL=" + this.toStrBase(cpu.regSL);
break;
case DebuggerPDP11.REG_MMR0:
sReg = "MMR0=" + this.toStrBase(cpu.getMMR0());
break;
case DebuggerPDP11.REG_MMR1:
sReg = "MMR1=" + this.toStrBase(cpu.getMMR1());
break;
case DebuggerPDP11.REG_MMR2:
sReg = "MMR2=" + this.toStrBase(cpu.getMMR2());
break;
case DebuggerPDP11.REG_MMR3:
sReg = "MMR3=" + this.toStrBase(cpu.getMMR3());
break;
case DebuggerPDP11.REG_AR:
if (this.panel) {
sReg = "AR=" + this.toStrBase(this.panel.getAR(), 3);
}
break;
case DebuggerPDP11.REG_DR:
if (this.panel) {
sReg = "DR=" + this.toStrBase(this.panel.getDR());
}
break;
case DebuggerPDP11.REG_SR:
if (this.panel && this.panel.hasSwitches()) {
sReg = "SR=" + this.toStrBase(this.panel.getSR(), 3);
}
break;
}
} }
if (sReg) sReg += ' '; if (sReg) sReg += ' ';
return sReg; return sReg;
}; };
/** /**
* getRegDump() * getMiscDump()
* *
* Sample register dump: * Sample register dump:
* *
* R0=xxxx R1=xxxx R2=xxxx R3=xxxx R4=xxxx R5=xxxx * MMR0=xxxxxx MMR1=xxxxxx MMR2=xxxxxx MMR3=xxxxxx ER=xxxxxx
* SP=xxxx PC=xxxx PS=xxxx T0 N0 Z0 V0 C0
* *
* @this {DebuggerPDP11} * @this {DebuggerPDP11}
* @return {string} * @return {string}
*/ */
DebuggerPDP11.prototype.getRegDump = function() DebuggerPDP11.prototype.getMiscDump = function()
{
var sDump = "";
sDump += this.getRegOutput(DebuggerPDP11.REG_MMR0) + this.getRegOutput(DebuggerPDP11.REG_MMR1);
sDump += this.getRegOutput(DebuggerPDP11.REG_MMR2) + this.getRegOutput(DebuggerPDP11.REG_MMR3) + this.getRegOutput(DebuggerPDP11.REG_ERR);
sDump += '\n';
sDump += this.getRegOutput(DebuggerPDP11.REG_SR) + this.getRegOutput(DebuggerPDP11.REG_AR) + this.getRegOutput(DebuggerPDP11.REG_DR);
return sDump;
};
/**
* getRegDump(fMisc)
*
* Sample register dump:
*
* R0=xxxxxx R1=xxxxxx R2=xxxxxx R3=xxxxxx R4=xxxxxx R5=xxxxxx
* SP=xxxxxx PC=xxxxxx PS=xxxxxx IR=xxxxxx SL=xxxxxx T0 N0 Z0 V0 C0
*
* @this {DebuggerPDP11}
* @param {boolean} [fMisc] (true to include misc registers)
* @return {string}
*/
DebuggerPDP11.prototype.getRegDump = function(fMisc)
{ {
var i; var i;
var sDump = ""; var sDump = "";
@ -2419,8 +2533,9 @@ if (DEBUGGER) {
} }
sDump += '\n'; sDump += '\n';
sDump += this.getRegOutput(PDP11.REG.SP) + this.getRegOutput(PDP11.REG.PC); sDump += this.getRegOutput(PDP11.REG.SP) + this.getRegOutput(PDP11.REG.PC);
sDump += this.getRegOutput(DebuggerPDP11.REG_PSW) + this.getRegOutput(DebuggerPDP11.REG_SR); sDump += this.getRegOutput(DebuggerPDP11.REG_PSW) + this.getRegOutput(DebuggerPDP11.REG_PIR) + this.getRegOutput(DebuggerPDP11.REG_SL);
sDump += this.getFlagOutput('T') + this.getFlagOutput('N') + this.getFlagOutput('Z') + this.getFlagOutput('V') + this.getFlagOutput('C'); sDump += this.getFlagOutput('T') + this.getFlagOutput('N') + this.getFlagOutput('Z') + this.getFlagOutput('V') + this.getFlagOutput('C');
if (fMisc) sDump += '\n' + this.getMiscDump();
return sDump; return sDump;
}; };
@ -2773,12 +2888,12 @@ if (DEBUGGER) {
{ {
if (sAddr == '?') { if (sAddr == '?') {
this.println("breakpoint commands:"); this.println("breakpoint commands:");
this.println("\tbp [a]\tset exec breakpoint at addr [a]"); this.println("\tbp [#]\tset exec breakpoint at addr #");
this.println("\tbr [a]\tset read breakpoint at addr [a]"); this.println("\tbr [#]\tset read breakpoint at addr #");
this.println("\tbw [a]\tset write breakpoint at addr [a]"); this.println("\tbw [#]\tset write breakpoint at addr #");
this.println("\tbc [a]\tclear breakpoint at addr [a]"); this.println("\tbc [#]\tclear breakpoint at addr #");
this.println("\tbl\tlist all breakpoints"); this.println("\tbl\tlist all breakpoints");
this.println("\tbn [n]\tbreak after [n] instruction(s)"); this.println("\tbn [#]\tbreak after # instruction(s)");
return; return;
} }
@ -3386,77 +3501,115 @@ if (DEBUGGER) {
if (asArgs && asArgs[1] == '?') { if (asArgs && asArgs[1] == '?') {
this.println("register commands:"); this.println("register commands:");
this.println("\tr\tdump registers"); this.println("\tr\tdump registers");
this.println("\trm\tdump misc registers");
this.println("\trx [#]\tset flag or register x to [#]"); this.println("\trx [#]\tset flag or register x to [#]");
return; return;
} }
var fMisc = false;
var cpu = this.cpu; var cpu = this.cpu;
if (fInstruction == null) fInstruction = true; if (fInstruction == null) fInstruction = true;
if (asArgs != null && asArgs.length > 1) { if (asArgs != null && asArgs.length > 1) {
var sReg = asArgs[1]; var sReg = asArgs[1];
var sValue = null;
var i = sReg.indexOf('='); if (sReg == 'm') {
if (i > 0) { fMisc = true;
sValue = sReg.substr(i + 1);
sReg = sReg.substr(0, i);
}
else if (asArgs.length > 2) {
sValue = asArgs[2];
} }
else { else {
this.println("missing value for " + asArgs[1]); var sValue = null;
return; var i = sReg.indexOf('=');
} if (i > 0) {
sValue = sReg.substr(i + 1);
var w = this.parseExpression(sValue); sReg = sReg.substr(0, i);
if (w === undefined) return;
var sRegMatch = sReg.toUpperCase();
switch (sRegMatch) {
case "SP":
case "R6":
cpu.setSP(w);
break;
case "PC":
case "R7":
cpu.setPC(w);
this.dbgAddrNextCode = this.newAddr(cpu.getPC());
break;
case "N":
if (w) cpu.setNF(); else cpu.clearNF();
break;
case "Z":
if (w) cpu.setZF(); else cpu.clearZF();
break;
case "V":
if (w) cpu.setVF(); else cpu.clearVF();
break;
case "C":
if (w) cpu.setCF(); else cpu.clearCF();
break;
case "SR":
if (this.panel && this.panel.hasSwitches()) {
this.panel.setSR(w);
break;
} }
/* falls through */ else if (asArgs.length > 2) {
default: sValue = asArgs[2];
if (sRegMatch.charAt(0) == 'R') { }
var iReg = +sRegMatch.charAt(1); else {
if (iReg >= 0 && iReg < 6) { this.println("missing value for " + asArgs[1]);
cpu.regsGen[iReg] = w & 0xffff; return;
}
var w = this.parseExpression(sValue);
if (w === undefined) return;
var sRegMatch = sReg.toUpperCase();
switch (sRegMatch) {
case "SP":
case "R6":
cpu.setSP(w);
break;
case "PC":
case "R7":
cpu.setPC(w);
this.dbgAddrNextCode = this.newAddr(cpu.getPC());
break;
case "N":
if (w) cpu.setNF(); else cpu.clearNF();
break;
case "Z":
if (w) cpu.setZF(); else cpu.clearZF();
break;
case "V":
if (w) cpu.setVF(); else cpu.clearVF();
break;
case "C":
if (w) cpu.setCF(); else cpu.clearCF();
break;
case "PS":
cpu.setPSW(w);
break;
case "IR":
cpu.setPIR(w);
break;
case "ER":
cpu.regErr = w;
fMisc = true;
break;
case "SL":
cpu.setSL(w);
break;
case "MMR0":
cpu.setMMR0(w);
fMisc = true;
break;
case "MMR3":
cpu.setMMR3(w);
fMisc = true;
break;
case "AR":
if (this.panel) this.panel.setAR(w);
fMisc = true;
break;
case "DR":
if (this.panel) this.panel.setDR(w);
fMisc = true;
break;
case "SR":
if (this.panel && this.panel.hasSwitches()) {
this.panel.setSR(w);
fMisc = true;
break; break;
} }
/* falls through */
default:
if (sRegMatch.charAt(0) == 'R') {
var iReg = +sRegMatch.charAt(1);
if (iReg >= 0 && iReg < 6) {
cpu.regsGen[iReg] = w & 0xffff;
break;
}
}
this.println("unknown register: " + sReg);
return;
} }
this.println("unknown register: " + sReg); this.cmp.updateDisplays();
return; this.println("updated registers:");
} }
this.cmp.updateDisplays();
this.println("updated registers:");
} }
this.println(this.getRegDump()); this.println(this.getRegDump(fMisc));
if (fInstruction) { if (fInstruction) {
this.dbgAddrNextCode = this.newAddr(cpu.getPC()); this.dbgAddrNextCode = this.newAddr(cpu.getPC());
@ -3512,36 +3665,47 @@ if (DEBUGGER) {
}; };
/** /**
* doStep(sCmd) * doStep(sCmd, sOption)
* *
* @this {DebuggerPDP11} * @this {DebuggerPDP11}
* @param {string} [sCmd] "p" or "pr" * @param {string} [sCmd] "p" or "pr"
* @param {string} [sOption]
*/ */
DebuggerPDP11.prototype.doStep = function(sCmd) DebuggerPDP11.prototype.doStep = function(sCmd, sOption)
{ {
if (sOption == '?') {
this.println("step commands:");
this.println("\tp\tstep over instruction");
this.println("\tpr\tstep over instruction with register update");
return;
}
var fCallStep = true; var fCallStep = true;
var fRegs = (sCmd == "pr"? 1 : 0); var nRegs = (sCmd == "pr"? 1 : 0);
/* /*
* Set up the value for this.nStep (ie, 1 or 2) depending on whether the user wants * Set up the value for this.nStep (ie, 1 or 2) depending on whether the user wants
* a subsequent register dump ("pr") or not ("p"). * a subsequent register dump ("pr") or not ("p").
*/ */
var nStep = 1 + fRegs; var nStep = 1 + nRegs;
if (!this.nStep) { if (!this.nStep) {
var dbgAddr = this.newAddr(this.cpu.getPC()); var dbgAddr = this.newAddr(this.cpu.getPC());
var bOpcode = this.getByte(dbgAddr); var opCode = this.getWord(dbgAddr);
/* if (opCode == PDP11.OPCODE.BPT || opCode == PDP11.OPCODE.IOT ||
switch (bOpcode) { (opCode & PDP11.OPCODE.EMT_MASK) == PDP11.OPCODE.EMT_OP ||
case PDP11.OPCODE.CALL: (opCode & PDP11.OPCODE.TRAP_MASK) == PDP11.OPCODE.TRAP_OP) {
if (fCallStep) {
this.nStep = nStep;
this.incAddr(dbgAddr, 2);
}
} else if ((opCode & PDP11.OPCODE.JSR_MASK) == PDP11.OPCODE.JSR_OP) {
var s = this.getInstruction(dbgAddr);
this.assert(s.indexOf("JSR") >= 0);
if (fCallStep) { if (fCallStep) {
this.nStep = nStep; this.nStep = nStep;
this.incAddr(dbgAddr, 3);
} }
break;
default:
break;
} }
*/
if (this.nStep) { if (this.nStep) {
this.setTempBreakpoint(dbgAddr); this.setTempBreakpoint(dbgAddr);
@ -3555,7 +3719,7 @@ if (DEBUGGER) {
* stopped for reasons unrelated to the temporary breakpoint, but that's OK. * stopped for reasons unrelated to the temporary breakpoint, but that's OK.
*/ */
} else { } else {
this.doTrace(fRegs? "tr" : "t"); this.doTrace(nRegs? "tr" : "t");
} }
} else { } else {
this.println("step in progress"); this.println("step in progress");
@ -3681,6 +3845,15 @@ if (DEBUGGER) {
*/ */
DebuggerPDP11.prototype.doTrace = function(sCmd, sCount) DebuggerPDP11.prototype.doTrace = function(sCmd, sCount)
{ {
if (sCount == '?') {
this.println("trace commands:");
this.println("\tt [#]\ttrace # instructions");
this.println("\ttr [#]\ttrace # instructions with register updates");
this.println("\ttc [#]\ttrace # cycles");
this.println("note: bn [#] breaks after # instructions without updates");
return;
}
var dbg = this; var dbg = this;
var fRegs = (sCmd != "t"); var fRegs = (sCmd != "t");
var nCount = this.parseValue(sCount, null, true) || 1; var nCount = this.parseValue(sCount, null, true) || 1;
@ -3689,6 +3862,7 @@ if (DEBUGGER) {
nCycles = nCount; nCycles = nCount;
nCount = 1; nCount = 1;
} }
this.sTraceCmdPrev = sCmd;
web.onCountRepeat( web.onCountRepeat(
nCount, nCount,
function onCountStep() { function onCountStep() {
@ -3702,7 +3876,7 @@ if (DEBUGGER) {
* a final updateDisplays(). * a final updateDisplays().
*/ */
if (dbg.panel && dbg.panel.stop) dbg.panel.stop(); if (dbg.panel && dbg.panel.stop) dbg.panel.stop();
dbg.cmp.updateDisplays(); dbg.cmp.updateDisplays(-1);
dbg.setBusy(false); dbg.setBusy(false);
} }
); );
@ -3908,7 +4082,7 @@ if (DEBUGGER) {
this.doPrint(sCmd.substr(5)); this.doPrint(sCmd.substr(5));
break; break;
} }
this.doStep(asArgs[0]); this.doStep(asArgs[0], asArgs[1]);
break; break;
case 'r': case 'r':
if (sCmd == "reset") { if (sCmd == "reset") {

127
modules/pdp11/lib/defines.js
View file

@ -234,6 +234,14 @@ var PDP11 = {
OPCODE: { OPCODE: {
HALT: 0x0000, HALT: 0x0000,
WAIT: 0x0001, WAIT: 0x0001,
BPT: 0x0003,
IOT: 0x0004,
JSR_OP: 0x0800,
JSR_MASK: 0xFE00,
EMT_OP: 0x8800,
EMT_MASK: 0xFF00,
TRAP_OP: 0x8900,
TRAP_MASK: 0xFF00,
INVALID: 0xFFFF // far from the only invalid opcode, just a KNOWN invalid opcode INVALID: 0xFFFF // far from the only invalid opcode, just a KNOWN invalid opcode
}, },
/* /*
@ -311,44 +319,65 @@ var PDP11 = {
BYTE: 0xff, // write byte normally BYTE: 0xff, // write byte normally
SBYTE: 0xffff // sign-extend byte to word SBYTE: 0xffff // sign-extend byte to word
}, },
CPUERR: { CPUERR: { // 177766
RED: 0x0004, // red zone stack limit RED: 0x0004, // 000004 red zone stack limit
YELLOW: 0x0008, // yellow zone stack limit YELLOW: 0x0008, // 000010 yellow zone stack limit
TIMEOUT: 0x0010, // UNIBUS timeout error TIMEOUT: 0x0010, // 000020 UNIBUS timeout error
NOMEMORY: 0x0020, // non-existent memory error NOMEMORY: 0x0020, // 000040 non-existent memory error
ODDADDR: 0x0040, // odd word address error (as in non-even, not strange) ODDADDR: 0x0040, // 000100 odd word address error (as in non-even, not strange)
BADHALT: 0x0080 // HALT attempted in USER or SUPER modes BADHALT: 0x0080 // 000200 HALT attempted in USER or SUPER modes
}, },
MMR0: { MMR0: { // 177572
ENABLED: 0x0001, // address relocation enabled ENABLED: 0x0001, // 000001 address relocation enabled
PAGE_NUM: 0x000E, // page number of last fault PAGE_NUM: 0x000E, // 000016 page number of last fault
PAGE_D: 0x0010, // last fault occurred in D space PAGE_D: 0x0010, // 000020 last fault occurred in D space (11/44 and 11/70 only)
PAGE_MODE: 0x0060, // processor mode as of last fault PAGE: 0x001E, // 000176 (all of the PAGE bits)
COMPLETED: 0x0080, // last instruction completed MODE: 0x0060, // 000140 processor mode as of last fault
DSTMODE: 0x0100, // only destination mode references will be relocated (aka MAINT bit) COMPLETED: 0x0080, // 000200 last instruction completed (R/O) (11/70 only)
MMU_TRAPS: 0x0200, // enable MMU traps DSTMODE: 0x0100, // 000400 only destination mode references will be relocated (aka MAINT bit)
UNUSED: 0x0C00, MMU_TRAPS: 0x0200, // 001000 enable MMU traps (11/70 only)
TRAP_MMU: 0x1000, // trap: MMU UNUSED: 0x0C00, // 006000
ABORT_RO: 0x2000, // abort: read-only TRAP_MMU: 0x1000, // 010000 trap: MMU (11/70 only)
ABORT_PL: 0x4000, // abort: page length ABORT_RO: 0x2000, // 020000 abort: read-only
ABORT_NR: 0x8000, // abort: non-resident ABORT_PL: 0x4000, // 040000 abort: page length
ABORT: 0xE000 ABORT_NR: 0x8000, // 100000 abort: non-resident
ABORT: 0xE000, // 160000 (all of the ABORT bits)
UPDATE: 0xF0FE // Includes all of: ABORT, TRAP, COMPLETED, MODE, and PAGE bits
}, },
MMR1: { // general purpose auto-inc/auto-dec register MMR1: { // 177574: general purpose auto-inc/auto-dec register (11/44 and 11/70 only)
REG1_NUM: 0x0007, REG1_NUM: 0x0007, //
REG1_DELTA: 0x00F8, REG1_DELTA: 0x00F8, //
REG2_NUM: 0x0700, REG2_NUM: 0x0700, //
REG2_DELTA: 0xF800 REG2_DELTA: 0xF800 //
}, },
MMR2: { // virtual program counter register MMR2: { // 177576: virtual program counter register
}, },
MMR3: { // mapping register MMR3: { // 172516: mapping register (11/44 and 11/70 only)
USER_D: 0x0001, USER_D: 0x0001,
SUPER_D: 0x0002, SUPER_D: 0x0002,
KERNEL_D: 0x0004, KERNEL_D: 0x0004,
MMU_22BIT: 0x0010, MMU_22BIT: 0x0010,
UNIBUS_MAP: 0x0020 // UNIBUS map relocation enabled UNIBUS_MAP: 0x0020 // UNIBUS map relocation enabled
}, },
PDR: {
ACF: {
NR: 0x0, // non-resident, abort all accesses
RO1: 0x1, // read-only, abort on write attempt, memory management trap on read (11/70 only)
RO: 0x2, // read-only, abort on write attempt
U1: 0x3, // unused, abort all accesses--reserved for future use
RW1: 0x4, // read/write, memory management trap upon completion of a read or write
RW2: 0x5, // read/write, memory management trap upon completion of a write (11/70 only)
RW: 0x6, // read/write, no system trap/abort action
U2: 0x7, // unused, abort all accesses--reserved for future use
MASK: 0x7
},
ED: 0x0008, // expansion direction (if set, the page expands downward from block number 127)
UNUSED: 0x0030,
MODIFIED: 0x0040, // page has been written (bit cleared when either PDR or PAR is written)
ACCESSED: 0x0080, // page has been accessed (bit cleared when either PDR or PAR is written) (11/70 only)
PLF: 0x7F00, // page length field
BC: 0x8000 // bypass cache (11/44 only)
},
/* /*
* Assorted special (UNIBUS) addresses * Assorted special (UNIBUS) addresses
* *
@ -364,11 +393,11 @@ var PDP11 = {
* is enabled, the top 5 bits of an address select one of the 31 mapping registers, and the bottom 13 bits * is enabled, the top 5 bits of an address select one of the 31 mapping registers, and the bottom 13 bits
* are then added to the contents of the selected mapping register. * are then added to the contents of the selected mapping register.
* *
* ES6 ALERT: By using octal constants, this is the first place I'm dipping my toe into ECMAScript 6 waters. * ES6 ALERT: By using octal constants, I'm finally dipping my toe into ES6 (aka ECMAScript 2015) waters.
* If you're loading this raw source code into your browser, then by now (2016) you're almost certainly using * You'll even see a few binary constants below, too. If you're loading this raw source code into your browser,
* an ES6-aware browser. Everyone else should be using code compiled by Google's Closure Compiler, which * then by now (2016) you're almost certainly using an ES6-aware browser. Production sites should be using code
* we configure to produce code that's backward-compatible with ES5 (for example, octal constants are * compiled by Google's Closure Compiler, which we configure to produce code that's backward-compatible with ES5
* converted to decimal values). * (for example, all binary, octal, and hex constants are converted to decimal values).
* *
* For more details: https://github.com/google/closure-compiler/wiki/ECMAScript6 * For more details: https://github.com/google/closure-compiler/wiki/ECMAScript6
*/ */
@ -498,22 +527,22 @@ var PDP11 = {
UDPAR6: 0o177674, // User D Page Address Register 6 UDPAR6: 0o177674, // User D Page Address Register 6
UDPAR7: 0o177676, // User D Page Address Register 7 UDPAR7: 0o177676, // User D Page Address Register 7
R0SET0: 0o177700, R0SET0: 0o177700, //
R1SET0: 0o177701, R1SET0: 0o177701, //
R2SET0: 0o177702, R2SET0: 0o177702, //
R3SET0: 0o177703, R3SET0: 0o177703, //
R4SET0: 0o177704, R4SET0: 0o177704, //
R5SET0: 0o177705, R5SET0: 0o177705, //
R6KERNEL: 0o177706, R6KERNEL: 0o177706, //
R7KERNEL: 0o177707, R7KERNEL: 0o177707, //
R0SET1: 0o177710, R0SET1: 0o177710, //
R1SET1: 0o177711, R1SET1: 0o177711, //
R2SET1: 0o177712, R2SET1: 0o177712, //
R3SET1: 0o177713, R3SET1: 0o177713, //
R4SET1: 0o177714, R4SET1: 0o177714, //
R5SET1: 0o177715, R5SET1: 0o177715, //
R6SUPER: 0o177716, R6SUPER: 0o177716, //
R6USER: 0o177717, R6USER: 0o177717, //
/* /*
* This next group of registers is largely ignored; all accesses are routed to regsControl[], * This next group of registers is largely ignored; all accesses are routed to regsControl[],

113
modules/pdp11/lib/device.js
View file

@ -130,9 +130,62 @@ DevicePDP11.prototype.initBus = function(cmp, bus, cpu, dbg)
bus.addIOTable(this, DevicePDP11.UNIBUS_IOTABLE); bus.addIOTable(this, DevicePDP11.UNIBUS_IOTABLE);
bus.addResetHandler(this.reset.bind(this)); bus.addResetHandler(this.reset.bind(this));
if (DEBUGGER && dbg) {
dbg.messageDump(MessagesPDP11.MMU, function onDumpMMU(asArgs) {
device.dumpMMU(asArgs);
});
}
this.setReady(); this.setReady();
}; };
/**
* dumpMMU(asArgs)
*
* @this {DevicePDP11}
* @param {Array.<string>} asArgs
*/
DevicePDP11.prototype.dumpMMU = function(asArgs)
{
if (DEBUGGER) {
var cpu = this.cpu;
this.dumpRegs("KIPDR", cpu.mmuPDR[0], 0, asArgs[0]);
this.dumpRegs("KDPDR", cpu.mmuPDR[0], 8, asArgs[0]);
this.dumpRegs("KIPAR", cpu.mmuPAR[0], 0, asArgs[0]);
this.dumpRegs("KDPAR", cpu.mmuPAR[0], 8, asArgs[0], true);
this.dumpRegs("SIPDR", cpu.mmuPDR[1], 0, asArgs[0]);
this.dumpRegs("SDPDR", cpu.mmuPDR[1], 8, asArgs[0]);
this.dumpRegs("SIPAR", cpu.mmuPAR[1], 0, asArgs[0]);
this.dumpRegs("SDPAR", cpu.mmuPAR[1], 8, asArgs[0], true);
this.dumpRegs("UIPDR", cpu.mmuPDR[3], 0, asArgs[0]);
this.dumpRegs("UDPDR", cpu.mmuPDR[3], 8, asArgs[0]);
this.dumpRegs("UIPAR", cpu.mmuPAR[3], 0, asArgs[0]);
this.dumpRegs("UDPAR", cpu.mmuPAR[3], 8, asArgs[0], true);
}
};
/**
* dumpRegs(sName, aRegs, offset, sFilter, fBreak)
*
* @this {DevicePDP11}
* @param {string} sName
* @param {Array.<number>} aRegs
* @param {number} offset
* @param {string} sFilter
* @param {boolean} [fBreak]
*/
DevicePDP11.prototype.dumpRegs = function(sName, aRegs, offset, sFilter, fBreak)
{
if (DEBUGGER) {
var dbg = this.dbg;
if (sFilter && sName.indexOf(sFilter.toUpperCase()) < 0) return;
var sDump = sName + ":";
for (var i = 0; i < 8; i++) {
sDump += ' ' + dbg.toStrBase(aRegs[offset + i]);
}
dbg.println(sDump + (fBreak? '\n' : ''));
}
};
/** /**
* reset() * reset()
* *
@ -219,7 +272,7 @@ DevicePDP11.prototype.readMMR0 = function(addr)
*/ */
DevicePDP11.prototype.writeMMR0 = function(data, addr) DevicePDP11.prototype.writeMMR0 = function(data, addr)
{ {
this.cpu.setMMR0(data); this.cpu.setMMR0((data & ~PDP11.MMR0.COMPLETED) | (this.cpu.regMMR0 & PDP11.MMR0.COMPLETED));
}; };
/** /**
@ -435,7 +488,10 @@ DevicePDP11.prototype.readKIPDR = function(addr)
DevicePDP11.prototype.writeKIPDR = function(data, addr) DevicePDP11.prototype.writeKIPDR = function(data, addr)
{ {
var reg = (addr >> 1) & 7; var reg = (addr >> 1) & 7;
this.cpu.mmuPDR[0][reg] = data & 0xff0f; this.cpu.mmuPDR[0][reg] = data &= 0xff0f;
if (this.messageEnabled(MessagesPDP11.MMU)) {
this.printMessage("writeKIPDR[" + reg + "]: " + str.toOct(data), true);
}
}; };
/** /**
@ -873,7 +929,8 @@ DevicePDP11.prototype.readSIZE = function(addr)
/* /*
* TODO: getMemorySize() returns an aggregate total, so if there are multiple discontiguous * TODO: getMemorySize() returns an aggregate total, so if there are multiple discontiguous
* chunks of RAM, this could return the wrong result; another interface, getHighestAddress(), * chunks of RAM, this could return the wrong result; another interface, getHighestAddress(),
* might be required. * might be required. Then again, perhaps multiple discontiguous chunks of RAM are not permitted
* in PDP-11 machines.
*/ */
return addr == PDP11.UNIBUS.LSIZE? ((this.bus.getMemorySize(MemoryPDP11.TYPE.RAM) >> 6) - 1) : 0; return addr == PDP11.UNIBUS.LSIZE? ((this.bus.getMemorySize(MemoryPDP11.TYPE.RAM) >> 6) - 1) : 0;
}; };
@ -961,20 +1018,23 @@ DevicePDP11.prototype.readMB = function(addr)
*/ */
DevicePDP11.prototype.writeMB = function(data, addr) DevicePDP11.prototype.writeMB = function(data, addr)
{ {
if (!(addr & 0x1)) data &= 0xff; // Required for KB11-CM without MFPT instruction if (!(addr & 0x1)) {
data &= 0xff; // required for KB11-CM without MFPT instruction
}
this.cpu.regMB = data; this.cpu.regMB = data;
}; };
/** /**
* readPIR(addr) * readPIR(addr, fPreWrite)
* *
* @this {DevicePDP11} * @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.PIR or 177772) * @param {number} addr (eg, PDP11.UNIBUS.PIR or 177772)
* @param {boolean} [fPreWrite]
* @return {number} * @return {number}
*/ */
DevicePDP11.prototype.readPIR = function(addr) DevicePDP11.prototype.readPIR = function(addr, fPreWrite)
{ {
if (!addr) return 0; // the caller is preparing to write the low or high byte; these are the bits to return for the other byte if (fPreWrite) return 0;
return this.cpu.getPIR(); return this.cpu.getPIR();
}; };
@ -991,15 +1051,16 @@ DevicePDP11.prototype.writePIR = function(data, addr)
}; };
/** /**
* readSL(addr) * readSL(addr, fPreWrite)
* *
* @this {DevicePDP11} * @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.SL or 177774) * @param {number} addr (eg, PDP11.UNIBUS.SL or 177774)
* @param {boolean} [fPreWrite]
* @return {number} * @return {number}
*/ */
DevicePDP11.prototype.readSL = function(addr) DevicePDP11.prototype.readSL = function(addr, fPreWrite)
{ {
if (!addr) return 0; // the caller is preparing to write the low or high byte; these are the bits to return for the other byte if (fPreWrite) return 0;
return this.cpu.getSL(); return this.cpu.getSL();
}; };
@ -1069,23 +1130,23 @@ DevicePDP11.prototype.writeIgnored = function(data, addr)
*/ */
DevicePDP11.UNIBUS_IOTABLE = { DevicePDP11.UNIBUS_IOTABLE = {
[PDP11.UNIBUS.UNIMAP]: /* 170200 */ [null, null, DevicePDP11.prototype.readUNIMAP, DevicePDP11.prototype.writeUNIMAP, "UNIMAP", 64, PDP11.MODEL_1170], [PDP11.UNIBUS.UNIMAP]: /* 170200 */ [null, null, DevicePDP11.prototype.readUNIMAP, DevicePDP11.prototype.writeUNIMAP, "UNIMAP", 64, PDP11.MODEL_1170],
[PDP11.UNIBUS.SIPDR0]: /* 172200 */ [null, null, DevicePDP11.prototype.readSIPDR, DevicePDP11.prototype.writeSIPDR, "SIPDR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.SIPDR0]: /* 172200 */ [null, null, DevicePDP11.prototype.readSIPDR, DevicePDP11.prototype.writeSIPDR, "SIPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.SDPDR0]: /* 172220 */ [null, null, DevicePDP11.prototype.readSDPDR, DevicePDP11.prototype.writeSDPDR, "SDPDR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.SDPDR0]: /* 172220 */ [null, null, DevicePDP11.prototype.readSDPDR, DevicePDP11.prototype.writeSDPDR, "SDPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.SIPAR0]: /* 172240 */ [null, null, DevicePDP11.prototype.readSIPAR, DevicePDP11.prototype.writeSIPAR, "SIPAR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.SIPAR0]: /* 172240 */ [null, null, DevicePDP11.prototype.readSIPAR, DevicePDP11.prototype.writeSIPAR, "SIPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.SDPAR0]: /* 172260 */ [null, null, DevicePDP11.prototype.readSDPAR, DevicePDP11.prototype.writeSDPAR, "SDPAR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.SDPAR0]: /* 172260 */ [null, null, DevicePDP11.prototype.readSDPAR, DevicePDP11.prototype.writeSDPAR, "SDPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.KIPDR0]: /* 172300 */ [null, null, DevicePDP11.prototype.readKIPDR, DevicePDP11.prototype.writeKIPDR, "KIPDR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.KIPDR0]: /* 172300 */ [null, null, DevicePDP11.prototype.readKIPDR, DevicePDP11.prototype.writeKIPDR, "KIPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.KDPDR0]: /* 172320 */ [null, null, DevicePDP11.prototype.readKDPDR, DevicePDP11.prototype.writeKDPDR, "KDPDR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.KDPDR0]: /* 172320 */ [null, null, DevicePDP11.prototype.readKDPDR, DevicePDP11.prototype.writeKDPDR, "KDPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.KIPAR0]: /* 172340 */ [null, null, DevicePDP11.prototype.readKIPAR, DevicePDP11.prototype.writeKIPAR, "KIPAR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.KIPAR0]: /* 172340 */ [null, null, DevicePDP11.prototype.readKIPAR, DevicePDP11.prototype.writeKIPAR, "KIPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.KDPAR0]: /* 172360 */ [null, null, DevicePDP11.prototype.readKDPAR, DevicePDP11.prototype.writeKDPAR, "KDPAR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.KDPAR0]: /* 172360 */ [null, null, DevicePDP11.prototype.readKDPAR, DevicePDP11.prototype.writeKDPAR, "KDPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.MMR3]: /* 172516 */ [null, null, DevicePDP11.prototype.readMMR3, DevicePDP11.prototype.writeMMR3, "MMR3", 1, PDP11.MODEL_1145], [PDP11.UNIBUS.MMR3]: /* 172516 */ [null, null, DevicePDP11.prototype.readMMR3, DevicePDP11.prototype.writeMMR3, "MMR3", 1, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.LKS]: /* 177546 */ [null, null, DevicePDP11.prototype.readLKS, DevicePDP11.prototype.writeLKS, "LKS"], [PDP11.UNIBUS.LKS]: /* 177546 */ [null, null, DevicePDP11.prototype.readLKS, DevicePDP11.prototype.writeLKS, "LKS"],
[PDP11.UNIBUS.MMR0]: /* 177572 */ [null, null, DevicePDP11.prototype.readMMR0, DevicePDP11.prototype.writeMMR0, "MMR0", 1, PDP11.MODEL_1145], [PDP11.UNIBUS.MMR0]: /* 177572 */ [null, null, DevicePDP11.prototype.readMMR0, DevicePDP11.prototype.writeMMR0, "MMR0", 1, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.MMR1]: /* 177574 */ [null, null, DevicePDP11.prototype.readMMR1, DevicePDP11.prototype.writeIgnored, "MMR1", 1, PDP11.MODEL_1145], [PDP11.UNIBUS.MMR1]: /* 177574 */ [null, null, DevicePDP11.prototype.readMMR1, DevicePDP11.prototype.writeIgnored, "MMR1", 1, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.MMR2]: /* 177576 */ [null, null, DevicePDP11.prototype.readMMR2, DevicePDP11.prototype.writeIgnored, "MMR2", 1, PDP11.MODEL_1145], [PDP11.UNIBUS.MMR2]: /* 177576 */ [null, null, DevicePDP11.prototype.readMMR2, DevicePDP11.prototype.writeIgnored, "MMR2", 1, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.UIPDR0]: /* 177600 */ [null, null, DevicePDP11.prototype.readUIPDR, DevicePDP11.prototype.writeUIPDR, "UIPDR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.UIPDR0]: /* 177600 */ [null, null, DevicePDP11.prototype.readUIPDR, DevicePDP11.prototype.writeUIPDR, "UIPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.UDPDR0]: /* 177620 */ [null, null, DevicePDP11.prototype.readUDPDR, DevicePDP11.prototype.writeUDPDR, "UDPDR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.UDPDR0]: /* 177620 */ [null, null, DevicePDP11.prototype.readUDPDR, DevicePDP11.prototype.writeUDPDR, "UDPDR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.UIPAR0]: /* 177640 */ [null, null, DevicePDP11.prototype.readUIPAR, DevicePDP11.prototype.writeUIPAR, "UIPAR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.UIPAR0]: /* 177640 */ [null, null, DevicePDP11.prototype.readUIPAR, DevicePDP11.prototype.writeUIPAR, "UIPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.UDPAR0]: /* 177660 */ [null, null, DevicePDP11.prototype.readUDPAR, DevicePDP11.prototype.writeUDPAR, "UDPAR", 8, PDP11.MODEL_1145], [PDP11.UNIBUS.UDPAR0]: /* 177660 */ [null, null, DevicePDP11.prototype.readUDPAR, DevicePDP11.prototype.writeUDPAR, "UDPAR", 8, PDP11.MODEL_1145, MessagesPDP11.MMU],
[PDP11.UNIBUS.R0SET0]: /* 177700 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R0SET0"], [PDP11.UNIBUS.R0SET0]: /* 177700 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R0SET0"],
[PDP11.UNIBUS.R1SET0]: /* 177701 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R1SET0"], [PDP11.UNIBUS.R1SET0]: /* 177701 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R1SET0"],
[PDP11.UNIBUS.R2SET0]: /* 177702 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R2SET0"], [PDP11.UNIBUS.R2SET0]: /* 177702 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R2SET0"],

8
modules/pdp11/lib/messages.js
View file

@ -38,8 +38,10 @@ var MessagesPDP11 = {
FAULT: 0x00000020, FAULT: 0x00000020,
BUS: 0x00000040, BUS: 0x00000040,
MEMORY: 0x00000080, MEMORY: 0x00000080,
ROM: 0x00000100, MMU: 0x00000100,
DEVICE: 0x00000200, ROM: 0x00000200,
DEVICE: 0x00000400,
PANEL: 0x00000800,
KEYBOARD: 0x00010000, KEYBOARD: 0x00010000,
KEYS: 0x00020000, KEYS: 0x00020000,
PAPER: 0x00100000, PAPER: 0x00100000,
@ -73,8 +75,10 @@ MessagesPDP11.CATEGORIES = {
"fault": MessagesPDP11.FAULT, "fault": MessagesPDP11.FAULT,
"bus": MessagesPDP11.BUS, "bus": MessagesPDP11.BUS,
"memory": MessagesPDP11.MEMORY, "memory": MessagesPDP11.MEMORY,
"mmu": MessagesPDP11.MMU,
"rom": MessagesPDP11.ROM, "rom": MessagesPDP11.ROM,
"device": MessagesPDP11.DEVICE, "device": MessagesPDP11.DEVICE,
"panel": MessagesPDP11.PANEL,
"keyboard": MessagesPDP11.KEYBOARD, // "kbd" is also allowed as shorthand for "keyboard"; see doMessages() "keyboard": MessagesPDP11.KEYBOARD, // "kbd" is also allowed as shorthand for "keyboard"; see doMessages()
"key": MessagesPDP11.KEYS, // using "key" instead of "keys", since the latter is a method on JavasScript objects "key": MessagesPDP11.KEYS, // using "key" instead of "keys", since the latter is a method on JavasScript objects
"paper": MessagesPDP11.PAPER, "paper": MessagesPDP11.PAPER,

99
modules/pdp11/lib/panel.js
View file

@ -33,13 +33,14 @@
"use strict"; "use strict";
if (NODE) { if (NODE) {
var str = require("../../shared/lib/strlib"); var str = require("../../shared/lib/strlib");
var usr = require("../../shared/lib/usrlib"); var usr = require("../../shared/lib/usrlib");
var web = require("../../shared/lib/weblib"); var web = require("../../shared/lib/weblib");
var Component = require("../../shared/lib/component"); var Component = require("../../shared/lib/component");
var PDP11 = require("./defines"); var PDP11 = require("./defines");
var BusPDP11 = require("./bus"); var BusPDP11 = require("./bus");
var MemoryPDP11 = require("./memory"); var MemoryPDP11 = require("./memory");
var MessagesPDP11 = require("./messages");
} }
/** /**
@ -53,15 +54,15 @@ if (NODE) {
*/ */
function PanelPDP11(parmsPanel) function PanelPDP11(parmsPanel)
{ {
Component.call(this, "Panel", parmsPanel, PanelPDP11); Component.call(this, "Panel", parmsPanel, PanelPDP11, MessagesPDP11.PANEL);
/* /*
* If there are any live registers, LEDs, etc, to display, this will provide a count. * If there are any live registers, LEDs, etc, to display, this will provide a count.
* TODO: Add some UI for fDisplayLiveRegs (either an XML property, or a UI checkbox, or both). * TODO: Add some UI for fDisplayLiveRegs (either an XML property, or a UI checkbox, or both).
*/ */
this.cLiveRegs = 0; this.cLiveRegs = 0;
this.nPeriodicCount = 0; this.nDisplayCount = 0;
this.nPeriodicLimit = 60; this.nDisplayLimit = 60;
this.fDisplayLiveRegs = true; this.fDisplayLiveRegs = true;
/* /*
@ -175,6 +176,50 @@ PanelPDP11.LED = {
B22: 'B22' B22: 'B22'
}; };
/**
* getAR()
*
* @this {PanelPDP11}
* @return {number} (current ADDRESS register)
*/
PanelPDP11.prototype.getAR = function()
{
return this.regAddr;
};
/**
* setAR(value)
*
* @this {PanelPDP11}
* @param {number} value (new ADDRESS register)
*/
PanelPDP11.prototype.setAR = function(value)
{
this.updateAddr(this.regAddr = value);
};
/**
* getDR()
*
* @this {PanelPDP11}
* @return {number} (current DISPLAY register)
*/
PanelPDP11.prototype.getDR = function()
{
return this.regDisplay;
};
/**
* setDR(value)
*
* @this {PanelPDP11}
* @param {number} value (new DISPLAY register)
*/
PanelPDP11.prototype.setDR = function(value)
{
this.updateData(this.regDisplay = value);
};
/** /**
* getSR() * getSR()
* *
@ -573,8 +618,7 @@ PanelPDP11.prototype.processStart = function(value, index)
* is depressed, "the computer system will be cleared." I take it to mean that it performs * is depressed, "the computer system will be cleared." I take it to mean that it performs
* the equivalent of a RESET instruction. * the equivalent of a RESET instruction.
*/ */
this.bus.reset(); this.cpu.resetCPU();
this.cpu.resetRegs();
/* /*
* The PDP-11/70 Handbook goes on to say: "If the system needs to be initialized but execution * The PDP-11/70 Handbook goes on to say: "If the system needs to be initialized but execution
* is not wanted, the START switch should be depressed while the HALT/ENABLE switch is in the HALT * is not wanted, the START switch should be depressed while the HALT/ENABLE switch is in the HALT
@ -655,7 +699,7 @@ PanelPDP11.prototype.processContinue = function(value, index)
var dbg = this.dbg; var dbg = this.dbg;
if (dbg && !dbg.isBusy(true)) { if (dbg && !dbg.isBusy(true)) {
dbg.setBusy(true); dbg.setBusy(true);
dbg.stepCPU(0); dbg.stepCPU(0, null);
dbg.setBusy(false); dbg.setBusy(false);
} }
else { else {
@ -968,7 +1012,7 @@ PanelPDP11.prototype.setData = function(value, fActive)
* Called by the Computer component at intervals to update registers, LEDs, etc. * Called by the Computer component at intervals to update registers, LEDs, etc.
* *
* @this {PanelPDP11} * @this {PanelPDP11}
* @param {number} [nUpdate] (< 0 for forced, > 0 for periodic, undefined otherwise) * @param {number} [nUpdate] (< 0 for forced, > 0 for periodic, 0 otherwise)
*/ */
PanelPDP11.prototype.updateDisplay = function(nUpdate) PanelPDP11.prototype.updateDisplay = function(nUpdate)
{ {
@ -985,7 +1029,7 @@ PanelPDP11.prototype.updateDisplay = function(nUpdate)
* LEDs are considered cheap, register displays are not. So we'll skip the latter if this * LEDs are considered cheap, register displays are not. So we'll skip the latter if this
* is a periodic update AND our periodic update counter hasn't reached the periodic update limit. * is a periodic update AND our periodic update counter hasn't reached the periodic update limit.
*/ */
if (!(nUpdate > 0 && (this.nPeriodicCount += nUpdate) < this.nPeriodicLimit)) { if (nUpdate <= 0 || (this.nDisplayCount += nUpdate) >= this.nDisplayLimit) {
for (var i = 0; i < this.cpu.regsGen.length; i++) { for (var i = 0; i < this.cpu.regsGen.length; i++) {
this.displayValue('R'+i, this.cpu.regsGen[i]); this.displayValue('R'+i, this.cpu.regsGen[i]);
} }
@ -995,7 +1039,7 @@ PanelPDP11.prototype.updateDisplay = function(nUpdate)
this.displayValue("ZF", (regPSW & PDP11.PSW.ZF)? 1 : 0, 1); this.displayValue("ZF", (regPSW & PDP11.PSW.ZF)? 1 : 0, 1);
this.displayValue("VF", (regPSW & PDP11.PSW.VF)? 1 : 0, 1); this.displayValue("VF", (regPSW & PDP11.PSW.VF)? 1 : 0, 1);
this.displayValue("CF", (regPSW & PDP11.PSW.CF)? 1 : 0, 1); this.displayValue("CF", (regPSW & PDP11.PSW.CF)? 1 : 0, 1);
this.nPeriodicCount = 0; this.nDisplayCount = 0;
} }
/* /*
@ -1004,34 +1048,35 @@ PanelPDP11.prototype.updateDisplay = function(nUpdate)
* TODO: There is currently no mechanism for selecting regData over regDisplay; * TODO: There is currently no mechanism for selecting regData over regDisplay;
* we are acting as if the DATASEL switch setting is locked to "DISPLAY REGISTER". * we are acting as if the DATASEL switch setting is locked to "DISPLAY REGISTER".
*/ */
this.updateAddr(nUpdate > 0 && fRunning && !fWaiting? this.cpu.getPC() : this.regAddr); this.updateAddr(nUpdate > 0 && fRunning && !fWaiting? this.cpu.getLastAddr() : this.regAddr);
this.updateData(this.regDisplay); this.updateData(this.regDisplay);
var bits = this.cpu.getMMUState();
/* /*
* Set bit to 1 (22-bit), 2 (18-bit), or 4 (16-bit) * Bit 0 set if 22-bit, bit 1 set if 18-bit, bit 2 set if 16-bit
*/ */
var bit = this.cpu.mmuEnable? ((this.cpu.regMMR3 & PDP11.MMR3.MMU_22BIT)? 1 : 2) : 4; this.updateLED(PanelPDP11.LED.B22, bits & 1);
this.updateLED(PanelPDP11.LED.B22, bit & 1); this.updateLED(PanelPDP11.LED.B18, bits & 2);
this.updateLED(PanelPDP11.LED.B18, bit & 2); this.updateLED(PanelPDP11.LED.B16, bits & 4);
this.updateLED(PanelPDP11.LED.B16, bit & 4);
} }
} }
}; };
/** /**
* readCNSW(addr) * readCNSW(addr, fPreWrite)
* *
* If addr is set, then this a normal read, so we should return the SWITCH register (ie, regSwitches). * If fPreWrite, this is a read-before-write, so we must return the DISPLAY register (ie, regDisplay);
* otherwise, this a normal read, so we should return the SWITCH register (ie, regSwitches).
* *
* if addr is NOT set, then this is a read-before-write, so we must return the DISPLAY register (ie, regDisplay).
* *
* @this {PanelPDP11} * @this {PanelPDP11}
* @param {number} addr (eg, PDP11.UNIBUS.CNSW or 177570) * @param {number} addr (eg, PDP11.UNIBUS.CNSW or 177570)
* @param {boolean} [fPreWrite]
* @return {number} * @return {number}
*/ */
PanelPDP11.prototype.readCNSW = function(addr) PanelPDP11.prototype.readCNSW = function(addr, fPreWrite)
{ {
return (addr? this.regSwitches : this.regDisplay) & 0xffff; return (fPreWrite? this.regDisplay : this.regSwitches) & 0xffff;
}; };
/** /**

18
modules/pdp11/lib/pc11.js
View file

@ -489,8 +489,8 @@ PC11.prototype.load = function(sTapeName, sTapePath, nTapeTarget, file)
if (file) { if (file) {
var reader = new FileReader(); var reader = new FileReader();
reader.onload = function() { reader.onload = function doneRead() {
pc11.doneRead(sTapeName, sTapePath, nTapeTarget, reader.result); pc11.finishRead(sTapeName, sTapePath, nTapeTarget, reader.result);
}; };
reader.readAsArrayBuffer(file); reader.readAsArrayBuffer(file);
return true; return true;
@ -515,13 +515,13 @@ PC11.prototype.load = function(sTapeName, sTapePath, nTapeTarget, file)
} }
} }
return !!web.getResource(sTapeURL, null, true, function(sURL, sResponse, nErrorCode) { return !!web.getResource(sTapeURL, null, true, function doneLoad(sURL, sResponse, nErrorCode) {
pc11.doneLoad(sTapeName, sTapePath, nTapeTarget, sResponse, sURL, nErrorCode); pc11.finishLoad(sTapeName, sTapePath, nTapeTarget, sResponse, sURL, nErrorCode);
}); });
}; };
/** /**
* doneLoad(sTapeName, sTapePath, sTapeData, nTapeTarget, sURL, nErrorCode) * finishLoad(sTapeName, sTapePath, sTapeData, nTapeTarget, sURL, nErrorCode)
* *
* @this {PC11} * @this {PC11}
* @param {string} sTapeName * @param {string} sTapeName
@ -531,7 +531,7 @@ PC11.prototype.load = function(sTapeName, sTapePath, nTapeTarget, file)
* @param {string} sURL * @param {string} sURL
* @param {number} nErrorCode (response from server if anything other than 200) * @param {number} nErrorCode (response from server if anything other than 200)
*/ */
PC11.prototype.doneLoad = function(sTapeName, sTapePath, nTapeTarget, sTapeData, sURL, nErrorCode) PC11.prototype.finishLoad = function(sTapeName, sTapePath, nTapeTarget, sTapeData, sURL, nErrorCode)
{ {
var fPrintOnly = (nErrorCode < 0 && this.cmp && !this.cmp.flags.powered); var fPrintOnly = (nErrorCode < 0 && this.cmp && !this.cmp.flags.powered);
@ -547,7 +547,7 @@ PC11.prototype.doneLoad = function(sTapeName, sTapePath, nTapeTarget, sTapeData,
} }
else { else {
if (DEBUG && this.messageEnabled()) { if (DEBUG && this.messageEnabled()) {
this.printMessage('doneLoad("' + sTapePath + '")'); this.printMessage('finishLoad("' + sTapePath + '")');
} }
Component.addMachineResource(this.idMachine, sURL, sTapeData); Component.addMachineResource(this.idMachine, sURL, sTapeData);
var resource = web.parseMemoryResource(sURL, sTapeData); var resource = web.parseMemoryResource(sURL, sTapeData);
@ -564,7 +564,7 @@ PC11.prototype.doneLoad = function(sTapeName, sTapePath, nTapeTarget, sTapeData,
}; };
/** /**
* doneRead(sTapeName, sTapePath, nTapeTarget, buffer) * finishRead(sTapeName, sTapePath, nTapeTarget, buffer)
* *
* @this {PC11} * @this {PC11}
* @param {string} sTapeName * @param {string} sTapeName
@ -572,7 +572,7 @@ PC11.prototype.doneLoad = function(sTapeName, sTapePath, nTapeTarget, sTapeData,
* @param {number} nTapeTarget * @param {number} nTapeTarget
* @param {?} buffer (we KNOW this is an ArrayBuffer, but we can't seem to convince the Closure Compiler) * @param {?} buffer (we KNOW this is an ArrayBuffer, but we can't seem to convince the Closure Compiler)
*/ */
PC11.prototype.doneRead = function(sTapeName, sTapePath, nTapeTarget, buffer) PC11.prototype.finishRead = function(sTapeName, sTapePath, nTapeTarget, buffer)
{ {
if (buffer) { if (buffer) {
var aBytes = new Uint8Array(buffer, 0, buffer.byteLength); var aBytes = new Uint8Array(buffer, 0, buffer.byteLength);

12
modules/pdp11/lib/ram.js
View file

@ -92,8 +92,8 @@ function RAMPDP11(parmsRAM)
sFileURL = web.getHost() + DumpAPI.ENDPOINT + '?' + DumpAPI.QUERY.FILE + '=' + this.sFilePath + '&' + DumpAPI.QUERY.FORMAT + '=' + DumpAPI.FORMAT.BYTES + '&' + DumpAPI.QUERY.DECIMAL + '=true'; sFileURL = web.getHost() + DumpAPI.ENDPOINT + '?' + DumpAPI.QUERY.FILE + '=' + this.sFilePath + '&' + DumpAPI.QUERY.FORMAT + '=' + DumpAPI.FORMAT.BYTES + '&' + DumpAPI.QUERY.DECIMAL + '=true';
} }
var ram = this; var ram = this;
web.getResource(sFileURL, null, true, function(sURL, sResponse, nErrorCode) { web.getResource(sFileURL, null, true, function doneLoad(sURL, sResponse, nErrorCode) {
ram.doneLoad(sURL, sResponse, nErrorCode); ram.finishLoad(sURL, sResponse, nErrorCode);
}); });
} }
} }
@ -166,14 +166,14 @@ RAMPDP11.prototype.powerDown = function(fSave, fShutdown)
}; };
/** /**
* doneLoad(sURL, sData, nErrorCode) * finishLoad(sURL, sData, nErrorCode)
* *
* @this {RAMPDP11} * @this {RAMPDP11}
* @param {string} sURL * @param {string} sURL
* @param {string} sData * @param {string} sData
* @param {number} nErrorCode (response from server if anything other than 200) * @param {number} nErrorCode (response from server if anything other than 200)
*/ */
RAMPDP11.prototype.doneLoad = function(sURL, sData, nErrorCode) RAMPDP11.prototype.finishLoad = function(sURL, sData, nErrorCode)
{ {
if (nErrorCode) { if (nErrorCode) {
this.notice("Unable to load RAM resource (error " + nErrorCode + ": " + sURL + ")"); this.notice("Unable to load RAM resource (error " + nErrorCode + ": " + sURL + ")");
@ -197,8 +197,8 @@ RAMPDP11.prototype.doneLoad = function(sURL, sData, nErrorCode)
/** /**
* initRAM() * initRAM()
* *
* This function is called by both initBus() and doneLoad(), but it cannot copy the initial data into place * This function is called by both initBus() and finishLoad(), but it cannot copy the initial data into place
* until after initBus() has received the Bus component AND doneLoad() has received the data. When both those * until after initBus() has received the Bus component AND finishLoad() has received the data. When both those
* criteria are satisfied, the component becomes "ready". * criteria are satisfied, the component becomes "ready".
* *
* @this {RAMPDP11} * @this {RAMPDP11}

8
modules/pdp11/lib/rl11.js
View file

@ -282,7 +282,7 @@ RL11.prototype.initBus = function(cmp, bus, cpu, dbg)
this.triggerInterrupt = this.cpu.addTrigger(PDP11.RL11.VEC, PDP11.RL11.PRI); this.triggerInterrupt = this.cpu.addTrigger(PDP11.RL11.VEC, PDP11.RL11.PRI);
bus.addIOTable(this, RL11.UNIBUS_IOTABLE, MessagesPDP11.DISK); bus.addIOTable(this, RL11.UNIBUS_IOTABLE);
bus.addResetHandler(this.reset.bind(this)); bus.addResetHandler(this.reset.bind(this));
this.addDisk("None", RL11.SOURCE.NONE, true); this.addDisk("None", RL11.SOURCE.NONE, true);
@ -549,7 +549,7 @@ RL11.prototype.loadDrive = function(iDrive, sDiskName, sDiskPath, fAutoMount, fi
} }
drive.fLocal = !!file; drive.fLocal = !!file;
var disk = new DiskPDP11(this, drive, DiskAPI.MODE.PRELOAD); var disk = new DiskPDP11(this, drive, DiskAPI.MODE.PRELOAD);
if (disk.load(sDiskName, sDiskPath, file, this.doneLoadDrive)) { if (disk.load(sDiskName, sDiskPath, file, this.finishLoadDrive)) {
nResult++; nResult++;
} }
} }
@ -558,7 +558,7 @@ RL11.prototype.loadDrive = function(iDrive, sDiskName, sDiskPath, fAutoMount, fi
}; };
/** /**
* doneLoadDrive(drive, disk, sDiskName, sDiskPath, fAutoMount) * finishLoadDrive(drive, disk, sDiskName, sDiskPath, fAutoMount)
* *
* The disk parameter is set if the disk was successfully loaded, null if not. * The disk parameter is set if the disk was successfully loaded, null if not.
* *
@ -569,7 +569,7 @@ RL11.prototype.loadDrive = function(iDrive, sDiskName, sDiskPath, fAutoMount, fi
* @param {string} sDiskPath * @param {string} sDiskPath
* @param {boolean} [fAutoMount] * @param {boolean} [fAutoMount]
*/ */
RL11.prototype.doneLoadDrive = function onLoadDrive(drive, disk, sDiskName, sDiskPath, fAutoMount) RL11.prototype.finishLoadDrive = function onLoadDrive(drive, disk, sDiskName, sDiskPath, fAutoMount)
{ {
var aDiskInfo; var aDiskInfo;

23
modules/pdp11/lib/rom.js
View file

@ -54,7 +54,7 @@ if (NODE) {
* file: name of ROM data file * file: name of ROM data file
* *
* NOTE: The ROM data will not be copied into place until the Bus is ready (see initBus()) AND * NOTE: The ROM data will not be copied into place until the Bus is ready (see initBus()) AND
* the ROM data file has finished loading (see doneLoad()). * the ROM data file has finished loading (see finishLoad()).
* *
* Also, while the size parameter may seem redundant, I consider it useful to confirm that the ROM * Also, while the size parameter may seem redundant, I consider it useful to confirm that the ROM
* you received is the ROM you expected. * you received is the ROM you expected.
@ -65,7 +65,7 @@ if (NODE) {
*/ */
function ROMPDP11(parmsROM) function ROMPDP11(parmsROM)
{ {
Component.call(this, "ROM", parmsROM, ROMPDP11); Component.call(this, "ROM", parmsROM, ROMPDP11, MessagesPDP11.ROM);
this.abInit = null; this.abInit = null;
this.aSymbols = null; this.aSymbols = null;
@ -103,8 +103,8 @@ function ROMPDP11(parmsROM)
sFileURL = web.getHost() + DumpAPI.ENDPOINT + '?' + DumpAPI.QUERY.FILE + '=' + this.sFilePath + '&' + DumpAPI.QUERY.FORMAT + '=' + DumpAPI.FORMAT.BYTES + '&' + DumpAPI.QUERY.DECIMAL + '=true'; sFileURL = web.getHost() + DumpAPI.ENDPOINT + '?' + DumpAPI.QUERY.FILE + '=' + this.sFilePath + '&' + DumpAPI.QUERY.FORMAT + '=' + DumpAPI.FORMAT.BYTES + '&' + DumpAPI.QUERY.DECIMAL + '=true';
} }
var rom = this; var rom = this;
web.getResource(sFileURL, null, true, function(sURL, sResponse, nErrorCode) { web.getResource(sFileURL, null, true, function doneLoad(sURL, sResponse, nErrorCode) {
rom.doneLoad(sURL, sResponse, nErrorCode); rom.finishLoad(sURL, sResponse, nErrorCode);
}); });
} }
} }
@ -183,14 +183,14 @@ ROMPDP11.prototype.powerDown = function(fSave, fShutdown)
}; };
/** /**
* doneLoad(sURL, sData, nErrorCode) * finishLoad(sURL, sData, nErrorCode)
* *
* @this {ROMPDP11} * @this {ROMPDP11}
* @param {string} sURL * @param {string} sURL
* @param {string} sData * @param {string} sData
* @param {number} nErrorCode (response from server if anything other than 200) * @param {number} nErrorCode (response from server if anything other than 200)
*/ */
ROMPDP11.prototype.doneLoad = function(sURL, sData, nErrorCode) ROMPDP11.prototype.finishLoad = function(sURL, sData, nErrorCode)
{ {
if (nErrorCode) { if (nErrorCode) {
this.notice("Unable to load ROM resource (error " + nErrorCode + ": " + sURL + ")"); this.notice("Unable to load ROM resource (error " + nErrorCode + ": " + sURL + ")");
@ -212,8 +212,8 @@ ROMPDP11.prototype.doneLoad = function(sURL, sData, nErrorCode)
/** /**
* initROM() * initROM()
* *
* This function is called by both initBus() and doneLoad(), but it cannot copy the initial data into place * This function is called by both initBus() and finishLoad(), but it cannot copy the initial data into place
* until after initBus() has received the Bus component AND doneLoad() has received the data. When both those * until after initBus() has received the Bus component AND finishLoad() has received the data. When both those
* criteria are satisfied, the component becomes "ready". * criteria are satisfied, the component becomes "ready".
* *
* @this {ROMPDP11} * @this {ROMPDP11}
@ -289,11 +289,16 @@ ROMPDP11.prototype.addROM = function(addr)
* of the IOPAGE address space, by installing I/O handlers for the entire range that return the corresponding * of the IOPAGE address space, by installing I/O handlers for the entire range that return the corresponding
* bytes of the current ROM image on reads, and ignore any writes (which I'm only assuming is how a typical * bytes of the current ROM image on reads, and ignore any writes (which I'm only assuming is how a typical
* ROM "device" deals with writes; if we remove the write handler, then writes will fault). * ROM "device" deals with writes; if we remove the write handler, then writes will fault).
*
* TODO: It would be more efficient if we parsed ROM data as words rather than bytes, and then installed
* only word handlers instead of only byte handlers. It was done this way purely for historical reasons (ie,
* because that's how other PCjs machines parse their ROMs). For now, all this means is that executing code
* out of ROM will be slower than out of RAM -- although that's often true in the real world as well.
*/ */
var IOTable = { var IOTable = {
[addr]: [ROMPDP11.prototype.readROMByte, ROMPDP11.prototype.writeROMByte, null, null, null, this.sizeROM >> 1] [addr]: [ROMPDP11.prototype.readROMByte, ROMPDP11.prototype.writeROMByte, null, null, null, this.sizeROM >> 1]
}; };
if (this.bus.addIOTable(this, IOTable, MessagesPDP11.ROM, this.idComponent)) { if (this.bus.addIOTable(this, IOTable)) {
this.fRetainROM = true; this.fRetainROM = true;
return true; return true;
} }

27
modules/pdp11/lib/serialport.js
View file

@ -239,6 +239,19 @@ SerialPortPDP11.prototype.setBinding = function(sType, sBinding, control, sValue
return true; return true;
}; };
control.onpaste = function onKeyPress(event) {
if (event.stopPropagation) event.stopPropagation();
if (event.preventDefault) event.preventDefault();
var clipboardData = event.clipboardData || window.clipboardData;
if (clipboardData) {
/*
* NOTE: Multiple lines of pasted text will (at least on macOS) contain LFs instead of CRs;
* this is dealt with in receiveData() whenever it receives a string of characters.
*/
serial.receiveData(clipboardData.getData('Text'));
}
};
/* /*
* Now that we've added an onkeypress handler that calls preventDefault() for ALL keys, the control * Now that we've added an onkeypress handler that calls preventDefault() for ALL keys, the control
* itself no longer needs the "readonly" attribute; we primarily need to remove it for iOS browsers, * itself no longer needs the "readonly" attribute; we primarily need to remove it for iOS browsers,
@ -513,8 +526,20 @@ SerialPortPDP11.prototype.receiveData = function(data)
this.abReceive.push(data); this.abReceive.push(data);
} }
else if (typeof data == "string") { else if (typeof data == "string") {
var b = 0, bPrev;
for (var i = 0; i < data.length; i++) { for (var i = 0; i < data.length; i++) {
this.abReceive.push(data.charCodeAt(i)); bPrev = b;
b = data.charCodeAt(i);
/*
* NOTE: Multiple lines of pasted text will (at least on macOS) contain LFs instead of CRs;
* we convert them to CRs below. Windows may do something different, but in the worst case,
* even if we receive CR/LF pairs, this code should keep the CRs and lose the LFs.
*/
if (b == str.ASCII.LF) {
if (bPrev == str.ASCII.CR) continue;
b = str.ASCII.CR;
}
this.abReceive.push(b);
} }
} }
else { else {

4
modules/shared/lib/strlib.js
View file

@ -551,6 +551,10 @@ str.trim = function(s)
/* /*
* Any codes commented out in the following table are deemed "printable" * Any codes commented out in the following table are deemed "printable"
*/ */
str.ASCII = {
LF: 0x0A,
CR: 0x0D
};
str.aASCIICodes = { str.aASCIICodes = {
0x00: "NUL", 0x00: "NUL",
0x01: "SOH", // (CTRL_A) Start of Heading 0x01: "SOH", // (CTRL_A) Start of Heading

573
versions/pdpjs/1.30.3/pdp11-dbg.js
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387
versions/pdpjs/1.30.3/pdp11.js
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