Added disk image of VGA tests/samples
This commit is contained in:
parent
5ae447ab49
commit
a10ac83df6
7 changed files with 28 additions and 322 deletions
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@ -63,21 +63,12 @@ never completed, and this is another related issue that will have to be resolved
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---
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Another problem: during IBM VGA ROM initialization, a "missing readByte handler" warning occurs.
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Card.setMemoryAccess(0x1510): missing readByte handler
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stopped (2351185 ops, 7740201 cycles, 1617 ms, 4786766 hz)
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EAX=00000204 EBX=0000194A ECX=00000001 EDX=000003C4
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ESP=000000C4 EBP=FFFF0000 ESI=00000000 EDI=000003D4
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SS=0030 DS=0000 ES=C000 FS=0000 GS=0304 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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C000:1205 FEC0 INC AL
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Before debugging this though, I decided to first make a table of all the register values for most of the modes that
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the IBM VGA supports:
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While debugging and fixing assorted IBM VGA issues, I made a table of all the register values for the video
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modes commonly used on the IBM VGA. Here's that table:
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INT 0x10 Mode Requested: 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x0D 0x0E 0x10 0x12 0x13
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BIOSMODE: 0x01 0x01 0x03 0x03 0x04 0x04 0x06 0x12 0x12 0x12 0x12 0x13
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BIOSMODE: 0x01 0x01 0x03 0x03 0x04 0x04 0x06 0x0D 0x0E 0x10 0x12 0x13
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CRTC[0x00]: HTOTAL 0x2D 0x2D 0x5F 0x5F 0x2D 0x2D 0x5F 0x2D 0x5F 0x5F 0x5F 0x5F
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CRTC[0x01]: HDISP_END 0x27 0x27 0x4F 0x4F 0x27 0x27 0x4F 0x27 0x4F 0x4F 0x4F 0x4F
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CRTC[0x02]: HBLANK_START 0x28 0x28 0x50 0x50 0x28 0x28 0x50 0x28 0x50 0x50 0x50 0x50
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@ -138,13 +129,8 @@ the IBM VGA supports:
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ATC[0x12]: PLANES 0x0F 0x0F 0x0F 0x0F 0x03 0x03 0x01 0x0F 0x0F 0x0F 0x0F 0x0F
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ATC[0x13]: HPAN 0x08 0x08 0x08 0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
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In the process of building this table, I also discovered that INT 0x10 mode 0x0D display is garbled, and that all
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graphics modes >= 0x0D are misdetected as BIOSMODE 0x12.
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All these issues are under investigation.
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In addition, I've created a [VGA Tests](/tests/pc/vga/) directory to hold VGA test and sample code that I want PCjs
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to run successfully. See that directory for more details.
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In addition, I've created a [VGA Tests](/tests/pc/vga/) directory to hold VGA test and sample code that PCjs can
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now successfully run (for the most part). See that directory for more details.
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*[@jeffpar](http://twitter.com/jeffpar)*
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*June 1, 2015 (Updated July 3, 2015)*
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*June 1, 2015 (Updated July 9, 2015)*
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@ -1,281 +0,0 @@
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Compaq DeskPro 386 Disk Controller
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---
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In short, it isn't working.
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So let's boot a [DeskPro 386](/devices/pc/machine/compaq/deskpro386/ega/2048kb/?gort=debug) machine,
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enable HDC and Port messages in the Debugger (`m hdc on;m port on`), and see what's up.
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notice: Type 2 "20Mb Hard Disk" is fixed disk 0
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notice: Mounted diskette "PC-DOS 3.00 (Disk 1)" in drive A
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notice: Mounted diskette "PC-DOS 3.00 (Disk 2)" in drive B
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ramLow: 640Kb allocated
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ramLow: ROM BIOS memory test has NOT been disabled
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ramCPQ: 384Kb allocated
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ramCPQ: Compaq memory at 0xFA0000
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ramExt: 1024Kb allocated
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ramExt: Extended memory at 0x100000
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PCjs v1.x.x
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Copyright © 2012-2015 Jeff Parsons <Jeff@pcjs.org>
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License: GPL version 3 or later <http://gnu.org/licenses/gpl.html>
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Type ? for list of debugger commands
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EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000304
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ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
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SS=0000 DS=0000 ES=0000 FS=0000 GS=0000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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F000:FFF0 EA05F900F0 JMP F000:F905
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messages on: port
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messages on: hdc
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running
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x00) @F000:F907
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x01) @F000:F926
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x02) @F000:F93C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x03) @F000:F942
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x04) @F000:F946
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x05) @F000:F95F
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x06) @F000:F978
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x08) @F000:F9AA
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notice: PIC0(0x20): unsupported OCW2 automatic EOI command: 0x00
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notice: PIC1(0xA0): unsupported OCW2 automatic EOI command: 0x00
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x09) @F000:F9F1
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x0F) @F000:BAAA
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x10) @F000:BAFB
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bus.outPort(0x004B,unknown,0x12) @F000:BAFF
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bus.outPort(0x004B,unknown,0x42) @F000:BB03
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bus.outPort(0x004B,unknown,0x92) @F000:BB07
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x11) @F000:BB29
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x12) @F000:BB70
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x13) @F000:BB90
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x14) @F000:BBB8
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x15) @F000:BBD8
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x17) @F000:BC08
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x18) @F000:BC14
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x40) @F000:B552
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CompaqController.writeByte(0x0000,0xFF) @0018:87B4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x2F) @0018:87B4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x41) @F000:B572
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x42) @F000:B599
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x43) @F000:B5C4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x44) @F000:B5D2
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x45) @F000:B600
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x43) @F000:B5C4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x44) @F000:B5D2
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x45) @F000:B600
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x46) @F000:B61C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x19) @F000:BC2C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x30) @F000:A8B0
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x31) @F000:A905
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x32) @F000:A91D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x33) @F000:A93B
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x34) @F000:A953
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x36) @F000:A991
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x38) @F000:A99C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x39) @F000:A9BC
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bus.inPort(0x03BC,unknown) @F000:A9CA
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bus.outPort(0x03BC,unknown,0x00) @F000:A9CD
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bus.inPort(0x03BC,unknown) @F000:A9D0
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bus.inPort(0x0378,unknown) @F000:A9CA
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bus.outPort(0x0378,unknown,0x00) @F000:A9CD
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bus.inPort(0x0378,unknown) @F000:A9D0
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bus.inPort(0x0278,unknown) @F000:A9CA
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bus.outPort(0x0278,unknown,0x00) @F000:A9CD
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bus.inPort(0x0278,unknown) @F000:A9D0
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x3A) @F000:A9DE
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x3B) @F000:A9FB
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x52) @F000:AA41
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x53) @F000:AA54
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bus.outPort(0x46E8,unknown,0x16) @C000:009C
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bus.outPort(0x46E9,unknown,0x00) @C000:009C
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bus.outPort(0x0102,unknown,0x01) @C000:00A3
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bus.outPort(0x0103,unknown,0x00) @C000:00A3
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bus.outPort(0x46E8,unknown,0x0E) @C000:00AA
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bus.outPort(0x46E9,unknown,0x00) @C000:00AA
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bus.outPort(0x4AE8,unknown,0x00) @C000:00B0
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bus.outPort(0x4AE9,unknown,0x00) @C000:00B0
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Card.setMemoryAccess(0x1510): missing readByte handler
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x8C) @F000:D05C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x1A) @F000:BC79
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x50) @F000:AA76
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x51) @F000:AA7F
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x52) @F000:AA9C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x1B) @F000:BC80
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x1C) @F000:BC87
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x90) @F000:CC53
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x91) @F000:CC85
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x1D) @F000:BC8E
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x93) @F000:CC8A
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x94) @F000:CD06
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x95) @F000:CD3C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x96) @F000:CD6A
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x2D) @F000:BC95
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x0D) @F000:E107
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bus.outPort(0x004B,unknown,0x12) @F000:E10B
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bus.outPort(0x0048,unknown,0x22) @F000:E112
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bus.outPort(0x004B,unknown,0x00) @F000:E139
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bus.inPort(0x0048,unknown) @F000:E13B
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bus.inPort(0x0048,unknown) @F000:E13E
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bus.outPort(0x004B,unknown,0x12) @F000:E11A
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x0E) @F000:E11E
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bus.outPort(0x004B,unknown,0x92) @F000:E122
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bus.outPort(0x004A,unknown,0x22) @F000:E129
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bus.outPort(0x004B,unknown,0x80) @F000:E139
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bus.inPort(0x004A,unknown) @F000:E13B
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bus.inPort(0x004A,unknown) @F000:E13E
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bus.outPort(0x004B,unknown,0x92) @F000:E131
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x1E) @F000:BC9C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x80) @F000:CFDF
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x81) @F000:CFF7
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x82) @F000:D011
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x84) @F000:D02D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x1F) @F000:BCA3
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x75) @F000:F74D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x76) @F000:F761
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x77) @0030:F772
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x78) @0030:F790
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x00) @F000:F907
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x07) @F000:F986
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x08) @F000:F9AA
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notice: PIC0(0x20): unsupported OCW2 automatic EOI command: 0x00
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notice: PIC1(0xA0): unsupported OCW2 automatic EOI command: 0x00
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x09) @F000:F9F1
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x79) @F000:F7CD
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x7B) @F000:F814
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x20) @F000:BCAA
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x60) @F000:D6E6
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x61) @F000:D704
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x18) @0030:870A
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CompaqController.readByte(0x0000) returned 0x0F @0030:8710
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CompaqController.readByte(0x0001) returned 0x0A @0030:8710
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CompaqController.writeByte(0x0000,0xFF) @0030:8715
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x18) @0030:8715
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x62) @0030:D719
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x63) @0030:D761
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CompaqController.writeByte(0x0000,0xFF) @0030:84B0
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x70) @0030:DB38
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x71) @0030:DB6D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x73) @0030:DBF4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6D) @0030:DAC0
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6E) @0030:DAC8
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6F) @0030:DB19
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x70) @0030:DB38
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x71) @0030:DB6D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x73) @0030:DBF4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x65) @0030:D7E6
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6D) @0030:DAC0
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6E) @0030:DAC8
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6F) @0030:DB19
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x70) @0030:DB38
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x71) @0030:DB6D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x73) @0030:DBF4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x70) @0030:DB38
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x71) @0030:DB6D
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x73) @0030:DBF4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x72) @0030:DC01
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x66) @0030:D942
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x67) @0030:D970
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x68) @0030:D99B
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x00) @F000:F907
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x07) @F000:F986
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x08) @F000:F9AA
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notice: PIC0(0x20): unsupported OCW2 automatic EOI command: 0x00
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notice: PIC1(0xA0): unsupported OCW2 automatic EOI command: 0x00
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x09) @F000:F9F1
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x69) @F000:D9CC
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CompaqController.readByte(0x0000) returned 0x0F @0018:880A
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CompaqController.writeByte(0x0000,0xFF) @0018:8810
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x6C) @F000:DAB1
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xD0) @F000:C82A
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xD1) @F000:C83B
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xD2) @0030:C847
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CompaqController.writeByte(0x0000,0xFF) @0030:84B0
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x7F) @0030:853E
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CompaqController.readByte(0x0000) returned 0x0F @0030:85D2
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CompaqController.writeByte(0x0000,0xFF) @0030:85D7
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CompaqController.writeByte(0x0000,0xFC) @0030:863C
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xD3) @0030:C881
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xD4) @F000:C8A5
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x7D) @F000:F482
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CompaqController.readByte(0x0000) returned 0x0F @0028:F4BC
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x7E) @F000:F686
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CompaqController.writeByte(0x0000,0xFE) @0018:87B4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x2F) @0018:87B4
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CompaqController.writeByte(0x0000,0xFF) @0018:87B4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x2F) @0018:87B4
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chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x21) @F000:BCBB
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x23) @F000:BCC2
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x8B) @F000:CEDD
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x8C) @F000:D05C
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x86) @F000:CF04
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x87) @F000:CF2A
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x88) @F000:CF41
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x89) @F000:CF4E
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x8D) @F000:CF8E
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x22) @F000:BCC9
|
||||
CompaqController.readByte(0x0000) returned 0x0F @0018:880A
|
||||
CompaqController.writeByte(0x0000,0xFF) @0018:8810
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x24) @F000:BCEB
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x25) @F000:BD19
|
||||
hdcAT.outPort(0x01F6,DRVHD,0xA0) @F000:91B5
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:C5B5
|
||||
hdcAT.outPort(0x03F6,FDR,0x04) @F000:C5B8
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:C5BE
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xA0) @F000:83FE
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xA1) @F000:8408
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xA2) @F000:8415
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xA3) @F000:8430
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xA6) @F000:8490
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xA8) @F000:91BE
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xAF) @F000:920A
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x26) @F000:BD20
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xB0) @F000:C397
|
||||
hdcAT.outPort(0x01F2,SECCNT,0x55) @F000:C3A6
|
||||
hdcAT.inPort(0x01F2,SECCNT): 0x55 @F000:C3A9
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:C5B5
|
||||
hdcAT.outPort(0x03F6,FDR,0x04) @F000:C5B8
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:C5BE
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:C574
|
||||
hdcAT.inPort(0x01F1,ERROR): 0x01 @F000:C588
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xB3) @F000:C3E3
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:B4B0
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.outPort(0x01F6,DRVHD,0xA0) @F000:B2C8
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B52F
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:C41F
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:B4B0
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.outPort(0x01F6,DRVHD,0xA0) @F000:B2C8
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B52F
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:C41F
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:B4B0
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.outPort(0x01F6,DRVHD,0xA0) @F000:B2C8
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B52F
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:C41F
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:B4B0
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.outPort(0x01F6,DRVHD,0xA0) @F000:B2C8
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B52F
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:C41F
|
||||
hdcAT.outPort(0x03F6,FDR,0x00) @F000:B4B0
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.outPort(0x01F6,DRVHD,0xA0) @F000:B2C8
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B367
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:B52F
|
||||
hdcAT.inPort(0x01F7,STATUS): 0x40 @F000:C41F
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xB6) @F000:C54B
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0xB8) @F000:C3C3
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x27) @F000:BD27
|
||||
bus.outPort(0x03BE,unknown,0xEC) @F000:BD2E
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x28) @F000:BD31
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x29) @F000:BD38
|
||||
chipset.outPort(0x0084,DMA.SPARE0.PAGE,0x8C) @F000:D05C
|
||||
stopped (67172989 ops, 305957247 cycles, 69937 ms, 4374755 hz)
|
||||
EAX=00000000 EBX=0000B95B ECX=00000000 EDX=00000000
|
||||
ESP=000000DC EBP=000000DE ESI=00000020 EDI=0000E411
|
||||
SS=0030 DS=0040 ES=F000 FS=0000 GS=0304 PS=00000246 V0 D0 I1 T0 S0 Z1 A0 P1 C0
|
||||
F000:DCAC 74F8 JZ DCA6
|
||||
|
||||
*[@jeffpar](http://twitter.com/jeffpar)*
|
||||
*June 20, 2015*
|
||||
Loading…
Reference in a new issue