Limited Debug register support
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7 changed files with 168 additions and 85 deletions
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@ -409,18 +409,19 @@ var X86 = {
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* Bit values for opFlags, which are all reset to zero prior to each instruction
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*/
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OPFLAG: {
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NOREAD: 0x0001,
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NOWRITE: 0x0002,
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NOINTR: 0x0004, // indicates a segreg has been set, or a prefix, or an STI (delay INTR acknowledgement)
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FAULT: 0x0008, // indicates a fault occurred during the current instruction
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NOREAD: 0x0001, // disable memory reads for the remainder of the current instruction
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NOWRITE: 0x0002, // disable memory writes for the remainder of the current instruction
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NOINTR: 0x0004, // a segreg has been set, or a prefix, or an STI (delay INTR acknowledgement)
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SEG: 0x0010, // segment override
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LOCK: 0x0020, // lock prefix
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REPZ: 0x0040, // repeat while Z (NOTE: this value MUST match PS.ZF; see opCMPSb/opCMPSw/opSCASb/opSCASw)
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REPNZ: 0x0080, // repeat while NZ
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REPEAT: 0x0100, // indicates that an instruction is being repeated (ie, some iteration AFTER the first)
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REPEAT: 0x0100, // an instruction is being repeated (ie, some iteration AFTER the first)
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PUSHSP: 0x0200, // the SP register is potentially being referenced by a PUSH SP opcode, adjustment may be required
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DATASIZE: 0x1000, // data size override
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ADDRSIZE: 0x2000 // address size override
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DATASIZE: 0x0400, // data size override
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ADDRSIZE: 0x0800, // address size override
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FAULT: 0x1000, // a fault occurred during the current instruction
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DEBUG: 0x2000 // a DEBUG exception occurred during the current instruction
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},
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/*
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* Bit values for intFlags
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