80286 triple-fault happily resets now
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parent
ec857802d5
commit
9d73a2674e
21 changed files with 402 additions and 261 deletions
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@ -1364,6 +1364,7 @@ if (DEBUGGER) {
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{
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this.afnDumpers = [];
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this.bitsMessageEnabled = 0;
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this.sMessagePrev = null;
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var aEnable = this.parseCommand(sEnable);
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if (aEnable.length) {
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for (var m in Debugger.MESSAGES) {
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@ -1544,8 +1545,12 @@ if (DEBUGGER) {
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*/
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Debugger.prototype.message = function(sMessage)
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{
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if (this.sMessagePrev && sMessage == this.sMessagePrev) return;
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this.println(sMessage); // + " (" + this.cpu.getCycles() + " cycles)"
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this.sMessagePrev = sMessage;
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if (this.cpu) {
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if (this.bitsMessageEnabled & Debugger.MESSAGE.HALT) {
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this.cpu.stopCPU();
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@ -1727,6 +1732,18 @@ if (DEBUGGER) {
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return (this.nCycles > 0);
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};
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/**
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* stopCPU(s)
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*
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* @this {Debugger}
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* @param {string} [s]
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*/
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Debugger.prototype.stopCPU = function(s)
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{
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if (s) this.message(s);
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this.cpu.stopCPU();
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};
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/**
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* updateStatus(fRegs, fCompact)
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*
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@ -1993,7 +2010,7 @@ if (DEBUGGER) {
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* Assert that general-purpose register contents remain within their respective ranges;
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* this isn't intended to be complete, just a spot-check.
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*/
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Component.assert(!(this.cpu.regAX & ~0xffff) && !(this.cpu.regBX & ~0xffff) && !(this.cpu.regCX & ~0xffff) && !(this.cpu.regDX & ~0xffff), "register out of bounds");
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if (DEBUG) this.assert(!(this.cpu.regAX & ~0xffff) && !(this.cpu.regBX & ~0xffff) && !(this.cpu.regCX & ~0xffff) && !(this.cpu.regDX & ~0xffff), "register out of bounds");
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if (!fSkipBP && this.checkBreakpoint(addr, this.aBreakExec)) {
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return true;
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@ -2112,7 +2129,8 @@ if (DEBUGGER) {
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* If the selector matches that of any of the CPU segment registers, then return the CPU's segment
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* register, instead of creating our own dummy segment register. This makes it possible for us to
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* see what the CPU is seeing at certain critical junctures, such as after an LMSW instruction has
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* switched the processor from real to protected mode.
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* switched the processor from real to protected mode. Actually loading the selector from the GDT/LDT
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* should be done only as a last resort.
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*
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* @param {number} sel
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* @return {X86Seg} seg
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@ -2183,7 +2201,7 @@ if (DEBUGGER) {
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var addr = this.getAddr(aAddr, false, 0);
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if (addr >= 0) {
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b = this.bus.getByteDirect(addr);
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Component.assert((b == (b & 0xff)), "invalid byte (" + b + ") at address: " + this.hexAddr(aAddr));
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if (DEBUG) this.assert((b == (b & 0xff)), "invalid byte (" + b + ") at address: " + this.hexAddr(aAddr));
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if (inc !== undefined) this.incAddr(aAddr, inc);
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}
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return b;
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@ -2203,7 +2221,7 @@ if (DEBUGGER) {
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var addr = this.getAddr(aAddr, false, 1);
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if (addr >= 0) {
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w = this.bus.getWordDirect(addr);
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Component.assert((w == (w & 0xffff)), "invalid word (" + w + ") at address: " + this.hexAddr(aAddr));
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if (DEBUG) this.assert((w == (w & 0xffff)), "invalid word (" + w + ") at address: " + this.hexAddr(aAddr));
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if (inc !== undefined) this.incAddr(aAddr, inc);
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}
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return w;
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@ -3515,7 +3533,7 @@ if (DEBUGGER) {
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s += (seg.acc & X86.DESC.ACC.TYPE.CONFORMING)? "conforming," : "nonconforming,";
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} else {
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s += "data:";
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s += (seg.acc & X86.DESC.ACC.TYPE.WRITEABLE)? "writeable," : "readonly,";
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s += (seg.acc & X86.DESC.ACC.TYPE.WRITABLE)? "writable," : "readonly,";
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s += (seg.acc & X86.DESC.ACC.TYPE.EXPDOWN)? "expand down," : "expand up,";
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}
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s += (seg.acc & X86.DESC.ACC.TYPE.ACCESSED)? "accessed" : "not accessed";
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