Pulled all hard-coded cycle counts into processor-specific tables
This commit is contained in:
parent
234d6bbfd8
commit
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7 changed files with 2945 additions and 2939 deletions
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@ -167,6 +167,238 @@ function X86CPU(parmsCPU) {
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Component.subclass(CPU, X86CPU);
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X86CPU.CYCLES_8088 = {
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nWordCyclePenalty: 4, // NOTE: accurate for the 8088/80188 only (on the 8086/80186, it applies to odd addresses only)
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nEACyclesBase: 5, // base or index only (BX, BP, SI or DI)
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nEACyclesDisp: 6, // displacement only
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nEACyclesBaseIndex: 7, // base + index (BP+DI and BX+SI)
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nEACyclesBaseIndexExtra: 8, // base + index (BP+SI and BX+DI require an extra cycle)
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nEACyclesBaseDisp: 9, // base or index + displacement
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nEACyclesBaseIndexDisp: 11, // base + index + displacement (BP+DI+n and BX+SI+n)
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nEACyclesBaseIndexDispExtra:12, // base + index + displacement (BP+SI+n and BX+DI+n require an extra cycle)
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nOpCyclesAAA: 4, // AAA, AAS, DAA, DAS, TEST acc,imm
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nOpCyclesAAD: 60,
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nOpCyclesAAM: 83,
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nOpCyclesArithRR: 3, // ADC, ADD, AND, OR, SBB, SUB, XOR and CMP reg,reg cycle time
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nOpCyclesArithRM: 9, // ADC, ADD, AND, OR, SBB, SUB, and XOR reg,mem (and CMP mem,reg) cycle time
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nOpCyclesArithMR: 16, // ADC, ADD, AND, OR, SBB, SUB, and XOR mem,reg cycle time
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nOpCyclesArithMID: 1, // ADC, ADD, AND, OR, SBB, SUB, XOR and CMP mem,imm cycle delta
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nOpCyclesCall: 19,
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nOpCyclesCallF: 28,
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nOpCyclesCallWR: 16,
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nOpCyclesCallWM: 21,
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nOpCyclesCallDM: 37,
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nOpCyclesCLI: 2,
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nOpCyclesCompareRM: 9, // CMP reg,mem cycle time (same as nOpCyclesArithRM on an 8086 but not on a 80286)
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nOpCyclesCWD: 5,
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nOpCyclesBound: 33, // N/A if 8086/8088, 33-35 if 80186/80188 (TODO: Determine what the range means for an 80186/80188)
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nOpCyclesInP: 10,
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nOpCyclesInDX: 8,
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nOpCyclesIncR: 3, // INC reg, DEC reg
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nOpCyclesIncM: 15, // INC mem, DEC mem
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nOpCyclesInt: 51,
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nOpCyclesInt3D: 1,
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nOpCyclesIntOD: 2,
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nOpCyclesIntOFall: 4,
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nOpCyclesIRet: 32,
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nOpCyclesJmp: 15,
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nOpCyclesJmpF: 15,
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nOpCyclesJmpC: 16,
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nOpCyclesJmpCFall: 4,
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nOpCyclesJmpWR: 11,
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nOpCyclesJmpWM: 18,
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nOpCyclesJmpDM: 24,
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nOpCyclesLAHF: 4, // LAHF, SAHF, MOV reg,imm
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nOpCyclesLEA: 2,
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nOpCyclesLS: 16, // LDS, LES
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nOpCyclesLoop: 17, // LOOP, LOOPNZ
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nOpCyclesLoopZ: 18, // LOOPZ, JCXZ
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nOpCyclesLoopNZ: 19, // LOOPNZ
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nOpCyclesLoopFall: 5, // LOOP
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nOpCyclesLoopZFall: 6, // LOOPZ, JCXZ
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nOpCyclesMovRR: 2,
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nOpCyclesMovRM: 8,
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nOpCyclesMovMR: 9,
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nOpCyclesMovRI: 10,
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nOpCyclesMovMI: 10,
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nOpCyclesMovAM: 10,
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nOpCyclesMovMA: 10,
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nOpCyclesDivBR: 80, // range of 80-90
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nOpCyclesDivWR: 144, // range of 144-162
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nOpCyclesDivBM: 86, // range of 86-96
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nOpCyclesDivWM: 154, // range of 154-172
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nOpCyclesIDivBR: 101, // range of 101-112
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nOpCyclesIDivWR: 165, // range of 165-184
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nOpCyclesIDivBM: 107, // range of 107-118
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nOpCyclesIDivWM: 171, // range of 171-190
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nOpCyclesMulBR: 70, // range of 70-77
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nOpCyclesMulWR: 113, // range of 113-118
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nOpCyclesMulBM: 76, // range of 76-83
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nOpCyclesMulWM: 124, // range of 124-139
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nOpCyclesIMulBR: 80, // range of 80-98
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nOpCyclesIMulWR: 128, // range of 128-154
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nOpCyclesIMulBM: 86, // range of 86-104
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nOpCyclesIMulWM: 134, // range of 134-160
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nOpCyclesNegR: 3, // NEG reg, NOT reg
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nOpCyclesNegM: 16, // NEG mem, NOT mem
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nOpCyclesOutP: 10,
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nOpCyclesOutDX: 8,
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nOpCyclesPopAll: 51, // N/A if 8086/8088, 51 if 80186, 83 if 80188 (TODO: Verify)
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nOpCyclesPopReg: 8,
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nOpCyclesPopMem: 17,
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nOpCyclesPushAll: 36, // N/A if 8086/8088, 36 if 80186, 68 if 80188 (TODO: Verify)
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nOpCyclesPushReg: 11, // NOTE: "The 8086 Book" claims this is 10, but it's an outlier....
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nOpCyclesPushMem: 16,
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nOpCyclesPushSeg: 10,
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nOpCyclesPrefix: 2,
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nOpCyclesCmpS: 18,
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nOpCyclesCmpSr0: 9-2, // reduced by nOpCyclesPrefix
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nOpCyclesCmpSrn: 17-2, // reduced by nOpCyclesPrefix
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nOpCyclesLodS: 12,
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nOpCyclesLodSr0: 9-2, // reduced by nOpCyclesPrefix
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nOpCyclesLodSrn: 13-2, // reduced by nOpCyclesPrefix
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nOpCyclesMovS: 18,
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nOpCyclesMovSr0: 9-2, // reduced by nOpCyclesPrefix
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nOpCyclesMovSrn: 17-2, // reduced by nOpCyclesPrefix
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nOpCyclesScaS: 15,
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nOpCyclesScaSr0: 9-2, // reduced by nOpCyclesPrefix
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nOpCyclesScaSrn: 15-2, // reduced by nOpCyclesPrefix
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nOpCyclesStoS: 11,
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nOpCyclesStoSr0: 9-2, // reduced by nOpCyclesPrefix
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nOpCyclesStoSrn: 10-2, // reduced by nOpCyclesPrefix
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nOpCyclesRet: 8,
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nOpCyclesRetn: 12,
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nOpCyclesRetF: 18,
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nOpCyclesRetFn: 17,
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nOpCyclesShift1M: 15, // ROL/ROR/RCL/RCR/SHL/SHR/SAR reg,1
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nOpCyclesShiftCR: 8, // ROL/ROR/RCL/RCR/SHL/SHR/SAR reg,CL
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nOpCyclesShiftCM: 20, // ROL/ROR/RCL/RCR/SHL/SHR/SAR mem,CL
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nOpCyclesShiftCS: 2, // this is the left-shift value used to convert the count to the cycle cost
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nOpCyclesTestRR: 3,
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nOpCyclesTestRM: 9,
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nOpCyclesTestRI: 5,
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nOpCyclesTestMI: 11,
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nOpCyclesXchgRR: 4,
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nOpCyclesXchgRM: 17,
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nOpCyclesXLAT: 11
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};
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X86CPU.CYCLES_80286 = {
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nWordCyclePenalty: 0,
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nEACyclesBase: 0,
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nEACyclesDisp: 0,
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nEACyclesBaseIndex: 0,
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nEACyclesBaseIndexExtra: 0,
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nEACyclesBaseDisp: 0,
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nEACyclesBaseIndexDisp: 1,
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nEACyclesBaseIndexDispExtra:1,
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nOpCyclesAAA: 3,
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nOpCyclesAAD: 14,
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nOpCyclesAAM: 16,
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nOpCyclesArithRR: 2,
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nOpCyclesArithRM: 7,
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nOpCyclesArithMR: 7,
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nOpCyclesArithMID: 0,
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nOpCyclesCall: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesCallF: 13, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesCallWR: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesCallWM: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesCallDM: 16, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesCLI: 3,
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nOpCyclesCompareRM: 6,
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nOpCyclesCWD: 2,
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nOpCyclesBound: 13,
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nOpCyclesInP: 5,
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nOpCyclesInDX: 5,
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nOpCyclesIncR: 2,
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nOpCyclesIncM: 7,
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nOpCyclesInt: 23, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesInt3D: 0,
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nOpCyclesIntOD: 1,
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nOpCyclesIntOFall: 3,
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nOpCyclesIRet: 17, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesJmp: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesJmpF: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesJmpC: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesJmpCFall: 3,
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nOpCyclesJmpWR: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesJmpWM: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesJmpDM: 15, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesLAHF: 2,
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nOpCyclesLEA: 3,
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nOpCyclesLS: 7,
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nOpCyclesLoop: 8, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesLoopZ: 8, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesLoopNZ: 8, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesLoopFall: 4,
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nOpCyclesLoopZFall: 4,
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nOpCyclesMovRR: 2, // this is actually the same as the 8086...
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nOpCyclesMovRM: 3,
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nOpCyclesMovMR: 5,
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nOpCyclesMovRI: 2,
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nOpCyclesMovMI: 3,
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nOpCyclesMovAM: 5, // this is actually slower than the MOD/RM form of MOV AX,mem (see nOpCyclesMovRM)
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nOpCyclesMovMA: 3,
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nOpCyclesDivBR: 14,
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nOpCyclesDivWR: 22,
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nOpCyclesDivBM: 17,
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nOpCyclesDivWM: 25,
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nOpCyclesIDivBR: 17,
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nOpCyclesIDivWR: 25,
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nOpCyclesIDivBM: 20,
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nOpCyclesIDivWM: 28,
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nOpCyclesMulBR: 13,
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nOpCyclesMulWR: 21,
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nOpCyclesMulBM: 16,
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nOpCyclesMulWM: 24,
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nOpCyclesIMulBR: 13,
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nOpCyclesIMulWR: 21,
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nOpCyclesIMulBM: 16,
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nOpCyclesIMulWM: 24,
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nOpCyclesNegR: 2,
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nOpCyclesNegM: 7,
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nOpCyclesOutP: 5,
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nOpCyclesOutDX: 5,
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nOpCyclesPopAll: 19,
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nOpCyclesPopReg: 5,
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nOpCyclesPopMem: 5,
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nOpCyclesPushAll: 17,
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nOpCyclesPushReg: 3,
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nOpCyclesPushMem: 5,
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nOpCyclesPushSeg: 3,
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nOpCyclesPrefix: 0,
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nOpCyclesCmpS: 8,
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nOpCyclesCmpSr0: 5,
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nOpCyclesCmpSrn: 9,
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nOpCyclesLodS: 5,
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nOpCyclesLodSr0: 5,
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nOpCyclesLodSrn: 4,
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nOpCyclesMovS: 5,
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nOpCyclesMovSr0: 5,
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nOpCyclesMovSrn: 4,
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nOpCyclesScaS: 7,
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nOpCyclesScaSr0: 5,
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nOpCyclesScaSrn: 8,
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nOpCyclesStoS: 3,
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nOpCyclesStoSr0: 4,
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nOpCyclesStoSrn: 3,
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nOpCyclesRet: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesRetn: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesRetF: 15, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesRetFn: 15, // on the 80286, this ALSO includes the number of bytes in the target instruction
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nOpCyclesShift1M: 7,
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nOpCyclesShiftCR: 5,
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nOpCyclesShiftCM: 8,
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nOpCyclesShiftCS: 0,
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nOpCyclesTestRR: 2,
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nOpCyclesTestRM: 6,
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nOpCyclesTestRI: 3,
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nOpCyclesTestMI: 6,
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nOpCyclesXchgRR: 3,
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nOpCyclesXchgRM: 5,
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nOpCyclesXLAT: 5
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};
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/**
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* Memory Simulation Notes
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*
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@ -442,123 +674,7 @@ X86CPU.prototype.initProcessor = function()
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this.OPFLAG_NOINTR8086 = X86.OPFLAG.NOINTR;
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this.nShiftCountMask = 0xff; // on an 8086/8088, there effectively is NO mask
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/*
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* TODO: Make sure all segment overrides impose an additional 2-cycle penalty
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*/
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this.nWordCyclePenalty = 4; // NOTE: accurate for the 8088/80188 only (on the 8086/80186, it applies to odd addresses only)
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this.nEACyclesBase = 5; // base or index only (BX, BP, SI or DI)
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this.nEACyclesDisp = 6; // displacement only
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this.nEACyclesBaseIndex = 7; // base + index (BP+DI and BX+SI)
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this.nEACyclesBaseIndexExtra = 8; // base + index (BP+SI and BX+DI require an extra cycle)
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this.nEACyclesBaseDisp = 9; // base or index + displacement
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this.nEACyclesBaseIndexDisp = 11; // base + index + displacement (BP+DI+n and BX+SI+n)
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this.nEACyclesBaseIndexDispExtra = 12; // base + index + displacement (BP+SI+n and BX+DI+n require an extra cycle)
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this.nOpCyclesAAA = 4; // AAA, AAS, DAA, DAS, TEST acc,imm
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this.nOpCyclesAAD = 60;
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this.nOpCyclesAAM = 83;
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this.nOpCyclesArithRR = 3; // ADC, ADD, AND, OR, SBB, SUB, XOR and CMP reg,reg cycle time
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this.nOpCyclesArithRM = 9; // ADC, ADD, AND, OR, SBB, SUB, and XOR reg,mem (and CMP mem,reg) cycle time
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this.nOpCyclesArithMR = 16; // ADC, ADD, AND, OR, SBB, SUB, and XOR mem,reg cycle time
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this.nOpCyclesArithMID = 1; // ADC, ADD, AND, OR, SBB, SUB, XOR and CMP mem,imm cycle delta
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this.nOpCyclesCall = 19;
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this.nOpCyclesCallF = 28;
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this.nOpCyclesCallWR = 16;
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this.nOpCyclesCallWM = 21;
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this.nOpCyclesCallDM = 37;
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this.nOpCyclesCLI = 2;
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this.nOpCyclesCompareRM = 9; // CMP reg,mem cycle time (same as nOpCyclesArithRM on an 8086 but not on a 80286)
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this.nOpCyclesCWD = 5;
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this.nOpCyclesBound = 33; // N/A if 8086/8088, 33-35 if 80186/80188 (TODO: Determine what the range means for an 80186/80188)
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this.nOpCyclesInP = 10;
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this.nOpCyclesInDX = 8;
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this.nOpCyclesIncR = 3; // INC reg, DEC reg
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this.nOpCyclesIncM = 15; // INC mem, DEC mem
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this.nOpCyclesInt = 51;
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this.nOpCyclesInt3D = 1;
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this.nOpCyclesIntOD = 2;
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this.nOpCyclesIntOFall = 4;
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this.nOpCyclesIRet = 32;
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this.nOpCyclesJmp = 15;
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this.nOpCyclesJmpF = 15;
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this.nOpCyclesJmpC = 16;
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this.nOpCyclesJmpCFall = 4;
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this.nOpCyclesJmpWR = 11;
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this.nOpCyclesJmpWM = 18;
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this.nOpCyclesJmpDM = 24;
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this.nOpCyclesLAHF = 4; // LAHF, SAHF, MOV reg,imm
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this.nOpCyclesLEA = 2;
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this.nOpCyclesLS = 16; // LDS, LES
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this.nOpCyclesLoop = 17; // LOOP, LOOPNZ
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this.nOpCyclesLoopZ = 18; // LOOPZ, JCXZ
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this.nOpCyclesLoopNZ = 19; // LOOPNZ
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this.nOpCyclesLoopFall = 5; // LOOP
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this.nOpCyclesLoopZFall = 6; // LOOPZ, JCXZ
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this.nOpCyclesMovRR = 2;
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this.nOpCyclesMovRM = 8;
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this.nOpCyclesMovMR = 9;
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this.nOpCyclesMovRI = 10;
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this.nOpCyclesMovMI = 10;
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this.nOpCyclesMovAM = 10;
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this.nOpCyclesMovMA = 10;
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this.nOpCyclesDivBR = 80; // range of 80-90
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this.nOpCyclesDivWR = 144; // range of 144-162
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this.nOpCyclesDivBM = 86; // range of 86-96
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this.nOpCyclesDivWM = 154; // range of 154-172
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this.nOpCyclesIDivBR = 101; // range of 101-112
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this.nOpCyclesIDivWR = 165; // range of 165-184
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this.nOpCyclesIDivBM = 107; // range of 107-118
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this.nOpCyclesIDivWM = 171; // range of 171-190
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this.nOpCyclesMulBR = 70; // range of 70-77
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this.nOpCyclesMulWR = 113; // range of 113-118
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this.nOpCyclesMulBM = 76; // range of 76-83
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this.nOpCyclesMulWM = 124; // range of 124-139
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this.nOpCyclesIMulBR = 80; // range of 80-98
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this.nOpCyclesIMulWR = 128; // range of 128-154
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this.nOpCyclesIMulBM = 86; // range of 86-104
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this.nOpCyclesIMulWM = 134; // range of 134-160
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this.nOpCyclesNegR = 3; // NEG reg, NOT reg
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this.nOpCyclesNegM = 16; // NEG mem, NOT mem
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this.nOpCyclesOutP = 10;
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this.nOpCyclesOutDX = 8;
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this.nOpCyclesPopAll = 51; // N/A if 8086/8088, 51 if 80186, 83 if 80188 (TODO: Verify)
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this.nOpCyclesPopReg = 8;
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this.nOpCyclesPopMem = 17;
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this.nOpCyclesPushAll = 36; // N/A if 8086/8088, 36 if 80186, 68 if 80188 (TODO: Verify)
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this.nOpCyclesPushReg = 11; // NOTE: "The 8086 Book" claims this is 10, but it's an outlier....
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this.nOpCyclesPushMem = 16;
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this.nOpCyclesPushSeg = 10;
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this.nOpCyclesPrefix = 2;
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this.nOpCyclesCmpS = 18;
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this.nOpCyclesCmpSr0 = 9 - this.nOpCyclesPrefix;
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this.nOpCyclesCmpSrn = 17 - this.nOpCyclesPrefix;
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this.nOpCyclesLodS = 12;
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this.nOpCyclesLodSr0 = 9 - this.nOpCyclesPrefix;
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this.nOpCyclesLodSrn = 13 - this.nOpCyclesPrefix;
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this.nOpCyclesMovS = 18;
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this.nOpCyclesMovSr0 = 9 - this.nOpCyclesPrefix;
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this.nOpCyclesMovSrn = 17 - this.nOpCyclesPrefix;
|
||||
this.nOpCyclesScaS = 15;
|
||||
this.nOpCyclesScaSr0 = 9 - this.nOpCyclesPrefix;
|
||||
this.nOpCyclesScaSrn = 15 - this.nOpCyclesPrefix;
|
||||
this.nOpCyclesStoS = 11;
|
||||
this.nOpCyclesStoSr0 = 9 - this.nOpCyclesPrefix;
|
||||
this.nOpCyclesStoSrn = 10 - this.nOpCyclesPrefix;
|
||||
this.nOpCyclesRet = 8;
|
||||
this.nOpCyclesRetn = 12;
|
||||
this.nOpCyclesRetF = 18;
|
||||
this.nOpCyclesRetFn = 17;
|
||||
this.nOpCyclesShift1M = 15; // ROL/ROR/RCL/RCR/SHL/SHR/SAR reg,1
|
||||
this.nOpCyclesShiftCR = 8; // ROL/ROR/RCL/RCR/SHL/SHR/SAR reg,CL
|
||||
this.nOpCyclesShiftCM = 20; // ROL/ROR/RCL/RCR/SHL/SHR/SAR mem,CL
|
||||
this.nOpCyclesShiftCS = 2; // this is the left-shift value used to convert the count to the cycle cost
|
||||
this.nOpCyclesTestRR = 3;
|
||||
this.nOpCyclesTestRM = 9;
|
||||
this.nOpCyclesTestRI = 5;
|
||||
this.nOpCyclesTestMI = 11;
|
||||
this.nOpCyclesXchgRR = 4;
|
||||
this.nOpCyclesXchgRM = 17;
|
||||
this.nOpCyclesXLAT = 11;
|
||||
this.CYCLES = (this.model >= X86.MODEL_80286? X86CPU.CYCLES_80286 : X86CPU.CYCLES_8088);
|
||||
|
||||
this.aOps = X86OpXX.aOps.slice(); // make a copy of aOps before modifying it
|
||||
|
||||
|
|
@ -570,7 +686,6 @@ X86CPU.prototype.initProcessor = function()
|
|||
* opOUTSw, opENTER, and opLEAVE.
|
||||
*/
|
||||
this.nShiftCountMask = 0x1f; // on newer processors, all shift counts are MOD 32
|
||||
|
||||
this.aOps[0x0F] = X86Help.opInvalid;
|
||||
this.aOps[X86.OPCODE.PUSHA] = X86OpXX.opPUSHA;
|
||||
this.aOps[X86.OPCODE.POPA] = X86OpXX.opPOPA;
|
||||
|
|
@ -599,125 +714,9 @@ X86CPU.prototype.initProcessor = function()
|
|||
if (this.model >= X86.MODEL_80286) {
|
||||
this.PS_SET = X86.PS.BIT1; // on the 80286, only BIT1 of Processor Status (flags) is always set
|
||||
this.OPFLAG_NOINTR8086 = 0; // used with instructions that should *not* set NOINTR on an 80286 (eg, non-SS segment loads)
|
||||
|
||||
this.aOps[0x0F] = X86OpXX.op0F;
|
||||
this.aOps[X86.OPCODE.ARPL] = X86OpXX.opARPL;
|
||||
this.aOps[X86.OPCODE.PUSHSP]= X86OpXX.op286PUSHSP;
|
||||
|
||||
this.nWordCyclePenalty = 0;
|
||||
this.nEACyclesBase = 0;
|
||||
this.nEACyclesDisp = 0;
|
||||
this.nEACyclesBaseIndex = 0;
|
||||
this.nEACyclesBaseIndexExtra = 0;
|
||||
this.nEACyclesBaseDisp = 0;
|
||||
this.nEACyclesBaseIndexDisp = 1;
|
||||
this.nEACyclesBaseIndexDispExtra = 1;
|
||||
|
||||
this.nOpCyclesAAA = 3;
|
||||
this.nOpCyclesAAD = 14;
|
||||
this.nOpCyclesAAM = 16;
|
||||
this.nOpCyclesArithRR = 2;
|
||||
this.nOpCyclesArithRM = 7;
|
||||
this.nOpCyclesArithMR = 7;
|
||||
this.nOpCyclesArithMID = 0;
|
||||
this.nOpCyclesCall = 7; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesCallF = 13; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesCallWR = 7; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesCallWM = 11; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesCallDM = 16; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesCLI = 3;
|
||||
this.nOpCyclesCompareRM = 6;
|
||||
this.nOpCyclesCWD = 2;
|
||||
this.nOpCyclesBound = 13;
|
||||
this.nOpCyclesInP = 5;
|
||||
this.nOpCyclesInDX = 5;
|
||||
this.nOpCyclesIncR = 2;
|
||||
this.nOpCyclesIncM = 7;
|
||||
this.nOpCyclesInt = 23; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesInt3D = 0;
|
||||
this.nOpCyclesIntOD = 1;
|
||||
this.nOpCyclesIntOFall = 3;
|
||||
this.nOpCyclesIRet = 17; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesJmp = 7; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesJmpF = 11; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesJmpC = 7; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesJmpCFall = 3;
|
||||
this.nOpCyclesJmpWR = 7; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesJmpWM = 11; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesJmpDM = 15; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesLAHF = 2;
|
||||
this.nOpCyclesLEA = 3;
|
||||
this.nOpCyclesLS = 7;
|
||||
this.nOpCyclesLoop = 8; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesLoopZ = 8; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesLoopNZ = 8; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesLoopFall = 4;
|
||||
this.nOpCyclesLoopZFall = 4;
|
||||
this.nOpCyclesMovRR = 2; // this is actually the same as the 8086...
|
||||
this.nOpCyclesMovRM = 3;
|
||||
this.nOpCyclesMovMR = 5;
|
||||
this.nOpCyclesMovRI = 2;
|
||||
this.nOpCyclesMovMI = 3;
|
||||
this.nOpCyclesMovAM = 5; // this is actually slower than the MOD/RM form of MOV AX,mem (see nOpCyclesMovRM)
|
||||
this.nOpCyclesMovMA = 3;
|
||||
this.nOpCyclesDivBR = 14;
|
||||
this.nOpCyclesDivWR = 22;
|
||||
this.nOpCyclesDivBM = 17;
|
||||
this.nOpCyclesDivWM = 25;
|
||||
this.nOpCyclesIDivBR = 17;
|
||||
this.nOpCyclesIDivWR = 25;
|
||||
this.nOpCyclesIDivBM = 20;
|
||||
this.nOpCyclesIDivWM = 28;
|
||||
this.nOpCyclesMulBR = 13;
|
||||
this.nOpCyclesMulWR = 21;
|
||||
this.nOpCyclesMulBM = 16;
|
||||
this.nOpCyclesMulWM = 24;
|
||||
this.nOpCyclesIMulBR = 13;
|
||||
this.nOpCyclesIMulWR = 21;
|
||||
this.nOpCyclesIMulBM = 16;
|
||||
this.nOpCyclesIMulWM = 24;
|
||||
this.nOpCyclesNegR = 2;
|
||||
this.nOpCyclesNegM = 7;
|
||||
this.nOpCyclesOutP = 5;
|
||||
this.nOpCyclesOutDX = 5;
|
||||
this.nOpCyclesPopAll = 19;
|
||||
this.nOpCyclesPopReg = 5;
|
||||
this.nOpCyclesPopMem = 5;
|
||||
this.nOpCyclesPushAll = 17;
|
||||
this.nOpCyclesPushReg = 3;
|
||||
this.nOpCyclesPushMem = 5;
|
||||
this.nOpCyclesPushSeg = 3;
|
||||
this.nOpCyclesPrefix = 0;
|
||||
this.nOpCyclesCmpS = 8;
|
||||
this.nOpCyclesCmpSr0 = 5;
|
||||
this.nOpCyclesCmpSrn = 9;
|
||||
this.nOpCyclesLodS = 5;
|
||||
this.nOpCyclesLodSr0 = 5;
|
||||
this.nOpCyclesLodSrn = 4;
|
||||
this.nOpCyclesMovS = 5;
|
||||
this.nOpCyclesMovSr0 = 5;
|
||||
this.nOpCyclesMovSrn = 4;
|
||||
this.nOpCyclesScaS = 7;
|
||||
this.nOpCyclesScaSr0 = 5;
|
||||
this.nOpCyclesScaSrn = 8;
|
||||
this.nOpCyclesStoS = 3;
|
||||
this.nOpCyclesStoSr0 = 4;
|
||||
this.nOpCyclesStoSrn = 3;
|
||||
this.nOpCyclesRet = 11; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesRetn = 11; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesRetF = 15; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesRetFn = 15; // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||
this.nOpCyclesShift1M = 7;
|
||||
this.nOpCyclesShiftCR = 5;
|
||||
this.nOpCyclesShiftCM = 8;
|
||||
this.nOpCyclesShiftCS = 0;
|
||||
this.nOpCyclesTestRR = 2;
|
||||
this.nOpCyclesTestRM = 6;
|
||||
this.nOpCyclesTestRI = 3;
|
||||
this.nOpCyclesTestMI = 6;
|
||||
this.nOpCyclesXchgRR = 3;
|
||||
this.nOpCyclesXchgRM = 5;
|
||||
this.nOpCyclesXLAT = 5;
|
||||
}
|
||||
}
|
||||
};
|
||||
|
|
@ -1740,7 +1739,7 @@ X86CPU.prototype.getWord = function(addr)
|
|||
*
|
||||
* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
|
||||
*/
|
||||
this.nStepCycles -= this.nWordCyclePenalty;
|
||||
this.nStepCycles -= this.CYCLES.nWordCyclePenalty;
|
||||
if (off != this.blockLimit) {
|
||||
return this.aMemBlocks[iBlock].readWord(off);
|
||||
}
|
||||
|
|
@ -1775,7 +1774,7 @@ X86CPU.prototype.setWord = function(addr, w)
|
|||
*
|
||||
* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
|
||||
*/
|
||||
this.nStepCycles -= this.nWordCyclePenalty;
|
||||
this.nStepCycles -= this.CYCLES.nWordCyclePenalty;
|
||||
if (off != this.blockLimit) {
|
||||
this.aMemBlocks[iBlock].writeWord(off, w & 0xffff);
|
||||
return;
|
||||
|
|
|
|||
Loading…
Reference in a new issue