diff --git a/devices/pc8080/machine/exerciser/README.md b/devices/pc8080/machine/exerciser/README.md index db45c619d..9d84100e0 100644 --- a/devices/pc8080/machine/exerciser/README.md +++ b/devices/pc8080/machine/exerciser/README.md @@ -13,7 +13,7 @@ machines: 8080 Exerciser Test Machine --- -This is a test of [PC8080](/modules/pc8080/), a new 8080-based machine emulator being added to the +This is a test of [PC8080](/modules/pc8080/), a new 8080-based machine emulator recently added to the PCjs Project. The test machine below loads a copy of the diff --git a/modules/pc8080/lib/cpudef.js b/modules/pc8080/lib/cpudef.js index ec6dce7fa..d9117deff 100644 --- a/modules/pc8080/lib/cpudef.js +++ b/modules/pc8080/lib/cpudef.js @@ -71,7 +71,7 @@ var CPUDef = { SF: 0x0080, // bit 7: Sign flag ALL: 0x00D5, // all "arithmetic" flags (CF, PF, AF, ZF, SF) MASK: 0x00FF, // - IF: 0x0200 // bit 9: Interrupt flag (for internal use only) + IF: 0x0200 // bit 9: Interrupt flag (set if interrupts enabled; for internal use only) }, PARITY: [ // 256-byte array with a 1 wherever the number of set bits of the array index is EVEN 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, @@ -92,21 +92,21 @@ var CPUDef = { 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 ], /* - * Bit values for intFlags + * Interrupt-related flags (stored in intFlags) */ INTFLAG: { NONE: 0x00, INTL: 0x07, // last interrupt level requested INTR: 0x08, // set if interrupt has been requested - HALT: 0x10 // halt requested; see the HLT opcode + HALT: 0x10 // halt requested; see opHLT() }, /* * Opcode definitions */ OPCODE: { - HLT: 0x76, - ACI: 0xCE, // PS.ALL - CALL: 0xCD, + HLT: 0x76, // Halt + ACI: 0xCE, // Add with Carry Immediate (affects PS.ALL) + CALL: 0xCD, // Call RST0: 0xC7 // to be continued.... } diff --git a/modules/pc8080/lib/cpuops.js b/modules/pc8080/lib/cpuops.js index 684aac041..991e815e6 100644 --- a/modules/pc8080/lib/cpuops.js +++ b/modules/pc8080/lib/cpuops.js @@ -123,7 +123,7 @@ CPUDef.opRLC = function() { var carry = this.regA << 1; this.regA = (carry & 0xff) | (carry >> 8); - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | (carry & 0x100); + this.updateCF(carry & 0x100); this.nStepCycles -= 4; }; @@ -136,7 +136,7 @@ CPUDef.opDADB = function() { var w; this.setHL(w = this.getHL() + this.getBC()); - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | ((w >> 8) & 0x100); + this.updateCF((w >> 8) & 0x100); this.nStepCycles -= 10; }; @@ -204,7 +204,7 @@ CPUDef.opRRC = function() { var carry = (this.regA << 8) & 0x100; this.regA = (carry | this.regA) >> 1; - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | carry; + this.updateCF(carry); this.nStepCycles -= 4; }; @@ -282,8 +282,8 @@ CPUDef.opMVID = function() CPUDef.opRAL = function() { var carry = this.regA << 1; - this.regA = (carry & 0xff) | (this.resultZeroCarry >> 8); - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | (carry & 0x100); + this.regA = (carry & 0xff) | this.getCF(); + this.updateCF(carry & 0x100); this.nStepCycles -= 4; }; @@ -296,7 +296,7 @@ CPUDef.opDADD = function() { var w; this.setHL(w = this.getHL() + this.getDE()); - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | ((w >> 8) & 0x100); + this.updateCF((w >> 8) & 0x100); this.nStepCycles -= 10; }; @@ -362,9 +362,9 @@ CPUDef.opMVIE = function() */ CPUDef.opRAR = function() { - var carry = (this.regA << 8) & 0x100; - this.regA = ((this.resultZeroCarry & 0x100) | this.regA) >> 1; - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | carry; + var carry = (this.regA << 8); + this.regA = ((this.getCF() << 8) | this.regA) >> 1; + this.updateCF(carry & 0x100); this.nStepCycles -= 4; }; @@ -452,7 +452,7 @@ CPUDef.opDAA = function() CF = CPUDef.PS.CF; } this.regA = this.addByte(src); - this.updateCF(!!CF); + this.updateCF(CF? 0x100 : 0); this.nStepCycles -= 4; }; @@ -465,7 +465,7 @@ CPUDef.opDADH = function() { var w; this.setHL(w = this.getHL() + this.getHL()); - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | ((w >> 8) & 0x100); + this.updateCF((w >> 8) & 0x100); this.nStepCycles -= 10; }; @@ -623,7 +623,7 @@ CPUDef.opDADSP = function() { var w; this.setHL(w = this.getHL() + this.getSP()); - this.resultZeroCarry = (this.resultZeroCarry & 0xff) | ((w >> 8) & 0x100); + this.updateCF((w >> 8) & 0x100); this.nStepCycles -= 10; }; @@ -689,7 +689,7 @@ CPUDef.opMVIA = function() */ CPUDef.opCMC = function() { - this.updateCF(!this.getCF()); + this.updateCF(this.getCF()? 0 : 0x100); this.nStepCycles -= 4; }; diff --git a/modules/pc8080/lib/cpusim.js b/modules/pc8080/lib/cpusim.js index 60cd0c830..a2cae6adb 100644 --- a/modules/pc8080/lib/cpusim.js +++ b/modules/pc8080/lib/cpusim.js @@ -434,7 +434,7 @@ CPUSim.prototype.clearCF = function() * getCF() * * @this {CPUSim} - * @return {number} 0 or CPUDef.PS.CF + * @return {number} 0 or 1 (CPUDef.PS.CF) */ CPUSim.prototype.getCF = function() { @@ -452,18 +452,14 @@ CPUSim.prototype.setCF = function() }; /** - * updateCF(fCarry) + * updateCF(CF) * * @this {CPUSim} - * @param {boolean} fCarry + * @param {number} CF (0x000 or 0x100) */ -CPUSim.prototype.updateCF = function(fCarry) +CPUSim.prototype.updateCF = function(CF) { - if (fCarry) { - this.resultZeroCarry |= 0x100; - } else { - this.resultZeroCarry &= ~0x100; - } + this.resultZeroCarry = (this.resultZeroCarry & 0xff) | CF; }; /** @@ -528,21 +524,6 @@ CPUSim.prototype.setAF = function() this.resultAuxOverflow = (~this.resultParitySign & 0x10) | (this.resultAuxOverflow & ~0x10); }; -/** - * updateAF(fAuxCarry) - * - * @this {CPUSim} - * @param {boolean} fAuxCarry - */ -CPUSim.prototype.updateAF = function(fAuxCarry) -{ - if (fAuxCarry) { - this.setAF(); - } else { - this.clearAF(); - } -}; - /** * clearZF() *