Updated PC8080 and PDPjs to support RAM images, eliminating the need for the old "writable ROM" kludge; RAM images can include their own load and exec addresses as part of the JSON file, but the RAM component can provide explicit overrides (if no load address is specified either way, the default load address is the starting RAM address)
This commit is contained in:
Jeff Parsons
Jeff Parsons
parent
4cfaa5ef6e
commit
980c2ac5ab
64 changed files with 1479 additions and 1154 deletions
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@ -1,805 +0,0 @@
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;***********************************************************************
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; MICROCOSM ASSOCIATES 8080/8085 CPU DIAGNOSTIC VERSION 1.0 (C) 1980
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;***********************************************************************
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; Load into virtual altair with: ALTAIR L=TEST.HEX
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; Then press F2 to view screen, and 'G' to execute the test.
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;
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;DONATED TO THE "SIG/M" CP/M USER'S GROUP BY:
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;KELLY SMITH, MICROCOSM ASSOCIATES
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;3055 WACO AVENUE
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;SIMI VALLEY, CALIFORNIA, 93065
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;(805) 527-9321 (MODEM, CP/M-NET (TM))
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;(805) 527-0518 (VERBAL)
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;
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CPU 8080
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ORG 00100H
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LXI H, LOLZ
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CALL MSG
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JMP CPU ;JUMP TO 8080 CPU DIAGNOSTIC
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;
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LOLZ: DB "MICROCOSM ASSOCIATES 8080/8085 CPU DIAGNOSTIC VERSION 1.0 (C) 1980", 0dh, 0ah, 24h
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;
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BDOS EQU 00005H ;BDOS ENTRY TO CP/M
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WBOOT: JMP 0
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;
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;MESSAGE OUTPUT ROUTINE
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;
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MSG: MOV A,M ; Get data
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CPI '$' ; End?
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RZ
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CALL PCHAR ; Output
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INX H ; Next
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JMP MSG ; Do all
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;
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;
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;CHARACTER OUTPUT ROUTINE
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;
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PCHAR: PUSH PSW
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PUSH D
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PUSH H
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MOV E,A
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MVI C,2
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CALL BDOS
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POP H
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POP D
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POP PSW
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RET
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;
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;
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;
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BYTEO: PUSH PSW
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CALL BYTO1
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MOV E,A
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CALL PCHAR
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POP PSW
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CALL BYTO2
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MOV E,A
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JMP PCHAR
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BYTO1: RRC
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RRC
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RRC
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RRC
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BYTO2: ANI 0FH
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CPI 0AH
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JM BYTO3
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ADI 7
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BYTO3: ADI 30H
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RET
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;
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;
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;
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;************************************************************
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; MESSAGE TABLE FOR OPERATIONAL CPU TEST
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;************************************************************
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;
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OKCPU: DB 0DH,0AH
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DB "CPU IS OPERATIONAL$"
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;
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NGCPU: DB 0DH,0AH
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DB " CPU HAS FAILED! ERROR EXIT=$"
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;
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;
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;
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;************************************************************
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; 8080/8085 CPU TEST/DIAGNOSTIC
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;************************************************************
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;
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;NOTE: (1) PROGRAM ASSUMES "CALL",AND "LXI SP" INSTRUCTIONS WORK!
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;
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; (2) INSTRUCTIONS NOT TESTED ARE "HLT","DI","EI",
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; AND "RST 0" THRU "RST 7"
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;
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;
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;
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;TEST JUMP INSTRUCTIONS AND FLAGS
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;
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CPU: LXI SP,STACK ;SET THE STACK POINTER
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ANI 0 ;INITIALIZE A REG. AND CLEAR ALL FLAGS
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JZ J010 ;TEST "JZ"
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CALL CPUER
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J010: JNC J020 ;TEST "JNC"
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CALL CPUER
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J020: JPE J030 ;TEST "JPE"
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CALL CPUER
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J030: JP J040 ;TEST "JP"
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CALL CPUER
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J040: JNZ J050 ;TEST "JNZ"
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JC J050 ;TEST "JC"
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JPO J050 ;TEST "JPO"
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JM J050 ;TEST "JM"
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JMP J060 ;TEST "JMP" (IT'S A LITTLE LATE,BUT WHAT THE HELL!
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J050: CALL CPUER
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J060: ADI 6 ;A=6,C=0,P=1,S=0,Z=0
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JNZ J070 ;TEST "JNZ"
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CALL CPUER
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J070: JC J080 ;TEST "JC"
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JPO J080 ;TEST "JPO"
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JP J090 ;TEST "JP"
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J080: CALL CPUER
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J090: ADI 070H ;A=76H,C=0,P=0,S=0,Z=0
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JPO J100 ;TEST "JPO"
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CALL CPUER
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J100: JM J110 ;TEST "JM"
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JZ J110 ;TEST "JZ"
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JNC J120 ;TEST "JNC"
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J110: CALL CPUER
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J120: ADI 081H ;A=F7H,C=0,P=0,S=1,Z=0
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JM J130 ;TEST "JM"
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CALL CPUER
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J130: JZ J140 ;TEST "JZ"
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JC J140 ;TEST "JC"
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JPO J150 ;TEST "JPO"
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J140: CALL CPUER
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J150: ADI 0FEH ;A=F5H,C=1,P=1,S=1,Z=0
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JC J160 ;TEST "JC"
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CALL CPUER
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J160: JZ J170 ;TEST "JZ"
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JPO J170 ;TEST "JPO"
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JM AIMM ;TEST "JM"
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J170: CALL CPUER
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;
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;
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;
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;TEST ACCUMULATOR IMMEDIATE INSTRUCTIONS
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;
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AIMM: CPI 0 ;A=F5H,C=0,Z=0
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JC CPIE ;TEST "CPI" FOR RE-SET CARRY
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JZ CPIE ;TEST "CPI" FOR RE-SET ZERO
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CPI 0F5H ;A=F5H,C=0,Z=1
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JC CPIE ;TEST "CPI" FOR RE-SET CARRY ("ADI")
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JNZ CPIE ;TEST "CPI" FOR RE-SET ZERO
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CPI 0FFH ;A=F5H,C=1,Z=0
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JZ CPIE ;TEST "CPI" FOR RE-SET ZERO
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JC ACII ;TEST "CPI" FOR SET CARRY
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CPIE: CALL CPUER
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ACII: ACI 00AH ;A=F5H+0AH+CARRY(1)=0,C=1
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ACI 00AH ;A=0+0AH+CARRY(0)=0BH,C=0
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CPI 00BH
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JZ SUII ;TEST "ACI"
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CALL CPUER
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SUII: SUI 00CH ;A=FFH,C=0
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SUI 00FH ;A=F0H,C=1
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CPI 0F0H
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JZ SBII ;TEST "SUI"
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CALL CPUER
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SBII: SBI 0F1H ;A=F0H-0F1H-CARRY(0)=FFH,C=1
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SBI 00EH ;A=FFH-OEH-CARRY(1)=F0H,C=0
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CPI 0F0H
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JZ ANII ;TEST "SBI"
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CALL CPUER
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ANII: ANI 055H ;A=F0H<AND>55H=50H,C=0,P=1,S=0,Z=0
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CPI 050H
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JZ ORII ;TEST "ANI"
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CALL CPUER
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ORII: ORI 03AH ;A=50H<OR>3AH=7AH,C=0,P=0,S=0,Z=0
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CPI 07AH
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JZ XRII ;TEST "ORI"
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CALL CPUER
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XRII: XRI 00FH ;A=7AH<XOR>0FH=75H,C=0,P=0,S=0,Z=0
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CPI 075H
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JZ C010 ;TEST "XRI"
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CALL CPUER
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;
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;
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;
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;TEST CALLS AND RETURNS
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;
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C010: ANI 000H ;A=0,C=0,P=1,S=0,Z=1
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CC CPUER ;TEST "CC"
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CPO CPUER ;TEST "CPO"
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CM CPUER ;TEST "CM"
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CNZ CPUER ;TEST "CNZ"
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CPI 000H
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JZ C020 ;A=0,C=0,P=0,S=0,Z=1
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CALL CPUER
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C020: SUI 077H ;A=89H,C=1,P=0,S=1,Z=0
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CNC CPUER ;TEST "CNC"
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CPE CPUER ;TEST "CPE"
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CP CPUER ;TEST "CP"
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CZ CPUER ;TEST "CZ"
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CPI 089H
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JZ C030 ;TEST FOR "CALLS" TAKING BRANCH
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CALL CPUER
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C030: ANI 0FFH ;SET FLAGS BACK!
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CPO CPOI ;TEST "CPO"
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CPI 0D9H
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JZ MOVI ;TEST "CALL" SEQUENCE SUCCESS
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CALL CPUER
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CPOI: RPE ;TEST "RPE"
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ADI 010H ;A=99H,C=0,P=0,S=1,Z=0
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CPE CPEI ;TEST "CPE"
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ADI 002H ;A=D9H,C=0,P=0,S=1,Z=0
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RPO ;TEST "RPO"
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CALL CPUER
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CPEI: RPO ;TEST "RPO"
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ADI 020H ;A=B9H,C=0,P=0,S=1,Z=0
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CM CMI ;TEST "CM"
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ADI 004H ;A=D7H,C=0,P=1,S=1,Z=0
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RPE ;TEST "RPE"
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CALL CPUER
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CMI: RP ;TEST "RP"
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ADI 080H ;A=39H,C=1,P=1,S=0,Z=0
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CP TCPI ;TEST "CP"
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ADI 080H ;A=D3H,C=0,P=0,S=1,Z=0
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RM ;TEST "RM"
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CALL CPUER
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TCPI: RM ;TEST "RM"
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ADI 040H ;A=79H,C=0,P=0,S=0,Z=0
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CNC CNCI ;TEST "CNC"
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ADI 040H ;A=53H,C=0,P=1,S=0,Z=0
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RP ;TEST "RP"
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CALL CPUER
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CNCI: RC ;TEST "RC"
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ADI 08FH ;A=08H,C=1,P=0,S=0,Z=0
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CC CCI ;TEST "CC"
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SUI 002H ;A=13H,C=0,P=0,S=0,Z=0
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RNC ;TEST "RNC"
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CALL CPUER
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CCI: RNC ;TEST "RNC"
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ADI 0F7H ;A=FFH,C=0,P=1,S=1,Z=0
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CNZ CNZI ;TEST "CNZ"
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ADI 0FEH ;A=15H,C=1,P=0,S=0,Z=0
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RC ;TEST "RC"
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CALL CPUER
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CNZI: RZ ;TEST "RZ"
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ADI 001H ;A=00H,C=1,P=1,S=0,Z=1
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CZ CZI ;TEST "CZ"
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ADI 0D0H ;A=17H,C=1,P=1,S=0,Z=0
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RNZ ;TEST "RNZ"
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CALL CPUER
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CZI: RNZ ;TEST "RNZ"
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ADI 047H ;A=47H,C=0,P=1,S=0,Z=0
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CPI 047H ;A=47H,C=0,P=1,S=0,Z=1
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RZ ;TEST "RZ"
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CALL CPUER
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;
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;
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;
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;TEST "MOV","INR",AND "DCR" INSTRUCTIONS
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;
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MOVI: MVI A,077H
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INR A
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MOV B,A
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INR B
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MOV C,B
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DCR C
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MOV D,C
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MOV E,D
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MOV H,E
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MOV L,H
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MOV A,L ;TEST "MOV" A,L,H,E,D,C,B,A
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DCR A
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MOV C,A
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MOV E,C
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MOV L,E
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MOV B,L
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MOV D,B
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MOV H,D
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MOV A,H ;TEST "MOV" A,H,D,B,L,E,C,A
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MOV D,A
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INR D
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MOV L,D
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MOV C,L
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INR C
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MOV H,C
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MOV B,H
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DCR B
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MOV E,B
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MOV A,E ;TEST "MOV" A,E,B,H,C,L,D,A
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MOV E,A
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INR E
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MOV B,E
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MOV H,B
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INR H
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MOV C,H
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MOV L,C
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MOV D,L
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DCR D
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MOV A,D ;TEST "MOV" A,D,L,C,H,B,E,A
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MOV H,A
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DCR H
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MOV D,H
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MOV B,D
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MOV L,B
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INR L
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MOV E,L
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DCR E
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MOV C,E
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MOV A,C ;TEST "MOV" A,C,E,L,B,D,H,A
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MOV L,A
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DCR L
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MOV H,L
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MOV E,H
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MOV D,E
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MOV C,D
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MOV B,C
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MOV A,B
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CPI 077H
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CNZ CPUER ;TEST "MOV" A,B,C,D,E,H,L,A
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;
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;
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;
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;TEST ARITHMETIC AND LOGIC INSTRUCTIONS
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;
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XRA A
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MVI B,001H
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MVI C,003H
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MVI D,007H
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MVI E,00FH
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MVI H,01FH
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MVI L,03FH
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ADD B
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ADD C
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ADD D
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ADD E
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ADD H
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ADD L
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ADD A
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CPI 0F0H
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CNZ CPUER ;TEST "ADD" B,C,D,E,H,L,A
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SUB B
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SUB C
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SUB D
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SUB E
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SUB H
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SUB L
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CPI 078H
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CNZ CPUER ;TEST "SUB" B,C,D,E,H,L
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SUB A
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CNZ CPUER ;TEST "SUB" A
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MVI A,080H
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ADD A
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MVI B,001H
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MVI C,002H
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MVI D,003H
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MVI E,004H
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MVI H,005H
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MVI L,006H
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ADC B
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MVI B,080H
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ADD B
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ADD B
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ADC C
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ADD B
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ADD B
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ADC D
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ADD B
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ADD B
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ADC E
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ADD B
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ADD B
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ADC H
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ADD B
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ADD B
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ADC L
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ADD B
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ADD B
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ADC A
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CPI 037H
|
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CNZ CPUER ;TEST "ADC" B,C,D,E,H,L,A
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MVI A,080H
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ADD A
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MVI B,001H
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SBB B
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MVI B,0FFH
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ADD B
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SBB C
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||||
ADD B
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SBB D
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||||
ADD B
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||||
SBB E
|
||||
ADD B
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SBB H
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ADD B
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||||
SBB L
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CPI 0E0H
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CNZ CPUER ;TEST "SBB" B,C,D,E,H,L
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MVI A,080H
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ADD A
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SBB A
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CPI 0FFH
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||||
CNZ CPUER ;TEST "SBB" A
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||||
MVI A,0FFH
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MVI B,0FEH
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MVI C,0FCH
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||||
MVI D,0EFH
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||||
MVI E,07FH
|
||||
MVI H,0F4H
|
||||
MVI L,0BFH
|
||||
ANA A
|
||||
ANA C
|
||||
ANA D
|
||||
ANA E
|
||||
ANA H
|
||||
ANA L
|
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ANA A
|
||||
CPI 024H
|
||||
CNZ CPUER ;TEST "ANA" B,C,D,E,H,L,A
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XRA A
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MVI B,001H
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||||
MVI C,002H
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||||
MVI D,004H
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||||
MVI E,008H
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||||
MVI H,010H
|
||||
MVI L,020H
|
||||
ORA B
|
||||
ORA C
|
||||
ORA D
|
||||
ORA E
|
||||
ORA H
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||||
ORA L
|
||||
ORA A
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CPI 03FH
|
||||
CNZ CPUER ;TEST "ORA" B,C,D,E,H,L,A
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MVI A,000H
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||||
MVI H,08FH
|
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MVI L,04FH
|
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XRA B
|
||||
XRA C
|
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XRA D
|
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XRA E
|
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XRA H
|
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XRA L
|
||||
CPI 0CFH
|
||||
CNZ CPUER ;TEST "XRA" B,C,D,E,H,L
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XRA A
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||||
CNZ CPUER ;TEST "XRA" A
|
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MVI B,044H
|
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MVI C,045H
|
||||
MVI D,046H
|
||||
MVI E,047H
|
||||
MVI H,(TEMP0/0FFH) ;HIGH BYTE OF TEST MEMORY LOCATION
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MVI L,(TEMP0&0FFH) ;LOW BYTE OF TEST MEMORY LOCATION
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MOV M,B
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MVI B,000H
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MOV B,M
|
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MVI A,044H
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CMP B
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CNZ CPUER ;TEST "MOV" M,B AND B,M
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MOV M,D
|
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MVI D,000H
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MOV D,M
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MVI A,046H
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||||
CMP D
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||||
CNZ CPUER ;TEST "MOV" M,D AND D,M
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MOV M,E
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MVI E,000H
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MOV E,M
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MVI A,047H
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CMP E
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CNZ CPUER ;TEST "MOV" M,E AND E,M
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||||
MOV M,H
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MVI H,(TEMP0/0FFH)
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MVI L,(TEMP0&0FFH)
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MOV H,M
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MVI A,(TEMP0/0FFH)
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CMP H
|
||||
CNZ CPUER ;TEST "MOV" M,H AND H,M
|
||||
MOV M,L
|
||||
MVI H,(TEMP0/0FFH)
|
||||
MVI L,(TEMP0&0FFH)
|
||||
MOV L,M
|
||||
MVI A,(TEMP0&0FFH)
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "MOV" M,L AND L,M
|
||||
MVI H,(TEMP0/0FFH)
|
||||
MVI L,(TEMP0&0FFH)
|
||||
MVI A,032H
|
||||
MOV M,A
|
||||
CMP M
|
||||
CNZ CPUER ;TEST "MOV" M,A
|
||||
ADD M
|
||||
CPI 064H
|
||||
CNZ CPUER ;TEST "ADD" M
|
||||
XRA A
|
||||
MOV A,M
|
||||
CPI 032H
|
||||
CNZ CPUER ;TEST "MOV" A,M
|
||||
MVI H,(TEMP0/0FFH)
|
||||
MVI L,(TEMP0&0FFH)
|
||||
MOV A,M
|
||||
SUB M
|
||||
CNZ CPUER ;TEST "SUB" M
|
||||
MVI A,080H
|
||||
ADD A
|
||||
ADC M
|
||||
CPI 033H
|
||||
CNZ CPUER ;TEST "ADC" M
|
||||
MVI A,080H
|
||||
ADD A
|
||||
SBB M
|
||||
CPI 0CDH
|
||||
CNZ CPUER ;TEST "SBB" M
|
||||
ANA M
|
||||
CNZ CPUER ;TEST "ANA" M
|
||||
MVI A,025H
|
||||
ORA M
|
||||
CPI 037H
|
||||
CNZ CPUER ;TEST "ORA" M
|
||||
XRA M
|
||||
CPI 005H
|
||||
CNZ CPUER ;TEST "XRA" M
|
||||
MVI M,055H
|
||||
INR M
|
||||
DCR M
|
||||
ADD M
|
||||
CPI 05AH
|
||||
CNZ CPUER ;TEST "INR","DCR",AND "MVI" M
|
||||
LXI B,12FFH
|
||||
LXI D,12FFH
|
||||
LXI H,12FFH
|
||||
INX B
|
||||
INX D
|
||||
INX H
|
||||
MVI A,013H
|
||||
CMP B
|
||||
CNZ CPUER ;TEST "LXI" AND "INX" B
|
||||
CMP D
|
||||
CNZ CPUER ;TEST "LXI" AND "INX" D
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "LXI" AND "INX" H
|
||||
MVI A,000H
|
||||
CMP C
|
||||
CNZ CPUER ;TEST "LXI" AND "INX" B
|
||||
CMP E
|
||||
CNZ CPUER ;TEST "LXI" AND "INX" D
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "LXI" AND "INX" H
|
||||
DCX B
|
||||
DCX D
|
||||
DCX H
|
||||
MVI A,012H
|
||||
CMP B
|
||||
CNZ CPUER ;TEST "DCX" B
|
||||
CMP D
|
||||
CNZ CPUER ;TEST "DCX" D
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "DCX" H
|
||||
MVI A,0FFH
|
||||
CMP C
|
||||
CNZ CPUER ;TEST "DCX" B
|
||||
CMP E
|
||||
CNZ CPUER ;TEST "DCX" D
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "DCX" H
|
||||
STA TEMP0
|
||||
XRA A
|
||||
LDA TEMP0
|
||||
CPI 0FFH
|
||||
CNZ CPUER ;TEST "LDA" AND "STA"
|
||||
LHLD TEMPP
|
||||
SHLD TEMP0
|
||||
LDA TEMPP
|
||||
MOV B,A
|
||||
LDA TEMP0
|
||||
CMP B
|
||||
CNZ CPUER ;TEST "LHLD" AND "SHLD"
|
||||
LDA TEMPP+1
|
||||
MOV B,A
|
||||
LDA TEMP0+1
|
||||
CMP B
|
||||
CNZ CPUER ;TEST "LHLD" AND "SHLD"
|
||||
MVI A,0AAH
|
||||
STA TEMP0
|
||||
MOV B,H
|
||||
MOV C,L
|
||||
XRA A
|
||||
LDAX B
|
||||
CPI 0AAH
|
||||
CNZ CPUER ;TEST "LDAX" B
|
||||
INR A
|
||||
STAX B
|
||||
LDA TEMP0
|
||||
CPI 0ABH
|
||||
CNZ CPUER ;TEST "STAX" B
|
||||
MVI A,077H
|
||||
STA TEMP0
|
||||
LHLD TEMPP
|
||||
LXI D,00000H
|
||||
XCHG
|
||||
XRA A
|
||||
LDAX D
|
||||
CPI 077H
|
||||
CNZ CPUER ;TEST "LDAX" D AND "XCHG"
|
||||
XRA A
|
||||
ADD H
|
||||
ADD L
|
||||
CNZ CPUER ;TEST "XCHG"
|
||||
MVI A,0CCH
|
||||
STAX D
|
||||
LDA TEMP0
|
||||
CPI 0CCH
|
||||
STAX D
|
||||
LDA TEMP0
|
||||
CPI 0CCH
|
||||
CNZ CPUER ;TEST "STAX" D
|
||||
LXI H,07777H
|
||||
DAD H
|
||||
MVI A,0EEH
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "DAD" H
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "DAD" H
|
||||
LXI H,05555H
|
||||
LXI B,0FFFFH
|
||||
DAD B
|
||||
MVI A,055H
|
||||
CNC CPUER ;TEST "DAD" B
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "DAD" B
|
||||
MVI A,054H
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "DAD" B
|
||||
LXI H,0AAAAH
|
||||
LXI D,03333H
|
||||
DAD D
|
||||
MVI A,0DDH
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "DAD" D
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "DAD" B
|
||||
STC
|
||||
CNC CPUER ;TEST "STC"
|
||||
CMC
|
||||
CC CPUER ;TEST "CMC
|
||||
MVI A,0AAH
|
||||
CMA
|
||||
CPI 055H
|
||||
CNZ CPUER ;TEST "CMA"
|
||||
ORA A ;RE-SET AUXILIARY CARRY
|
||||
DAA
|
||||
CPI 055H
|
||||
CNZ CPUER ;TEST "DAA"
|
||||
MVI A,088H
|
||||
ADD A
|
||||
DAA
|
||||
CPI 076H
|
||||
CNZ CPUER ;TEST "DAA"
|
||||
XRA A
|
||||
MVI A,0AAH
|
||||
DAA
|
||||
CNC CPUER ;TEST "DAA"
|
||||
CPI 010H
|
||||
CNZ CPUER ;TEST "DAA"
|
||||
XRA A
|
||||
MVI A,09AH
|
||||
DAA
|
||||
CNC CPUER ;TEST "DAA"
|
||||
CNZ CPUER ;TEST "DAA"
|
||||
STC
|
||||
MVI A,042H
|
||||
RLC
|
||||
CC CPUER ;TEST "RLC" FOR RE-SET CARRY
|
||||
RLC
|
||||
CNC CPUER ;TEST "RLC" FOR SET CARRY
|
||||
CPI 009H
|
||||
CNZ CPUER ;TEST "RLC" FOR ROTATION
|
||||
RRC
|
||||
CNC CPUER ;TEST "RRC" FOR SET CARRY
|
||||
RRC
|
||||
CPI 042H
|
||||
CNZ CPUER ;TEST "RRC" FOR ROTATION
|
||||
RAL
|
||||
RAL
|
||||
CNC CPUER ;TEST "RAL" FOR SET CARRY
|
||||
CPI 008H
|
||||
CNZ CPUER ;TEST "RAL" FOR ROTATION
|
||||
RAR
|
||||
RAR
|
||||
CC CPUER ;TEST "RAR" FOR RE-SET CARRY
|
||||
CPI 002H
|
||||
CNZ CPUER ;TEST "RAR" FOR ROTATION
|
||||
LXI B,01234H
|
||||
LXI D,0AAAAH
|
||||
LXI H,05555H
|
||||
XRA A
|
||||
PUSH B
|
||||
PUSH D
|
||||
PUSH H
|
||||
PUSH PSW
|
||||
LXI B,00000H
|
||||
LXI D,00000H
|
||||
LXI H,00000H
|
||||
MVI A,0C0H
|
||||
ADI 0F0H
|
||||
POP PSW
|
||||
POP H
|
||||
POP D
|
||||
POP B
|
||||
CC CPUER ;TEST "PUSH PSW" AND "POP PSW"
|
||||
CNZ CPUER ;TEST "PUSH PSW" AND "POP PSW"
|
||||
CPO CPUER ;TEST "PUSH PSW" AND "POP PSW"
|
||||
CM CPUER ;TEST "PUSH PSW" AND "POP PSW"
|
||||
MVI A,012H
|
||||
CMP B
|
||||
CNZ CPUER ;TEST "PUSH B" AND "POP B"
|
||||
MVI A,034H
|
||||
CMP C
|
||||
CNZ CPUER ;TEST "PUSH B" AND "POP B"
|
||||
MVI A,0AAH
|
||||
CMP D
|
||||
CNZ CPUER ;TEST "PUSH D" AND "POP D"
|
||||
CMP E
|
||||
CNZ CPUER ;TEST "PUSH D" AND "POP D"
|
||||
MVI A,055H
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "PUSH H" AND "POP H"
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "PUSH H" AND "POP H"
|
||||
LXI H,00000H
|
||||
DAD SP
|
||||
SHLD SAVSTK ;SAVE THE "OLD" STACK-POINTER!
|
||||
LXI SP,TEMP4
|
||||
DCX SP
|
||||
DCX SP
|
||||
INX SP
|
||||
DCX SP
|
||||
MVI A,055H
|
||||
STA TEMP2
|
||||
CMA
|
||||
STA TEMP3
|
||||
POP B
|
||||
CMP B
|
||||
CNZ CPUER ;TEST "LXI","DAD","INX",AND "DCX" SP
|
||||
CMA
|
||||
CMP C
|
||||
CNZ CPUER ;TEST "LXI","DAD","INX", AND "DCX" SP
|
||||
LXI H,TEMP4
|
||||
SPHL
|
||||
LXI H,07733H
|
||||
DCX SP
|
||||
DCX SP
|
||||
XTHL
|
||||
LDA TEMP3
|
||||
CPI 077H
|
||||
CNZ CPUER ;TEST "SPHL" AND "XTHL"
|
||||
LDA TEMP2
|
||||
CPI 033H
|
||||
CNZ CPUER ;TEST "SPHL" AND "XTHL"
|
||||
MVI A,055H
|
||||
CMP L
|
||||
CNZ CPUER ;TEST "SPHL" AND "XTHL"
|
||||
CMA
|
||||
CMP H
|
||||
CNZ CPUER ;TEST "SPHL" AND "XTHL"
|
||||
LHLD SAVSTK ;RESTORE THE "OLD" STACK-POINTER
|
||||
SPHL
|
||||
LXI H,CPUOK
|
||||
PCHL ;TEST "PCHL"
|
||||
;
|
||||
;
|
||||
;
|
||||
CPUER: LXI H,NGCPU ;OUTPUT "CPU HAS FAILED ERROR EXIT=" TO CONSOLE
|
||||
CALL MSG
|
||||
XTHL
|
||||
MOV A,H
|
||||
CALL BYTEO ;SHOW ERROR EXIT ADDRESS HIGH BYTE
|
||||
MOV A,L
|
||||
CALL BYTEO ;SHOW ERROR EXIT ADDRESS LOW BYTE
|
||||
JMP WBOOT ;EXIT TO CP/M WARM BOOT
|
||||
;
|
||||
;
|
||||
;
|
||||
CPUOK: LXI H,OKCPU ;OUTPUT "CPU IS OPERATIONAL" TO CONSOLE
|
||||
CALL MSG
|
||||
JMP WBOOT ;EXIT TO CP/M WARM BOOT
|
||||
;
|
||||
;
|
||||
;
|
||||
TEMPP: DW TEMP0 ;POINTER USED TO TEST "LHLD","SHLD",
|
||||
; AND "LDAX" INSTRUCTIONS
|
||||
;
|
||||
TEMP0: DS 1 ;TEMPORARY STORAGE FOR CPU TEST MEMORY LOCATIONS
|
||||
TEMP1: DS 1 ;TEMPORARY STORAGE FOR CPU TEST MEMORY LOCATIONS
|
||||
TEMP2 DS 1 ;TEMPORARY STORAGE FOR CPU TEST MEMORY LOCATIONS
|
||||
TEMP3: DS 1 ;TEMPORARY STORAGE FOR CPU TEST MEMORY LOCATIONS
|
||||
TEMP4: DS 1 ;TEMPORARY STORAGE FOR CPU TEST MEMORY LOCATIONS
|
||||
SAVSTK: DS 2 ;TEMPORARY STACK-POINTER STORAGE LOCATION
|
||||
;
|
||||
;
|
||||
;
|
||||
STACK EQU TEMPP+256 ;DE-BUG STACK POINTER STORAGE AREA
|
||||
;
|
||||
END
|
||||
|
||||
Loading…
Reference in a new issue