Fixed ECX corruption in LOOP instructions
This commit is contained in:
parent
9127b18fd5
commit
8c945bac17
8 changed files with 2085 additions and 1978 deletions
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@ -65,9 +65,9 @@ X86.fnADCb = function ADCb(dst, src)
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X86.fnADCw = function ADCw(dst, src)
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{
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var w = (dst + src + this.getCarry())|0;
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this.setArithResult(dst, src, w, this.dataType | X86.RESULT.ALL);
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this.setArithResult(dst, src, w, this.typeData | X86.RESULT.ALL);
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this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
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return w & this.dataMask;
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return w & this.maskData;
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};
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/**
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@ -97,9 +97,9 @@ X86.fnADDb = function ADDb(dst, src)
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X86.fnADDw = function ADDw(dst, src)
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{
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var w = (dst + src)|0;
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this.setArithResult(dst, src, w, this.dataType | X86.RESULT.ALL);
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this.setArithResult(dst, src, w, this.typeData | X86.RESULT.ALL);
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this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
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return w & this.dataMask;
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return w & this.maskData;
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};
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/**
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@ -129,7 +129,7 @@ X86.fnANDb = function ANDb(dst, src)
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X86.fnANDw = function ANDw(dst, src)
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{
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this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
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return this.setLogicResult(dst & src, this.dataType);
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return this.setLogicResult(dst & src, this.typeData);
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};
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/**
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@ -196,8 +196,8 @@ X86.fnBOUND = function BOUND(dst, src)
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*/
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var wIndex = dst;
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var wLower = this.getWord(this.regEA);
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var wUpper = this.getWord(this.regEA + this.dataSize);
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if (this.dataSize == 2) {
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var wUpper = this.getWord(this.regEA + this.sizeData);
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if (this.sizeData == 2) {
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wIndex = (dst << 16) >> 16;
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wLower = (wLower << 16) >> 16;
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wUpper = (wUpper << 16) >> 16;
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@ -239,7 +239,7 @@ X86.fnBSF = function BSF(dst, src)
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} else {
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this.clearZF();
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var bit = 0x1;
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while (bit & this.dataMask) {
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while (bit & this.maskData) {
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if (src & bit) {
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dst = n;
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break;
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@ -274,7 +274,7 @@ X86.fnBSR = function BSR(dst, src)
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this.setZF();
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} else {
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this.clearZF();
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var i = (this.dataSize == 2? 15 : 31), bit = 1 << i;
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var i = (this.sizeData == 2? 15 : 31), bit = 1 << i;
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while (bit) {
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if (src & bit) {
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dst = i;
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@ -403,7 +403,7 @@ X86.fnCALLFdw = function CALLFdw(dst, src)
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if (this.regEA === X86.ADDR_INVALID) {
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return X86.fnGRPUndefined.call(this, dst, src);
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}
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X86.fnCALLF.call(this, dst, this.getShort(this.regEA + this.dataSize));
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X86.fnCALLF.call(this, dst, this.getShort(this.regEA + this.sizeData));
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this.nStepCycles -= this.cycleCounts.nOpCyclesCallDM;
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this.opFlags |= X86.OPFLAG.NOWRITE;
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return dst;
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@ -437,7 +437,7 @@ X86.fnCMPb = function CMPb(dst, src)
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X86.fnCMPw = function CMPw(dst, src)
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{
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var w = (dst - src)|0;
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this.setArithResult(dst, src, w, this.dataType | X86.RESULT.ALL, true);
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this.setArithResult(dst, src, w, this.typeData | X86.RESULT.ALL, true);
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this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesCompareRM) : this.cycleCounts.nOpCyclesArithRM);
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this.opFlags |= X86.OPFLAG.NOWRITE;
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return dst;
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@ -469,9 +469,9 @@ X86.fnDECb = function DECb(dst, src)
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X86.fnDECr = function DECr(w)
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{
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var result = (w - 1)|0;
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this.setArithResult(w, 1, result, this.dataType | X86.RESULT.NOTCF, true);
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this.setArithResult(w, 1, result, this.typeData | X86.RESULT.NOTCF, true);
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this.nStepCycles -= 2; // the register form of DEC takes 2 cycles on all CPUs
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return (w & ~this.dataMask) | (result & this.dataMask);
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return (w & ~this.maskData) | (result & this.maskData);
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};
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/**
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@ -485,9 +485,9 @@ X86.fnDECr = function DECr(w)
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X86.fnDECw = function DECw(dst, src)
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{
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var w = (dst - 1)|0;
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this.setArithResult(dst, 1, w, this.dataType | X86.RESULT.NOTCF, true);
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this.setArithResult(dst, 1, w, this.typeData | X86.RESULT.NOTCF, true);
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this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIncR : this.cycleCounts.nOpCyclesIncM);
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return w & this.dataMask;
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return w & this.maskData;
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};
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/**
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@ -700,7 +700,7 @@ X86.fnDIVb = function DIVb(dst, src)
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*/
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X86.fnDIVw = function DIVw(dst, src)
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{
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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/*
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* Detect zero divisor
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*/
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@ -742,7 +742,7 @@ X86.fnDIVw = function DIVw(dst, src)
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* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
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*/
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if (DEBUG && DEBUGGER) {
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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this.traceLog('DIVw', src, dst, null, this.getPS(), this.regMDLo | (this.regMDHi << 16));
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} else {
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this.traceLog('DIVd', src, dst, null, this.getPS(), this.regMDLo, this.regMDHi);
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@ -829,7 +829,7 @@ X86.fnIDIVb = function IDIVb(dst, src)
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*/
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X86.fnIDIVw = function IDIVw(dst, src)
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{
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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/*
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* Detect zero divisor
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*/
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@ -879,7 +879,7 @@ X86.fnIDIVw = function IDIVw(dst, src)
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* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
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*/
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if (DEBUG && DEBUGGER) {
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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this.traceLog('IDIVw', src, dst, null, this.getPS(), this.regMDLo | (this.regMDHi << 16));
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} else {
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this.traceLog('IDIVd', src, dst, null, this.getPS(), this.regMDLo, this.regMDHi);
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@ -998,7 +998,7 @@ X86.fnIMULn = function IMULn(dst, src)
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{
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var fOverflow, result;
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dst = this.getIPWord();
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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result = (((src << 16) >> 16) * ((dst << 16) >> 16))|0;
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fOverflow = (result > 32767 || result < -32768);
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} else {
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@ -1013,7 +1013,7 @@ X86.fnIMULn = function IMULn(dst, src)
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this.clearCF(); this.clearOF();
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}
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result &= this.dataMask;
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result &= this.maskData;
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if (DEBUG && DEBUGGER) this.traceLog('IMULn', dst, src, null, this.getPS(), result);
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/*
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@ -1085,7 +1085,7 @@ X86.fnIMUL32 = function IMUL32(dst, src)
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X86.fnIMULw = function IMULw(dst, src)
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{
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var fOverflow;
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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src = this.regEAX & 0xffff;
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var result = (((src << 16) >> 16) * ((dst << 16) >> 16))|0;
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this.fMDSet = true;
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@ -1110,7 +1110,7 @@ X86.fnIMULw = function IMULw(dst, src)
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* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
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*/
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if (DEBUG && DEBUGGER) {
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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this.traceLog('IMULw', src, dst, null, this.getPS(), this.regMDLo | (this.regMDHi << 16));
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} else {
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this.traceLog('IMULd', src, dst, null, this.getPS(), this.regMDLo, this.regMDHi);
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@ -1189,9 +1189,9 @@ X86.fnINCb = function INCb(dst, src)
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X86.fnINCr = function INCr(w)
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{
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var result = (w + 1)|0;
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this.setArithResult(w, 1, result, this.dataType | X86.RESULT.NOTCF);
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this.setArithResult(w, 1, result, this.typeData | X86.RESULT.NOTCF);
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this.nStepCycles -= 2; // the register form of INC takes 2 cycles on all CPUs
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return (w & ~this.dataMask) | (result & this.dataMask);
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return (w & ~this.maskData) | (result & this.maskData);
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};
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/**
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@ -1205,9 +1205,9 @@ X86.fnINCr = function INCr(w)
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X86.fnINCw = function INCw(dst, src)
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{
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var w = (dst + 1)|0;
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this.setArithResult(dst, 1, w, this.dataType | X86.RESULT.NOTCF);
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this.setArithResult(dst, 1, w, this.typeData | X86.RESULT.NOTCF);
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this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIncR : this.cycleCounts.nOpCyclesIncM);
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return w & this.dataMask;
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return w & this.maskData;
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};
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/**
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@ -1360,7 +1360,7 @@ X86.fnJMPFdw = function JMPFdw(dst, src)
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if (this.regEA === X86.ADDR_INVALID) {
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return X86.fnGRPUndefined.call(this, dst, src);
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}
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this.setCSIP(dst, this.getShort(this.regEA + this.dataSize));
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this.setCSIP(dst, this.getShort(this.regEA + this.sizeData));
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if (MAXDEBUG && this.cIntReturn) this.checkIntReturn(this.regLIP);
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this.nStepCycles -= this.cycleCounts.nOpCyclesJmpDM;
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this.opFlags |= X86.OPFLAG.NOWRITE;
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@ -1390,7 +1390,7 @@ X86.fnLAR = function LAR(dst, src)
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if (this.segVER.dpl >= this.nCPL && this.segVER.dpl >= (src & X86.SEL.RPL)) {
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this.setZF();
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dst = this.segVER.acc & ~X86.DESC.ACC.BASE1623;
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if (this.dataSize > 2) {
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if (this.sizeData > 2) {
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dst |= ((this.segVER.ext & ~X86.DESC.EXT.BASE2431) << 16);
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}
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}
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@ -1452,7 +1452,7 @@ X86.fnLDS = function LDS(dst, src)
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X86.opUndefined.call(this);
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return dst;
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}
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this.setDS(this.getShort(this.regEA + this.dataSize));
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this.setDS(this.getShort(this.regEA + this.sizeData));
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this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
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return src;
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};
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@ -1498,7 +1498,7 @@ X86.fnLES = function LES(dst, src)
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X86.opUndefined.call(this);
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return dst;
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}
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this.setES(this.getShort(this.regEA + this.dataSize));
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this.setES(this.getShort(this.regEA + this.sizeData));
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this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
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return src;
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};
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@ -1517,7 +1517,7 @@ X86.fnLFS = function LFS(dst, src)
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X86.opUndefined.call(this);
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return dst;
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}
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this.setFS(this.getShort(this.regEA + this.dataSize));
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this.setFS(this.getShort(this.regEA + this.sizeData));
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this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
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return src;
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};
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@ -1552,7 +1552,7 @@ X86.fnLGDT = function LGDT(dst, src)
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* Hopefully it won't hurt to always fetch a 32-bit base address (even on an 80286), which we then
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* mask apppropriately.
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*/
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this.addrGDT = this.getLong(this.regEA + 2) & (this.dataMask | (this.dataMask << 8));
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this.addrGDT = this.getLong(this.regEA + 2) & (this.maskData | (this.maskData << 8));
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/*
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* An idiosyncrasy of our ModRM decoders is that, if the OPERAND size is 32 bits, then it will have
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* fetched a 32-bit dst operand; we mask off those extra bits now.
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@ -1579,7 +1579,7 @@ X86.fnLGS = function LGS(dst, src)
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X86.opUndefined.call(this);
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return dst;
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}
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this.setGS(this.getShort(this.regEA + this.dataSize));
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this.setGS(this.getShort(this.regEA + this.sizeData));
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this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
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return src;
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};
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@ -1614,7 +1614,7 @@ X86.fnLIDT = function LIDT(dst, src)
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* Hopefully it won't hurt to always fetch a 32-bit base address (even on an 80286), which we then
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* mask apppropriately.
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*/
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this.addrIDT = this.getLong(this.regEA + 2) & (this.dataMask | (this.dataMask << 8));
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this.addrIDT = this.getLong(this.regEA + 2) & (this.maskData | (this.maskData << 8));
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/*
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* An idiosyncrasy of our ModRM decoders is that, if the OPERAND size is 32 bits, then it will have
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* fetched a 32-bit dst operand; we mask off those extra bits now.
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@ -1715,7 +1715,7 @@ X86.fnLSS = function LSS(dst, src)
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X86.opUndefined.call(this);
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return dst;
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}
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this.setSS(this.getShort(this.regEA + this.dataSize));
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this.setSS(this.getShort(this.regEA + this.sizeData));
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this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
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return src;
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};
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@ -1881,7 +1881,7 @@ X86.fnMUL32 = function MUL32(dst, src)
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*/
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X86.fnMULw = function MULw(dst, src)
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{
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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src = this.regEAX & 0xffff;
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var result = (src * dst)|0;
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this.fMDSet = true;
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@ -1904,7 +1904,7 @@ X86.fnMULw = function MULw(dst, src)
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* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
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*/
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if (DEBUG && DEBUGGER) {
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if (this.dataSize == 2) {
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if (this.sizeData == 2) {
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this.traceLog('MULw', src, dst, null, this.getPS(), this.regMDLo | (this.regMDHi << 16));
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} else {
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this.traceLog('MULd', src, dst, null, this.getPS(), this.regMDLo, this.regMDHi);
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@ -1942,9 +1942,9 @@ X86.fnNEGb = function NEGb(dst, src)
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X86.fnNEGw = function NEGw(dst, src)
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{
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var w = (-dst)|0;
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this.setArithResult(0, dst, w, this.dataType | X86.RESULT.ALL, true);
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this.setArithResult(0, dst, w, this.typeData | X86.RESULT.ALL, true);
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this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesNegR : this.cycleCounts.nOpCyclesNegM);
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return w & this.dataMask;
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return w & this.maskData;
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};
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/**
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@ -1972,7 +1972,7 @@ X86.fnNOTb = function NOTb(dst, src)
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X86.fnNOTw = function NOTw(dst, src)
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{
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this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesNegR : this.cycleCounts.nOpCyclesNegM);
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return dst ^ this.dataMask;
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return dst ^ this.maskData;
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};
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/**
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@ -2000,7 +2000,7 @@ X86.fnORb = function ORb(dst, src)
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X86.fnORw = function ORw(dst, src)
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{
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this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
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return this.setLogicResult(dst | src, this.dataType);
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return this.setLogicResult(dst | src, this.typeData);
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};
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/**
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@ -2526,9 +2526,9 @@ X86.fnSBBb = function SBBb(dst, src)
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X86.fnSBBw = function SBBw(dst, src)
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{
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var w = (dst - src - this.getCarry())|0;
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this.setArithResult(dst, src, w, this.dataType | X86.RESULT.ALL, true);
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this.setArithResult(dst, src, w, this.typeData | X86.RESULT.ALL, true);
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this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
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return w & this.dataMask;
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return w & this.maskData;
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};
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/**
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@ -2816,7 +2816,7 @@ X86.fnSGDT = function SGDT(dst, src)
|
|||
addr |= (0xff000000|0);
|
||||
}
|
||||
else if (this.model >= X86.MODEL_80386) {
|
||||
if (this.dataSize == 2) {
|
||||
if (this.sizeData == 2) {
|
||||
addr &= 0x00ffffff;
|
||||
} else {
|
||||
dst |= (addr << 16);
|
||||
|
|
@ -3179,7 +3179,7 @@ X86.fnSIDT = function SIDT(dst, src)
|
|||
addr |= (0xff000000|0);
|
||||
}
|
||||
else if (this.model >= X86.MODEL_80386) {
|
||||
if (this.dataSize == 2) {
|
||||
if (this.sizeData == 2) {
|
||||
addr &= 0x00ffffff;
|
||||
} else {
|
||||
dst |= (addr << 16);
|
||||
|
|
@ -3266,9 +3266,9 @@ X86.fnSUBb = function SUBb(dst, src)
|
|||
X86.fnSUBw = function SUBw(dst, src)
|
||||
{
|
||||
var w = (dst - src)|0;
|
||||
this.setArithResult(dst, src, w, this.dataType | X86.RESULT.ALL, true);
|
||||
this.setArithResult(dst, src, w, this.typeData | X86.RESULT.ALL, true);
|
||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||
return w & this.dataMask;
|
||||
return w & this.maskData;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -3299,7 +3299,7 @@ X86.fnTESTib = function TESTib(dst, src)
|
|||
X86.fnTESTiw = function TESTiw(dst, src)
|
||||
{
|
||||
src = this.getIPWord();
|
||||
this.setLogicResult(dst & src, this.dataType);
|
||||
this.setLogicResult(dst & src, this.typeData);
|
||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesTestRI : this.cycleCounts.nOpCyclesTestMI);
|
||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||
return dst;
|
||||
|
|
@ -3331,7 +3331,7 @@ X86.fnTESTb = function TESTb(dst, src)
|
|||
*/
|
||||
X86.fnTESTw = function TESTw(dst, src)
|
||||
{
|
||||
this.setLogicResult(dst & src, this.dataType);
|
||||
this.setLogicResult(dst & src, this.typeData);
|
||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesTestRR : this.cycleCounts.nOpCyclesTestRM) : this.cycleCounts.nOpCyclesTestRM);
|
||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||
return dst;
|
||||
|
|
@ -3511,31 +3511,31 @@ X86.fnXCHGrw = function XCHGRw(dst, src)
|
|||
/*
|
||||
* Decode which register was src
|
||||
*/
|
||||
this.assert(!(dst & ~this.dataMask)); // confirm that dst contains only 16 or 32 bits
|
||||
this.assert(!(dst & ~this.maskData)); // confirm that dst contains only 16 or 32 bits
|
||||
switch (this.bModRM & 0x7) {
|
||||
case 0x0: // [E]AX
|
||||
this.regEAX = (this.regEAX & ~this.dataMask) | dst;
|
||||
this.regEAX = (this.regEAX & ~this.maskData) | dst;
|
||||
break;
|
||||
case 0x1: // [E]CX
|
||||
this.regECX = (this.regECX & ~this.dataMask) | dst;
|
||||
this.regECX = (this.regECX & ~this.maskData) | dst;
|
||||
break;
|
||||
case 0x2: // [E]DX
|
||||
this.regEDX = (this.regEDX & ~this.dataMask) | dst;
|
||||
this.regEDX = (this.regEDX & ~this.maskData) | dst;
|
||||
break;
|
||||
case 0x3: // [E]BX
|
||||
this.regEBX = (this.regEBX & ~this.dataMask) | dst;
|
||||
this.regEBX = (this.regEBX & ~this.maskData) | dst;
|
||||
break;
|
||||
case 0x4: // [E]SP
|
||||
this.setSP((this.getSP() & ~this.dataMask) | dst);
|
||||
this.setSP((this.getSP() & ~this.maskData) | dst);
|
||||
break;
|
||||
case 0x5: // [E]BP
|
||||
this.regEBP = (this.regEBX & ~this.dataMask) | dst;
|
||||
this.regEBP = (this.regEBX & ~this.maskData) | dst;
|
||||
break;
|
||||
case 0x6: // [E]SI
|
||||
this.regESI = (this.regESI & ~this.dataMask) | dst;
|
||||
this.regESI = (this.regESI & ~this.maskData) | dst;
|
||||
break;
|
||||
case 0x7: // [E]DI
|
||||
this.regEDI = (this.regEDI & ~this.dataMask) | dst;
|
||||
this.regEDI = (this.regEDI & ~this.maskData) | dst;
|
||||
break;
|
||||
default:
|
||||
break; // there IS no other case, but JavaScript inspections don't know that
|
||||
|
|
@ -3581,7 +3581,7 @@ X86.fnXORb = function XORb(dst, src)
|
|||
X86.fnXORw = function XORw(dst, src)
|
||||
{
|
||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||
return this.setLogicResult(dst ^ src, this.dataType);
|
||||
return this.setLogicResult(dst ^ src, this.typeData);
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -3734,7 +3734,7 @@ X86.fnFault = function(nFault, nError, fHalt, nCycles)
|
|||
*/
|
||||
this.setIP(this.opLIP - this.segCS.base);
|
||||
if (this.opLSP != X86.ADDR_INVALID) {
|
||||
this.setSP((this.regESP & ~this.segSS.addrMask) | (this.opLSP - this.segSS.base));
|
||||
this.setSP((this.regESP & ~this.segSS.maskAddr) | (this.opLSP - this.segSS.base));
|
||||
this.opLSP = X86.ADDR_INVALID;
|
||||
}
|
||||
fDispatch = true;
|
||||
|
|
|
|||
Loading…
Reference in a new issue