Allow the Debugger to step over "ADD [BX+SI],AL" in the rare case that it's valid
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Jeff Parsons
parent
6029f8ab9a
commit
8218e1a7da
2 changed files with 27 additions and 20 deletions
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@ -49,8 +49,8 @@ if (!I386) {
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/*
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* These are the original ModRM decoders, which were simpler and faster because they could treat all
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* word instructions as 16-bit, assume bits 16-31 of all registers were always zero, and use masking
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* constants instead of variables. If I386 is enabled, these decoders are not used, and the compiler
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* will eliminate them from the compiled code.
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* constants instead of variables. If I386 is enabled, these decoders are not used, and the Closure
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* Compiler will eliminate them from the compiled JavaScript code.
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*/
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if (NODE) {
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var X86ModB = require("./x86modb");
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@ -814,7 +814,7 @@ X86CPU.prototype.enablePageBlocks = function()
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* Note that since the incoming address (addr) is a linear address, we never need to mask it with nBusMask,
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* but all the intermediate (PDE, PTE) and final physical addresses we calculate should still be masked.
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*
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* Granted, nBusMask on a 32-bit bus is generally going to be 0xffffffff (-1), so making might seem like
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* Granted, nBusMask on a 32-bit bus is generally going to be 0xffffffff (-1), so masking might seem like
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* a waste of time; however, if we decide to once again rely on nBusMask for emulating A20 wrap-around
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* (instead of changing the physical memory map to alias the 2nd Mb to the 1st Mb), then performing
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* consistent masking will be important.
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@ -993,9 +993,9 @@ X86CPU.prototype.disablePageBlocks = function()
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* It is recommended that you add an interrupt handler to the 8086 software that is to be run on the 80286,
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* which will treat these interrupts as invalid operations.
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*
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* This additional software does not significantly effect the existing 8086 software because the interrupts
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* This additional software does not significantly effect [sic] the existing 8086 software because the interrupts
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* do not normally occur and should not already have been used since they are in the interrupt group reserved
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* by Intel. [Note to Intel: IBM caaaaaaan't hear you].
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* by Intel. [NOTE: IBM ignored Intel's admonishments.]
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*
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* 2. Do not Rely on 8086/8088 Instruction Clock Counts
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*
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@ -1035,7 +1035,7 @@ X86CPU.prototype.disablePageBlocks = function()
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* 8. Do not Rely on the Value Written by PUSH SP
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*
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* The 80286 will push a different value on the stack for PUSH SP than the 8086/8088. If the value pushed is
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* important [and when would it NOT be???], replace PUSH SP instructions with the following three instructions:
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* important [and when would it NOT be?], replace PUSH SP instructions with the following three instructions:
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*
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* PUSH BP
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* MOV BP,SP
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@ -1118,7 +1118,7 @@ X86CPU.prototype.initProcessor = function()
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* Instruction handlers that contain "hard-coded" 80286 cycle times include: opINSb, opINSw, opOUTSb,
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* opOUTSw, opENTER, and opLEAVE.
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*/
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this.aOps = X86.aOps.slice(); // make copies of aOps and others before modifying them
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this.aOps = X86.aOps.slice(); // make copies of opcode tables before modifying
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this.aOpGrp4b = X86.aOpGrp4b.slice();
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this.aOpGrp4w = X86.aOpGrp4w.slice();
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this.nShiftCountMask = 0x1f; // on newer processors, all shift counts are MOD 32
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@ -1326,8 +1326,8 @@ X86CPU.prototype.setReg = function(i, reg)
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* Similarly, regLSP mirrors the linear address corresponding to SS:SP, and therefore you must rely on getSP()
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* to read the current SP, and setSP() and setSS() to update SP and SS.
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*
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* The other segment registers, such as segDS and segES, have similar getters and setters, but they do not mirror
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* any segment:offset values in the same way that regLIP mirrors CS:IP, or that regLSP mirrors SS:SP.
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* The other segment registers, such as segDS and segES, have similar getters and setters, but we do not mirror
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* any other segment:offset values in the same way that regLIP mirrors CS:IP, or that regLSP mirrors SS:SP.
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*
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* @this {X86CPU}
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*/
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@ -1366,7 +1366,7 @@ X86CPU.prototype.resetRegs = function()
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*/
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this.regCR0 = X86.CR0.MSW.ON;
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this.addrIDT = 0; this.addrIDTLimit = 0x03FF;
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this.regPS = this.nIOPL = 0; // these should be set before the first setPS() call
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this.regPS = this.nIOPL = 0;// these should be set before the first setPS() call
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/*
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* Define all the result registers that can be used to "cache" arithmetic and logical flags.
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@ -1395,14 +1395,18 @@ X86CPU.prototype.resetRegs = function()
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/*
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* These are used to snapshot regLIP and regLSP, to help make instructions restartable;
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* currently opLIP is updated prior to every instruction, but opLSP is updated only for instructions
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* that read/write the stack (eg, RETF) and should otherwise remain set to X86.ADDR_INVALID.
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* that modify the stack pointer (eg, RETF) and should otherwise remain set to X86.ADDR_INVALID.
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*
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* More recently, opCS was added to selectively snapshot an instruction's original CS in case an
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* exception occurs accessing the stack after a new CS has been loaded, allowing the exception handler
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* to recover the old CS and make instructions like CALLF restartable; otherwise, opCS should remain -1.
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*/
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this.opCS = -1;
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this.opLIP = this.opLSP = X86.ADDR_INVALID;
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/*
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* Segment registers used to be defined as separate variables (eg, regCS and regCS0 stored the segment
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* number and base linear address, respectively), but segment registers are now defined as X86Seg objects.
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* Segment registers used to be defined as separate selector and base variables (eg, regCS and regCS0),
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* but now they are defined as X86Seg objects.
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*/
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this.segCS = new X86Seg(this, X86Seg.ID.CODE, "CS");
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this.segDS = new X86Seg(this, X86Seg.ID.DATA, "DS");
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@ -1455,8 +1459,8 @@ X86CPU.prototype.resetRegs = function()
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* (and too difficult in protected-mode) to merit the overhead. Ditto for SP, which can't really
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* be considered a general-purpose register.
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*
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* Every time getByte() is called, btMemLo is filled with the matching backtrack info; similarly,
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* every time getWord() is called, btMemLo and btMemHi are filled with the matching backtrack info
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* Every time getByte() is called, btiMem0 is filled with the matching backtrack info; similarly,
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* every time getWord() is called, btiMem0 and btiMem1 are filled with the matching backtrack info
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* for the low and high bytes, respectively.
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*/
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this.backTrack = {
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