Moved paging functions from Bus to CPU
This commit is contained in:
parent
2784934491
commit
73086a7ac8
6 changed files with 281 additions and 256 deletions
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@ -38,6 +38,7 @@ if (typeof module !== 'undefined') {
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var Component = require("../../shared/lib/component");
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var Messages = require("./messages");
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var Bus = require("./bus");
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var Memory = require("./memory");
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var State = require("./state");
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var CPU = require("./cpu");
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var X86 = require("./x86");
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@ -164,8 +165,9 @@ function X86CPU(parmsCPU)
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* We're just declaring aMemBlocks and associated Bus parameters here; they'll be initialized by initMemory()
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* when the Bus is initialized.
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*/
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this.aMemBlocks = [];
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this.busMask = this.blockShift = this.blockLimit = this.blockMask = 0;
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this.aBusBlocks = this.aMemBlocks = [];
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this.busMask = this.memMask = 0;
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this.blockShift = this.blockSize = this.blockLimit = this.blockTotal = this.blockMask = 0;
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if (SAMPLER) {
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/*
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@ -574,7 +576,7 @@ X86CPU.PREFETCH = {
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};
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/**
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* initMemory(aMemBlocks, busMask, blockShift, blockLimit, blockMask)
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* initMemory(aMemBlocks, blockShift)
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*
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* Notification from Bus.initMemory(), giving us direct access to the entire memory space
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* (aMemBlocks).
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@ -588,7 +590,7 @@ X86CPU.PREFETCH = {
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* ...
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* 7: [ -1, 0]
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*
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* where tag is the physical address of the byte that's been prefetched, and b is the
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* where tag is the linear address of the byte that's been prefetched, and b is the
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* value of the byte. N is currently 8 (PREFETCH.ARRAY), but it can be any power-of-two
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* that is equal to or greater than (PREFETCH.QUEUE), the effective size of the prefetch
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* queue (6 on an 8086, 4 on an 8088; currently hard-coded to the latter). All slots
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@ -618,15 +620,21 @@ X86CPU.PREFETCH = {
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* @this {X86CPU}
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* @param {Array} aMemBlocks
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* @param {number} blockShift
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* @param {number} blockLimit
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* @param {number} blockMask
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*/
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X86CPU.prototype.initMemory = function(aMemBlocks, blockShift, blockLimit, blockMask)
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X86CPU.prototype.initMemory = function(aMemBlocks, blockShift)
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{
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/*
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* aBusBlocks preserves the Bus block array for the life of the machine, whereas aMemBlocks
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* will be altered if/when the CPU enables paging. PAGEBLOCKS must be true when using Memory
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* blocks to simulate paging, ensuring that physical blocks and pages have the same size (4Kb).
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*/
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this.aBusBlocks = aMemBlocks;
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this.aMemBlocks = aMemBlocks;
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this.blockShift = blockShift;
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this.blockLimit = blockLimit;
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this.blockMask = blockMask;
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this.blockSize = 1 << this.blockShift;
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this.blockLimit = this.blockSize - 1;
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this.blockTotal = aMemBlocks.length;
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this.blockMask = this.blockTotal - 1;
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if (PREFETCH) {
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this.nBusCycles = 0;
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this.aPrefetch = new Array(X86CPU.PREFETCH.ARRAY);
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@ -640,14 +648,174 @@ X86CPU.prototype.initMemory = function(aMemBlocks, blockShift, blockLimit, block
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/**
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* setAddressMask(busMask)
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*
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* Notification from Bus.setA20(), called whenever the physical A20 line changes
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* Notification from Bus.initMemory() and Bus.setA20(); the latter calls us whenever the physical
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* A20 line changes (note that on a 20-bit bus machine, address lines A20 and higher are always zero).
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*
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* For 32-bit bus machines (eg, 80386), busMask is never changed after the initial call, because A20
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* wrap-around is simulated by changing the physical memory map rather than altering the A20 bit in busMask.
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*
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* We maintain memMask separate from busMask, because when paging is enabled on the 80386, the CPU memory
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* functions are now dealing with linear addresses rather than physical addresses, so it would be incorrect
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* to apply busMask to those addresses; memMask must remain 0xffffffff (-1) for the duration. If we change
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* how A20 is simulated on the 80386, then enablePageBlocks() and disablePageBlocks() will need to override
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* memMask appropriately.
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*
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* TODO: Ideally, we would eliminate masking altogether of 32-bit addresses, but that would require different
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* sets of memory access functions for different machines.
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*
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* @this {X86CPU}
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* @param {number} busMask
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*/
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X86CPU.prototype.setAddressMask = function(busMask)
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{
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this.busMask = busMask;
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this.busMask = this.memMask = busMask;
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};
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/**
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* enablePageBlocks()
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*
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* Whenever the CPU turns on paging and/or updates CR3, this function is called to update our copy
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* of the Bus block array, to simulate paging. Whenever the CPU turns paging off, disablePageBlocks()
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* must be called to restore our copy of the Bus block array to its original (physical) mapping.
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*
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* This also requires PAGEBLOCKS be enabled, ensuring that the Bus is configured with a 4Kb block size.
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*
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* The first time this function is called, aMemBlocks and aBusBlocks are identical, so aMemBlocks is
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* reinitialized with special UNPAGED Memory blocks that know how to perform page directory/page table
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* lookup and replace themselves with special PAGED Memory blocks that reference memory from the
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* appropriate block in aBusBlocks. A parallel array, aBlocksPaged, keeps track (by block number) of
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* which blocks have been PAGED, so that whenever CR3 is updated, those blocks can be UNPAGED again.
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*
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* @this {X86CPU}
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*/
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X86CPU.prototype.enablePageBlocks = function()
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{
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if (!PAGEBLOCKS) {
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this.setError("PAGEBLOCK support required");
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return;
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}
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if (this.aMemBlocks === this.aBusBlocks) {
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this.aMemBlocks = new Array(this.blockTotal);
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this.blockUnpaged = new Memory(null, 0, 0, Memory.TYPE.UNPAGED, null, this);
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for (var iBlock = 0; iBlock < this.blockTotal; iBlock++) {
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this.aMemBlocks[iBlock] = this.blockUnpaged;
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}
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} else {
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for (var i = 0; i < this.aBlocksPaged.length; i++) {
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this.aMemBlocks[this.aBlocksPaged[i]] = this.blockUnpaged;
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}
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}
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this.aBlocksPaged = [];
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};
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/**
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* mapPageBlock(addr, fWrite)
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*
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* Locate the corresponding physical PDE, PTE and memory blocks for the given linear address, and then
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* upgrade the block from an UNPAGED Memory block to a new PAGED Memory block; all future accesses to
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* the current page will go directly to that block, instead of coming here through the UNPAGED block
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* handlers.
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*
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* Note that since the incoming address (addr) is a linear address, we never need to mask it with busMask,
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* but all the intermediate (PDE, PTE) and final physical addresses we calculate should still be masked.
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*
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* Granted, busMask on a 32-bit bus is generally going to be 0xffffffff (-1), so making might seem like
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* a waste of time; however, if we decide to once again rely on busMask for emulating A20 wrap-around
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* (instead of changing the physical memory map to alias the 2nd Mb to the 1st Mb), then performing
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* consistent masking will be important.
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*
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* Also, addrPDE, addrPTE and addrPhys do not need any offsets added to them, because we immediately shift
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* the offset portion of those addresses out. But for now, at least for debugging and documentation purposes,
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* my preference is to perform full address calculations.
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*
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* Besides, this should not be a performance-critical function; it's normally called only once per UNPAGED
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* page. Obviously, if CR3 is constantly being updated, that will trigger repeated calls to enablePageBlocks(),
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* which will perform our equivalent of a TLB flush (ie, resetting all PAGED blocks back to UNPAGED blocks).
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* That would hurt our performance, but it would hurt performance on a real machine as well, so let's see
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* what real-world scenarios we run into.
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*
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* @this {X86CPU}
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* @param {number} addr is a linear address
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* @param {boolean} fWrite (true if called for a write, false if for a read)
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* @return {Memory|null}
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*/
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X86CPU.prototype.mapPageBlock = function(addr, fWrite)
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{
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var offPDE = (addr & X86.LADDR.PDE.MASK) >>> X86.LADDR.PDE.SHIFT;
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var addrPDE = this.regCR3 + offPDE;
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/*
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* bus.getLong(addrPDE) would be simpler, but setPhysBlock() needs to know blockPDE and offPDE, too.
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* TODO: Since we're immediately shifting addrPDE by blockShift, then we could also skip adding offPDE.
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*/
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var blockPDE = this.aBusBlocks[(addrPDE & this.busMask) >>> this.blockShift];
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var pde = blockPDE.readLong(offPDE);
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if (!(pde & X86.PTE.PRESENT)) {
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X86.fnPageFault.call(this, addr, false, fWrite);
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return null;
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}
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if (!(pde & X86.PTE.USER) && this.segCS.cpl == 3) {
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X86.fnPageFault.call(this, addr, true, fWrite);
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return null;
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}
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var offPTE = (addr & X86.LADDR.PTE.MASK) >>> X86.LADDR.PTE.SHIFT;
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var addrPTE = (pde & X86.PTE.FRAME) + offPTE;
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/*
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* bus.getLong(addrPTE) would be simpler, but setPhysBlock() needs to know blockPTE and offPTE, too.
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* TODO: Since we're immediately shifting addrPDE by blockShift, then we could also skip adding offPTE.
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*/
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var blockPTE = this.aBusBlocks[(addrPTE & this.busMask) >>> this.blockShift];
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var pte = blockPTE.readLong(offPTE);
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if (!(pte & X86.PTE.PRESENT)) {
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X86.fnPageFault.call(this, addr, false, fWrite);
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return null;
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}
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if (!(pte & X86.PTE.USER) && this.segCS.cpl == 3) {
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X86.fnPageFault.call(this, addr, true, fWrite);
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return null;
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}
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var addrPhys = (pte & X86.PTE.FRAME) + (addr & X86.LADDR.OFFSET);
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/*
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* TODO: Since we're immediately shifting addrPhys by blockShift, we could also skip adding the addr's offset.
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*/
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var blockPhys = this.aBusBlocks[(addrPhys & this.busMask) >>> this.blockShift];
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/*
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* So we have the block containing the physical memory corresponding to the given linear address.
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*
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* Now we can create a new PAGED Memory block and record the physical block info using setPhysBlock().
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*/
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var addrPage = addr & ~X86.LADDR.OFFSET;
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var blockPage = new Memory(addrPage, 0, this.blockSize, Memory.TYPE.PAGED);
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blockPage.setPhysBlock(blockPhys, blockPDE, offPDE, blockPTE, offPTE);
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var iBlock = addr >>> this.blockShift;
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this.aMemBlocks[iBlock] = blockPage;
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this.aBlocksPaged.push(iBlock);
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return blockPage;
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};
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/**
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* disablePageBlocks()
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*
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* Whenever the CPU turns off paging, this function restores the CPU's original aMemBlocks.
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*
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* @this {X86CPU}
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*/
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X86CPU.prototype.disablePageBlocks = function()
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{
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if (this.aMemBlocks != this.aBusBlocks) {
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this.aMemBlocks = this.aBusBlocks;
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this.blockUnpaged = null;
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this.aBlocksPaged = null;
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}
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};
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/**
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@ -1037,7 +1205,7 @@ X86CPU.prototype.resetRegs = function()
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/*
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* Segment registers used to be defined as separate variables (eg, regCS and regCS0 stored the segment
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* number and base physical address, respectively), but segment registers are now defined as X86Seg objects.
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* number and base linear address, respectively), but segment registers are now defined as X86Seg objects.
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*/
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this.segCS = new X86Seg(this, X86Seg.ID.CODE, "CS");
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this.segDS = new X86Seg(this, X86Seg.ID.DATA, "DS");
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@ -1337,7 +1505,7 @@ X86CPU.prototype.checkIntNotify = function(nInt)
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* another interrupt notification function is intercepting, so use it as an advisory value only.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @param {function(number)} fn is an interrupt-return notification function
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*/
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X86CPU.prototype.addIntReturn = function(addr, fn)
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@ -1363,7 +1531,7 @@ X86CPU.prototype.addIntReturn = function(addr, fn)
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* if the count is zero, for maximum performance.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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*/
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X86CPU.prototype.checkIntReturn = function(addr)
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{
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@ -1552,7 +1720,7 @@ X86CPU.prototype.getSeg = function(sName)
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return this.segNULL;
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default:
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/*
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* HACK: We return a fake segment register object in which only the base physical address is valid,
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* HACK: We return a fake segment register object in which only the base linear address is valid,
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* because that's all the caller provided (ie, we must be restoring from an older state).
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*/
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this.assert(typeof sName == "number");
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@ -2518,27 +2686,33 @@ X86CPU.prototype.setBinding = function(sHTMLType, sBinding, control)
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/**
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* getByte(addr)
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*
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* Use bus.getByte() for physical addresses, and cpu.getByte() for linear addresses; the latter takes care
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* of paging, cycle counts, and BACKTRACK states, if any.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @return {number} byte (8-bit) value at that address
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*/
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X86CPU.prototype.getByte = function getByte(addr)
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{
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if (BACKTRACK) this.backTrack.btiMemLo = this.bus.readBackTrack(addr);
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return this.aMemBlocks[(addr & this.busMask) >>> this.blockShift].readByte(addr & this.blockLimit, addr);
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return this.aMemBlocks[(addr & this.memMask) >>> this.blockShift].readByte(addr & this.blockLimit, addr);
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};
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/**
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* getShort(addr)
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*
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* Use bus.getShort() for physical addresses, and cpu.getShort() for linear addresses; the latter takes care
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* of paging, cycle counts, and BACKTRACK states, if any.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @return {number} word (16-bit) value at that address
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*/
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X86CPU.prototype.getShort = function getShort(addr)
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{
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var off = addr & this.blockLimit;
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var iBlock = (addr & this.busMask) >>> this.blockShift;
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var iBlock = (addr & this.memMask) >>> this.blockShift;
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/*
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* On the 8088, it takes 4 cycles to read the additional byte REGARDLESS whether the address is odd or even.
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* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
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@ -2558,14 +2732,17 @@ X86CPU.prototype.getShort = function getShort(addr)
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/**
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* getLong(addr)
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*
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* Use bus.getLong() for physical addresses, and cpu.getLong() for linear addresses; the latter takes care
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* of paging, cycle counts, and BACKTRACK states, if any.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @return {number} long (32-bit) value at that address
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*/
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X86CPU.prototype.getLong = function getLong(addr)
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{
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var off = addr & this.blockLimit;
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var iBlock = (addr & this.busMask) >>> this.blockShift;
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var iBlock = (addr & this.memMask) >>> this.blockShift;
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if (BACKTRACK) {
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this.backTrack.btiMemLo = this.bus.readBackTrack(addr);
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this.backTrack.btiMemHi = this.bus.readBackTrack(addr + 1);
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@ -2580,27 +2757,33 @@ X86CPU.prototype.getLong = function getLong(addr)
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/**
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* setByte(addr, b)
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*
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* Use bus.setByte() for physical addresses, and cpu.setByte() for linear addresses; the latter takes care
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* of paging, cycle counts, and BACKTRACK states, if any.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @param {number} b is the byte (8-bit) value to write (which we truncate to 8 bits; required by opSTOSb)
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*/
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X86CPU.prototype.setByte = function setByte(addr, b)
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{
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if (BACKTRACK) this.bus.writeBackTrack(addr, this.backTrack.btiMemLo);
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this.aMemBlocks[(addr & this.busMask) >>> this.blockShift].writeByte(addr & this.blockLimit, b & 0xff, addr);
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this.aMemBlocks[(addr & this.memMask) >>> this.blockShift].writeByte(addr & this.blockLimit, b & 0xff, addr);
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};
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/**
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* setShort(addr, w)
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*
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* Use bus.setShort() for physical addresses, and cpu.setShort() for linear addresses; the latter takes care
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* of paging, cycle counts, and BACKTRACK states, if any.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @param {number} w is the word (16-bit) value to write (which we truncate to 16 bits to be safe)
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*/
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X86CPU.prototype.setShort = function setShort(addr, w)
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{
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var off = addr & this.blockLimit;
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var iBlock = (addr & this.busMask) >>> this.blockShift;
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var iBlock = (addr & this.memMask) >>> this.blockShift;
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/*
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* On the 8088, it takes 4 cycles to write the additional byte REGARDLESS whether the address is odd or even.
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* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
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@ -2622,14 +2805,17 @@ X86CPU.prototype.setShort = function setShort(addr, w)
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/**
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* setLong(addr, l)
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*
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* Use bus.setLong() for physical addresses, and cpu.setLong() for linear addresses; the latter takes care
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* of paging, cycle counts, and BACKTRACK states, if any.
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*
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* @this {X86CPU}
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* @param {number} addr is a physical (non-segmented) address
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* @param {number} addr is a linear address
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* @param {number} l is the long (32-bit) value to write
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*/
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X86CPU.prototype.setLong = function setLong(addr, l)
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{
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var off = addr & this.blockLimit;
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var iBlock = (addr & this.busMask) >>> this.blockShift;
|
||||
var iBlock = (addr & this.memMask) >>> this.blockShift;
|
||||
this.nStepCycles -= this.cycleCounts.nWordCyclePenalty;
|
||||
|
||||
if (BACKTRACK) {
|
||||
|
|
@ -2931,7 +3117,7 @@ X86CPU.prototype.setSOWord = function(seg, off, w)
|
|||
* Return the next byte from the prefetch queue, prefetching it now if necessary.
|
||||
*
|
||||
* @this {X86CPU}
|
||||
* @param {number} addr is a physical (non-segmented) address
|
||||
* @param {number} addr is a linear address
|
||||
* @return {number} byte (8-bit) value at that address
|
||||
*/
|
||||
X86CPU.prototype.getBytePrefetch = function(addr)
|
||||
|
|
@ -2951,10 +3137,10 @@ X86CPU.prototype.getBytePrefetch = function(addr)
|
|||
* with side-effects we may not want, and in any case, while it seemed to improve Safari's performance slightly,
|
||||
* it did nothing for the oddball Chrome performance I'm seeing with PREFETCH enabled.
|
||||
*
|
||||
* b = this.aMemBlocks[(addr & this.busMask) >>> this.blockShift].readByte(addr & this.blockLimit, addr);
|
||||
* b = this.aMemBlocks[(addr & this.memMask) >>> this.blockShift].readByte(addr & this.blockLimit, addr);
|
||||
* this.nBusCycles += 4;
|
||||
* this.cbPrefetchValid = 0;
|
||||
* this.addrPrefetchHead = (addr + 1) & this.busMask;
|
||||
* this.addrPrefetchHead = (addr + 1) & this.memMask;
|
||||
* return b;
|
||||
*/
|
||||
}
|
||||
|
|
@ -2981,7 +3167,7 @@ X86CPU.prototype.getBytePrefetch = function(addr)
|
|||
* the prefetch queue, we're taking the easy way out and simply calling getBytePrefetch() twice.
|
||||
*
|
||||
* @this {X86CPU}
|
||||
* @param {number} addr is a physical (non-segmented) address
|
||||
* @param {number} addr is a linear address
|
||||
* @return {number} short (16-bit) value at that address
|
||||
*/
|
||||
X86CPU.prototype.getShortPrefetch = function(addr)
|
||||
|
|
@ -2996,7 +3182,7 @@ X86CPU.prototype.getShortPrefetch = function(addr)
|
|||
* easy way out and call getShortPrefetch() twice.
|
||||
*
|
||||
* @this {X86CPU}
|
||||
* @param {number} addr is a physical (non-segmented) address
|
||||
* @param {number} addr is a linear address
|
||||
* @return {number} long (32-bit) value at that address
|
||||
*/
|
||||
X86CPU.prototype.getLongPrefetch = function(addr)
|
||||
|
|
@ -3008,7 +3194,7 @@ X86CPU.prototype.getLongPrefetch = function(addr)
|
|||
* getWordPrefetch(addr)
|
||||
*
|
||||
* @this {X86CPU}
|
||||
* @param {number} addr is a physical (non-segmented) address
|
||||
* @param {number} addr is a linear address
|
||||
* @return {number} short (16-bit) or long (32-bit value as appropriate
|
||||
*/
|
||||
X86CPU.prototype.getWordPrefetch = function(addr)
|
||||
|
|
@ -3028,10 +3214,10 @@ X86CPU.prototype.fillPrefetch = function(n)
|
|||
{
|
||||
while (n-- > 0 && this.cbPrefetchQueued < X86CPU.PREFETCH.QUEUE) {
|
||||
var addr = this.addrPrefetchHead;
|
||||
var b = this.aMemBlocks[(addr & this.busMask) >>> this.blockShift].readByte(addr & this.blockLimit, addr);
|
||||
var b = this.aMemBlocks[(addr & this.memMask) >>> this.blockShift].readByte(addr & this.blockLimit, addr);
|
||||
this.aPrefetch[this.iPrefetchHead] = b | (addr << 8);
|
||||
if (MAXDEBUG) this.printMessage(" fillPrefetch[" + this.iPrefetchHead + "]: " + str.toHex(addr) + ":" + str.toHexByte(b));
|
||||
this.addrPrefetchHead = (addr + 1) & this.busMask;
|
||||
this.addrPrefetchHead = (addr + 1) & this.memMask;
|
||||
this.iPrefetchHead = (this.iPrefetchHead + 1) & X86CPU.PREFETCH.MASK;
|
||||
this.cbPrefetchQueued++;
|
||||
/*
|
||||
|
|
@ -3049,7 +3235,7 @@ X86CPU.prototype.fillPrefetch = function(n)
|
|||
* Empty the prefetch queue.
|
||||
*
|
||||
* @this {X86CPU}
|
||||
* @param {number} addr is a physical (non-segmented) address of the current program counter (regLIP)
|
||||
* @param {number} addr is a linear address of the current program counter (regLIP)
|
||||
*/
|
||||
X86CPU.prototype.flushPrefetch = function(addr)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in a new issue