Consolidated /docs into /pubs
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@ -5,13 +5,13 @@ permalink: /pubs/pc/reference/intel/8086/
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---
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Intel 8086/8088 CPU Information
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---
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-------------------------------
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We do not have any official Intel documentation of 8086/8088 errata, but the following are well-known "features"
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of those CPUs.
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8086 Errata
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---
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-----------
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### Interrupts Following MOV SS,xxx and POP SS Instructions May Corrupt Memory
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@ -54,7 +54,7 @@ If you're not sure your assembler will output the `REP` and `ES:` overrides in t
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generate the override bytes manually, using **DB** or a similar assembler directive.
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8086 Undocumented Instructions
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---
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------------------------------
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Some of the following information is courtesy of the [OS/2 Museum](http://www.os2museum.com/wp/undocumented-8086-opcodes/).
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@ -98,17 +98,17 @@ On the 8086/8088/80186/80188, values 0-3 were treated the same as values 4-7, an
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Starting with the 80186, opcodes 0xC0 and 0xC1 were reused for new shift and rotate instruction groups,
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and opcodes 0xC8 and 0xC9 became the `ENTER` and `LEAVE` instructions.
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### [AAM](/docs/x86/ops/AAM/) (0xD4)
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### [AAM](/pubs/x86/ops/AAM/) (0xD4)
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While AAM is documented, it has undocumented features (eg, its ability to divide by values other than 10,
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and its effect on the flags). See the [AAM](/docs/x86/ops/AAM/) instruction for details.
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and its effect on the flags). See the [AAM](/pubs/x86/ops/AAM/) instruction for details.
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### [AAD](/docs/x86/ops/AAD/) (0xD5)
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### [AAD](/pubs/x86/ops/AAD/) (0xD5)
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While AAD is documented, it has undocumented features (eg, its ability to multiply by values other than 10,
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and its effect on the flags). See the [AAD](/docs/x86/ops/AAD/) instruction for details.
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and its effect on the flags). See the [AAD](/pubs/x86/ops/AAD/) instruction for details.
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### [SALC](/docs/x86/ops/SALC/) (0xD6)
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### [SALC](/pubs/x86/ops/SALC/) (0xD6)
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Performs an operation equivalent to `SBB AL,AL`, but without modifying any flags. In other words, AL will be set to
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0xFF or 0x00, depending on whether CF is set or clear. This instruction exists on all later x86 CPUs, but for some
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@ -119,9 +119,9 @@ reason, it has never been documented. Also known as **SETALC**.
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It is believed that 0xF1 decodes identically to 0xF0 (the `LOCK` prefix).
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On newer processors, 0xF1 is an undocumented instruction usually called `ICEBP` or `INT1`. See the
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[ICEBP](/docs/x86/ops/ICEBP/) instruction for details.
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[ICEBP](/pubs/x86/ops/ICEBP/) instruction for details.
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Assorted Publications
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---
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---------------------
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* TBD
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