80386 development
This commit is contained in:
parent
e75e734233
commit
70bca48b17
127 changed files with 1039 additions and 958 deletions
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@ -1328,6 +1328,74 @@ if (DEBUGGER) {
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if (this.controlDebug) this.controlDebug.focus();
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};
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/**
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* newAddr(off, seg, addr, fData32, fAddr32)
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*
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* @this {Debugger}
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* @param {number} off
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* @param {number} seg
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* @param {number|null} [addr]
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* @param {boolean} [fData32]
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* @param {boolean} [fAddr32]
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* @return {Array} containing [off, seg, addr]
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*/
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Debugger.prototype.newAddr = function(off, seg, addr, fData32, fAddr32)
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{
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return [off, seg, addr, false, fData32, fAddr32];
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};
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/**
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* incAddr(aAddr, inc)
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*
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* @this {Debugger}
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* @param {Array} aAddr containing [off, seg, addr]
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* @param {number|undefined} inc contains value to increment by (default is 1)
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*/
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Debugger.prototype.incAddr = function(aAddr, inc)
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{
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inc = (inc === undefined? 1 : inc);
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if (aAddr[2] != null) {
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aAddr[2] += inc;
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}
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if (aAddr[1] != null) {
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aAddr[0] += inc;
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var limit = this.getSegment(aAddr[1]).limit;
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if (aAddr[0] > limit) {
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aAddr[0] = 0;
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aAddr[2] = null;
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}
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}
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};
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/**
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* hexAddr(aAddr)
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*
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* @this {Debugger}
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* @param {Array} aAddr containing [off, seg]
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* @return {string} the hex representation of the address
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*/
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Debugger.prototype.hexAddr = function(aAddr)
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{
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return aAddr[1] == null? ("%" + str.toHex(aAddr[2])) : this.hexOffset(aAddr[0], aAddr[1], aAddr[4]);
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};
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/**
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* hexOffset(off, sel)
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*
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* @this {Debugger}
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* @param {number} off
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* @param {number} [sel]
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* @param {boolean} [fData32] is true if 32-bit OPERAND size in effect
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* @return {string} the hex representation of off (or sel:off)
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*/
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Debugger.prototype.hexOffset = function(off, sel, fData32)
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{
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if (sel !== undefined) {
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return str.toHex(sel, 4) + ":" + str.toHex(off, fData32? 8 : 4);
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}
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return str.toHex(off);
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};
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/**
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* dumpDOS(s)
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*
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@ -1646,6 +1714,12 @@ if (DEBUGGER) {
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case Debugger.REG_DI:
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n = cpu.regEDI; cch = 4;
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break;
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case Debugger.REG_IP:
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n = cpu.getIP(); cch = this.cchReg;
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break;
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case Debugger.REG_PS:
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n = cpu.getPS(); cch = this.cchReg;
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break;
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case Debugger.REG_SEG + Debugger.REG_ES:
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n = cpu.getES(); cch = 4;
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break;
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@ -1658,54 +1732,52 @@ if (DEBUGGER) {
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case Debugger.REG_SEG + Debugger.REG_DS:
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n = cpu.getDS(); cch = 4;
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break;
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case Debugger.REG_SEG + Debugger.REG_FS:
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n = cpu.getFS(); cch = 4;
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break;
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case Debugger.REG_SEG + Debugger.REG_GS:
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n = cpu.getGS(); cch = 4;
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break;
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case Debugger.REG_IP:
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n = cpu.getIP(); cch = this.cchReg;
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break;
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case Debugger.REG_PS:
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n = cpu.getPS(); cch = this.cchReg;
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break;
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case Debugger.REG_EAX:
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n = cpu.regEAX; cch = 8;
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break;
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case Debugger.REG_ECX:
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n = cpu.regECX; cch = 8;
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break;
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case Debugger.REG_EDX:
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n = cpu.regEDX; cch = 8;
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break;
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case Debugger.REG_EBX:
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n = cpu.regEBX; cch = 8;
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break;
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case Debugger.REG_ESP:
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n = cpu.getSP(); cch = 8;
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break;
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case Debugger.REG_EBP:
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n = cpu.regEBP; cch = 8;
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break;
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case Debugger.REG_ESI:
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n = cpu.regESI; cch = 8;
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break;
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case Debugger.REG_EDI:
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n = cpu.regEDI; cch = 8;
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break;
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case Debugger.REG_CR0:
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n = cpu.regCR0; cch = 8;
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break;
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case Debugger.REG_CR1:
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n = cpu.regCR1; cch = 8;
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break;
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case Debugger.REG_CR2:
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n = cpu.regCR2; cch = 8;
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break;
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case Debugger.REG_CR3:
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n = cpu.regCR3; cch = 8;
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break;
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}
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if (I386 && !cch) {
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switch(iReg) {
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case Debugger.REG_EAX:
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n = cpu.regEAX; cch = 8;
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break;
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case Debugger.REG_ECX:
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n = cpu.regECX; cch = 8;
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break;
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case Debugger.REG_EDX:
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n = cpu.regEDX; cch = 8;
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break;
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case Debugger.REG_EBX:
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n = cpu.regEBX; cch = 8;
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break;
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case Debugger.REG_ESP:
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n = cpu.getSP(); cch = 8;
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break;
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case Debugger.REG_EBP:
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n = cpu.regEBP; cch = 8;
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break;
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case Debugger.REG_ESI:
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n = cpu.regESI; cch = 8;
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break;
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case Debugger.REG_EDI:
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n = cpu.regEDI; cch = 8;
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break;
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case Debugger.REG_CR0:
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n = cpu.regCR0; cch = 8;
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break;
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case Debugger.REG_CR1:
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n = cpu.regCR1; cch = 8;
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break;
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case Debugger.REG_CR2:
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n = cpu.regCR2; cch = 8;
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break;
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case Debugger.REG_CR3:
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n = cpu.regCR3; cch = 8;
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break;
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case Debugger.REG_SEG + Debugger.REG_FS:
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n = cpu.getFS(); cch = 4;
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break;
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case Debugger.REG_SEG + Debugger.REG_GS:
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n = cpu.getGS(); cch = 4;
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break;
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}
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}
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if (cch) s = str.toHex(n, cch);
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}
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@ -2258,71 +2330,6 @@ if (DEBUGGER) {
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}
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};
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/**
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* newAddr(off, seg, addr)
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*
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* @this {Debugger}
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* @param {number} off
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* @param {number} seg
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* @param {number} [addr] is the physical address, if known
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* @return {Array} containing [off, seg, addr]
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*/
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Debugger.prototype.newAddr = function(off, seg, addr)
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{
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return [off, seg, addr];
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};
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/**
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* incAddr(aAddr, inc)
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*
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* @this {Debugger}
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* @param {Array} aAddr containing [off, seg, addr]
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* @param {number|undefined} inc contains value to increment by (default is 1)
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*/
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Debugger.prototype.incAddr = function(aAddr, inc)
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{
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inc = (inc === undefined? 1 : inc);
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if (aAddr[2] != null) {
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aAddr[2] += inc;
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}
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if (aAddr[1] != null) {
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aAddr[0] += inc;
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var limit = this.getSegment(aAddr[1]).limit;
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if (aAddr[0] > limit) {
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aAddr[0] = 0;
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aAddr[2] = null;
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}
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}
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};
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/**
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* hexAddr(aAddr)
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*
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* @this {Debugger}
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* @param {Array} aAddr containing [off, seg]
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* @return {string} the hex representation of the address
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*/
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Debugger.prototype.hexAddr = function(aAddr)
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{
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return aAddr[1] == null? ("%" + str.toHex(aAddr[2])) : this.hexOffset(aAddr[0], aAddr[1]);
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};
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/**
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* hexOffset(off, sel)
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*
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* @this {Debugger}
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* @param {number} off
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* @param {number} [sel]
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* @return {string} the hex representation of off (or sel:off)
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*/
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Debugger.prototype.hexOffset = function(off, sel)
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{
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if (sel !== undefined) {
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return str.toHex(sel, 4) + ":" + str.toHex(off, this.cchAddr < 8? 4 : 8);
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}
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return str.toHex(off);
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};
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/**
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* checksEnabled(fRelease)
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*
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@ -2360,7 +2367,7 @@ if (DEBUGGER) {
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}
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/*
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* Halt whenever ring 3 code is running with interrupts disabled, because that's likely an
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* error (technically, we should also check the IOPL, too, because if IOPL is 3, this is OK).
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* error (TODO: we should also check the IOPL, too, because if IOPL is 3, then this is OK).
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*/
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if (this.cpu.segCS.cpl == 3 && !(this.cpu.regPS & X86.PS.IF)) {
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return true;
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@ -2380,7 +2387,7 @@ if (DEBUGGER) {
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/*
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* This is a good example of what NOT to do in a high-frequency function, and defeats
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* the purpose of preallocating and preinitializing the history array in historyInit():
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* the purpose of pre-allocating and pre-initializing the history array in historyInit():
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*
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* this.aOpcodeHistory[this.iOpcodeHistory] = this.newAddr(this.cpu.getIP(), this.cpu.getCS(), addr);
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*
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@ -2491,6 +2498,10 @@ if (DEBUGGER) {
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if (sel == this.cpu.getDS()) return this.cpu.segDS;
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if (sel == this.cpu.getES()) return this.cpu.segES;
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if (sel == this.cpu.getSS()) return this.cpu.segSS;
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if (I386) {
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if (sel == this.cpu.getFS()) return this.cpu.segFS;
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if (sel == this.cpu.getGS()) return this.cpu.segGS;
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}
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var seg = new X86Seg(this.cpu, X86Seg.ID.DEBUG, "DBG");
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/*
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* TODO: Confirm that it's OK for this function to drop any error from seg.load() on the floor....
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@ -2552,6 +2563,22 @@ if (DEBUGGER) {
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return b;
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};
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/**
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* getWord(aAddr, inc)
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*
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* @this {Debugger}
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* @param {Array} aAddr
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* @param {number} [inc]
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* @return {number}
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*/
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Debugger.prototype.getWord = function(aAddr, inc)
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{
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if (aAddr[4]) {
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return this.getLong(aAddr, inc? 4 : 0);
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}
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return this.getShort(aAddr, inc? 2 : 0);
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};
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/**
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* getShort(aAddr, inc)
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*
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@ -2865,16 +2892,26 @@ if (DEBUGGER) {
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* getInstruction(aAddr, sComment, nSequence)
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*
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* @this {Debugger}
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* @param {Array} aAddr (updated to next instruction)
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* @param {Array} aAddr (aAddr[4] is true if 32-bit operands, aAddr[5] is true if 32-bit addresses)
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* @param {string} [sComment] is an associated comment
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* @param {number} [nSequence] is an associated sequence number, undefined if none
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* @return {string}
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* @return {string} (and aAddr is updated to the next instruction)
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*/
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Debugger.prototype.getInstruction = function(aAddr, sComment, nSequence)
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{
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var aAddrIns = this.newAddr(aAddr[0], aAddr[1], aAddr[2]);
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var aAddrIns = this.newAddr(aAddr[0], aAddr[1], aAddr[2], this.cpu.segCS.addrSize == 4);
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var bOpcode = this.getByte(aAddr, 1);
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/*
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* Prior to calling getInstruction(), doUnassemble() checks for these prefixes as well,
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* updating aAddr[4] and/or aAddr[5] as appropriate; if that's been done, then let's suppress
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* the display of those prefixes and simply incorporate them into the byte stream.
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*/
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if (aAddr[4] != null && bOpcode == X86.OPCODE.OS || aAddr[5] != null && bOpcode == X86.OPCODE.AS) {
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bOpcode = this.getByte(aAddr, 1);
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}
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var aOpDesc = this.aaOpDescs[bOpcode];
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var iIns = aOpDesc[0];
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var bModRM = -1;
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@ -2894,7 +2931,10 @@ if (DEBUGGER) {
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var sOpcode = Debugger.INS_NAMES[aOpDesc[0]];
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var cOperands = 2;
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var sOperands = "";
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if (this.isStringIns(bOpcode)) cOperands = 0; // suppress display of operands for string instructions
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if (this.isStringIns(bOpcode)) {
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cOperands = 0; // suppress display of operands for string instructions
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if (aAddr[4] && sOpcode.slice(-1) == 'W') sOpcode = sOpcode.slice(0, -1) + 'D';
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}
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var typeCPU = null;
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for (var iOperand = 1; iOperand <= cOperands; iOperand++) {
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@ -2991,7 +3031,7 @@ if (DEBUGGER) {
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*
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* @this {Debugger}
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* @param {number} type
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* @param {Array} aAddr
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* @param {Array} aAddr (aAddr[4] is true if 32-bit operands, aAddr[5] is true if 32-bit addresses)
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* @return {string} operand
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*/
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Debugger.prototype.getImmOperand = function(type, aAddr)
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@ -3022,7 +3062,7 @@ if (DEBUGGER) {
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sOperand = str.toHex(this.getShort(aAddr, 2), 4);
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break;
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case Debugger.TYPE_FARP:
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sOperand = this.hexAddr(this.newAddr(this.getShort(aAddr, 2), this.getShort(aAddr, 2)));
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sOperand = this.hexAddr(this.newAddr(this.getWord(aAddr, 2), this.getShort(aAddr, 2), null, aAddr[4]));
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break;
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default:
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sOperand = "imm(" + str.toHexWord(type) + ")";
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@ -3298,8 +3338,8 @@ if (DEBUGGER) {
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*
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* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
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* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
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* SS=0000 DS=0000 ES=0000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
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* SS=0000 DS=0000 ES=0000 FS=0000 GS=0000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:FFF0 EA05F900F0 JMP F000:F905
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*
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* Sample 80286 protected-mode register dump:
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*
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@ -4121,7 +4161,7 @@ if (DEBUGGER) {
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* We must create a new aAddr from the address we obtained from aHistory, because
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* aAddr was a reference, not a copy, and we don't want getInstruction() modifying the original.
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*
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* TODO: By using a new address for each iteration, history dumps fail to disassemble 32-bit overrides properly.
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* TODO: By using a new address for each line, history dumps fail to disassemble 32-bit overrides properly.
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*/
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aAddr = this.newAddr(aAddr[0], aAddr[1], aAddr[2]);
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this.println(this.getInstruction(aAddr, "history", n));
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@ -4554,10 +4594,7 @@ if (DEBUGGER) {
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if (asArgs != null && asArgs.length > 1) {
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var sReg = asArgs[1];
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if (sReg == 'p') {
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/*
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* If the CPU has not defined addrGDT, then there are no protected-mode registers.
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*/
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fProt = (this.cpu.addrGDT !== undefined);
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fProt = (this.cpu.model >= X86.MODEL_80286);
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} else {
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// fIns = false;
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var sValue = null;
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@ -4589,9 +4626,6 @@ if (DEBUGGER) {
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case "AX":
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this.cpu.regEAX = (this.cpu.regEAX & ~0xffff) | (w & 0xffff);
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break;
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case "EAX":
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this.cpu.regEAX = w;
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break;
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case "BL":
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this.cpu.regEBX = (this.cpu.regEBX & ~0xff) | (w & 0xff);
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break;
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@ -4601,9 +4635,6 @@ if (DEBUGGER) {
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case "BX":
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this.cpu.regEBX = (this.cpu.regEBX & ~0xffff) | (w & 0xffff);
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break;
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case "EBX":
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this.cpu.regEBX = w;
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break;
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case "CL":
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this.cpu.regECX = (this.cpu.regECX & ~0xff) | (w & 0xff);
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break;
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@ -4613,9 +4644,6 @@ if (DEBUGGER) {
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case "CX":
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this.cpu.regECX = (this.cpu.regECX & ~0xffff) | (w & 0xffff);
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break;
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case "ECX":
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this.cpu.regECX = w;
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break;
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case "DL":
|
||||
this.cpu.regEDX = (this.cpu.regEDX & ~0xff) | (w & 0xff);
|
||||
break;
|
||||
|
|
@ -4625,33 +4653,18 @@ if (DEBUGGER) {
|
|||
case "DX":
|
||||
this.cpu.regEDX = (this.cpu.regEDX & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EDX":
|
||||
this.cpu.regEDX = w;
|
||||
break;
|
||||
case "SP":
|
||||
this.cpu.setSP((this.cpu.getSP() & ~0xffff) | (w & 0xffff));
|
||||
break;
|
||||
case "ESP":
|
||||
this.cpu.setSP(w);
|
||||
break;
|
||||
case "BP":
|
||||
this.cpu.regEBP = (this.cpu.regEBP & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EBP":
|
||||
this.cpu.regEBP = w;
|
||||
break;
|
||||
case "SI":
|
||||
this.cpu.regESI = (this.cpu.regESI & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "ESI":
|
||||
this.cpu.regESI = w;
|
||||
break;
|
||||
case "DI":
|
||||
this.cpu.regEDI = (this.cpu.regEDI & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EDI":
|
||||
this.cpu.regEDI = w;
|
||||
break;
|
||||
case "DS":
|
||||
this.cpu.setDS(w);
|
||||
break;
|
||||
|
|
@ -4720,6 +4733,47 @@ if (DEBUGGER) {
|
|||
*/
|
||||
default:
|
||||
fUnknown = true;
|
||||
if (I386 && this.cpu.model >= X86.MODEL_80386) {
|
||||
fUnknown = false;
|
||||
switch(sRegMatch){
|
||||
case "EAX":
|
||||
this.cpu.regEAX = w;
|
||||
break;
|
||||
case "EBX":
|
||||
this.cpu.regEBX = w;
|
||||
break;
|
||||
case "ECX":
|
||||
this.cpu.regECX = w;
|
||||
break;
|
||||
case "EDX":
|
||||
this.cpu.regEDX = w;
|
||||
break;
|
||||
case "ESP":
|
||||
this.cpu.setSP(w);
|
||||
break;
|
||||
case "EBP":
|
||||
this.cpu.regEBP = w;
|
||||
break;
|
||||
case "ESI":
|
||||
this.cpu.regESI = w;
|
||||
break;
|
||||
case "EDI":
|
||||
this.cpu.regEDI = w;
|
||||
break;
|
||||
case "FS":
|
||||
this.cpu.setFS(w);
|
||||
break;
|
||||
case "GS":
|
||||
this.cpu.setGS(w);
|
||||
break;
|
||||
/*
|
||||
* TODO: Add support for CR0-CR3, DR0-DR7, and TR6-TR7.
|
||||
*/
|
||||
default:
|
||||
fUnknown = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -4996,9 +5050,14 @@ if (DEBUGGER) {
|
|||
aAddr[4] = !aAddr[4];
|
||||
} else if (bOpcode == X86.OPCODE.AS) {
|
||||
aAddr[5] = !aAddr[5];
|
||||
} else {
|
||||
/*
|
||||
* For all prefixes (except for the OPERAND and ADDRESS overrides, which getInstruction()
|
||||
* now incorporates into the instruction), we will want to dump an additional instruction.
|
||||
*/
|
||||
if (!n) n++;
|
||||
nSequence = null;
|
||||
}
|
||||
if (!n) n++;
|
||||
nSequence = null;
|
||||
} else {
|
||||
fInitSize = true;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue