Support for true physical memory aliases
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parent
bc153c3016
commit
7085b72fc4
28 changed files with 2185 additions and 2047 deletions
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@ -415,7 +415,7 @@ X86Seg.switchTSS = function switchTSS(selNew, fNest)
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}
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cpu.setShort(cpu.segTSS.addrDesc + X86.DESC.ACC.OFFSET, (cpu.segTSS.acc & ~X86.DESC.ACC.TYPE.TSS_BUSY) | X86.DESC.ACC.TYPE.TSS);
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}
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if (cpu.segTSS.load(selNew) == X86.ADDR_INVALID) {
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if (cpu.segTSS.load(selNew) === X86.ADDR_INVALID) {
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return false;
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}
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var addrNew = cpu.segTSS.base;
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@ -649,7 +649,7 @@ X86Seg.prototype.loadDesc8 = function(addrDesc, sel, fSuppress)
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* TODO: Verify the PRESENT bit of the gate descriptor, and issue NP_FAULT as appropriate.
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*/
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cplPrev = this.cpl;
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if (this.load(selCode, true) == X86.ADDR_INVALID) {
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if (this.load(selCode, true) === X86.ADDR_INVALID) {
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cpu.assert(false);
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base = X86.ADDR_INVALID;
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break;
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@ -909,7 +909,7 @@ X86Seg.prototype.messageSeg = function(sel, base, limit, acc, ext)
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if (this.id == X86Seg.ID.CODE) sDPL += " cpl=" + this.cpl;
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this.dbg.message("loadSeg(" + this.sName + "):" + ch + "sel=" + str.toHexWord(sel) + " base=" + str.toHex(base) + " limit=" + str.toHexWord(limit) + " acc=" + str.toHexWord(acc) + sDPL);
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}
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this.cpu.assert(/* base != X86.ADDR_INVALID && */ (this.cpu.model >= X86.MODEL_80386 || !ext || ext == X86.DESC.EXT.AVAIL));
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this.cpu.assert(/* base !== X86.ADDR_INVALID && */ (this.cpu.model >= X86.MODEL_80386 || !ext || ext == X86.DESC.EXT.AVAIL));
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}
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};
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