Cleaned up the expression parser, fixed some PDP-10 evaluation errors, and added support unary minus
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8 changed files with 536 additions and 447 deletions
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@ -18,7 +18,7 @@ The module is currently comprised of the following components, as listed in [pac
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* [bus.js](/modules/pdp10/lib/bus.js)
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* [computer.js](/modules/pdp10/lib/computer.js)
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* [cpu.js](/modules/pdp10/lib/cpu.js)
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* [cpuop.js](/modules/pdp10/lib/cpuop.js)
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* [cpuops.js](/modules/pdp10/lib/cpuops.js)
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* [cpustate.js](/modules/pdp10/lib/cpustate.js)
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* [debugger.js](/modules/pdp10/lib/debugger.js)
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* [defines.js](/modules/pdp10/lib/defines.js)
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@ -6378,8 +6378,11 @@ PDP10.split72 = function(res, ext)
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PDP10.setAddFlags = function(dst, src, res)
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{
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/*
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* Isolate the top two bits of dst, src, and res by "shifting" them into bits 0 and 1 of the following variables.
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* Isolate the top two bits of dst, src, and res by "shifting" them into bits 0 and 1 of the
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* following variables. Note that shifting with division only works when the values are unsigned
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* (which they MUST be).
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*/
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Component.assert(dst >= 0 && src >= 0 && res >= 0);
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var dst01 = Math.trunc(dst / PDP10.TWO_POW34);
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var src01 = Math.trunc(src / PDP10.TWO_POW34);
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var res01 = Math.trunc(res / PDP10.TWO_POW34);
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@ -6440,7 +6443,11 @@ PDP10.AND = function(dst, src)
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* WARNING: When using JavaScript's 32-bit operators with values that could set bit 31 and produce a
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* negative value, it's critical to perform a final right-shift of 0, ensuring that the final result is
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* positive.
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*
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* Finally, all 36-bit data within a PDP-10 machine should ALWAYS be unsigned, which we now assert,
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* because the divisions below would not yield correct results with negative inputs.
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*/
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Component.assert(dst >= 0 && src >= 0);
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return ((((dst / PDP10.TWO_POW32)|0) & ((src / PDP10.TWO_POW32)|0)) * PDP10.TWO_POW32) + ((dst & src) >>> 0);
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};
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@ -6491,7 +6498,11 @@ PDP10.EQV = function(dst, src)
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* WARNING: When using JavaScript's 32-bit operators with values that could set bit 31 and produce a
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* negative value, it's critical to perform a final right-shift of 0, ensuring that the final result is
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* positive.
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*
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* Finally, all 36-bit data within a PDP-10 machine should ALWAYS be unsigned, which we now assert,
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* because the divisions below would not yield correct results with negative inputs.
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*/
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Component.assert(dst >= 0 && src >= 0);
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return ((~(((dst / PDP10.TWO_POW32)|0) ^ ((src / PDP10.TWO_POW32)|0)) & 0o17) * PDP10.TWO_POW32) + (~(dst ^ src) >>> 0);
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};
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@ -6514,7 +6525,11 @@ PDP10.IOR = function(dst, src)
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* WARNING: When using JavaScript's 32-bit operators with values that could set bit 31 and produce a
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* negative value, it's critical to perform a final right-shift of 0, ensuring that the final result is
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* positive.
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*
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* Finally, all 36-bit data within a PDP-10 machine should ALWAYS be unsigned, which we now assert,
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* because the divisions below would not yield correct results with negative inputs.
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*/
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Component.assert(dst >= 0 && src >= 0);
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return ((((dst / PDP10.TWO_POW32)|0) | ((src / PDP10.TWO_POW32)|0)) * PDP10.TWO_POW32) + ((dst | src) >>> 0);
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};
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@ -6536,7 +6551,11 @@ PDP10.NOT = function(src)
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* WARNING: When using JavaScript's 32-bit operators with values that could set bit 31 and produce a
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* negative value, it's critical to perform a final right-shift of 0, ensuring that the final result is
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* positive.
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*
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* Finally, all 36-bit data within a PDP-10 machine should ALWAYS be unsigned, which we now assert,
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* because the divisions below would not yield correct results with negative inputs.
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*/
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Component.assert(src >= 0);
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return ((~((src / PDP10.TWO_POW32)|0) & 0o17) * PDP10.TWO_POW32) + (~src >>> 0);
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};
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@ -6572,7 +6591,11 @@ PDP10.XOR = function(dst, src)
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* WARNING: When using JavaScript's 32-bit operators with values that could set bit 31 and produce a
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* negative value, it's critical to perform a final right-shift of 0, ensuring that the final result is
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* positive.
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*
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* Finally, all 36-bit data within a PDP-10 machine should ALWAYS be unsigned, which we now assert,
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* because the divisions below would not yield correct results with negative inputs.
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*/
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Component.assert(dst >= 0 && src >= 0);
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return ((((dst / PDP10.TWO_POW32)|0) ^ ((src / PDP10.TWO_POW32)|0)) * PDP10.TWO_POW32) + ((dst ^ src) >>> 0);
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};
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