Minor re-org of PDP-10 tests
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11 changed files with 186 additions and 166 deletions
53
apps/pdp10/tests/opcodes/OPTEST01.json
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53
apps/pdp10/tests/opcodes/OPTEST01.json
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{
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"load": 0o100,
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"exec": 0o100,
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"data": [
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0o505040111111, // 000100: HRLI 1,111111
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0o541040444444, // 000101: HRRI 1,444444
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0o544100000001, // 000102: HLR 2,1
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0o504100000001, // 000103: HRL 2,1
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0o570140000001, // 000104: HRRE 3,1
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0o530200000002, // 000105: HLLE 4,2
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0o544240000003, // 000106: HLR 5,3
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0o504300000004, // 000107: HRL 6,4
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0o573000000005, // 000110: HRRES 0,5
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0o533000000006, // 000111: HLLES 0,6
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0o541000000010, // 000112: HRRI 0,10
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0o251000000017, // 000113: BLT 0,17
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//
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// 00=000010000020 01=111111444444 02=444444111111 03=777777444444
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// 04=444444777777 05=777777777777 06=777777777777 07=000000000000
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// 10=000000000010 11=111111444444 12=444444111111 13=777777444444
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// 14=444444777777 15=777777777777 16=777777777777 17=000000000000
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//
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0o577040000002, // 000114: HLRES 1,2
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//
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// 00=000010000020 01=777777444444 02=777777444444 03=777777444444
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// 04=444444777777 05=777777777777 06=777777777777 07=000000000000
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// 10=000000000010 11=111111444444 12=444444111111 13=777777444444
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// 14=444444777777 15=777777777777 16=777777777777 17=000000000000
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//
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0o261240000011, // 000115: PUSH 5,11
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//
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// 00=111111444444 01=777777444444 02=777777444444 03=777777444444
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// 04=444444777777 05=000001000000 06=777777777777 07=000000000000
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// 10=000000000010 11=111111444444 12=444444111111 13=777777444444
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// 14=444444777777 15=777777777777 16=777777777777 17=000000000000
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//
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0o262240000005, // 000116: POP 5,5
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//
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// 00=111111444444 01=777777444444 02=777777444444 03=777777444444
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// 04=444444777777 05=111110444443 06=777777777777 07=000000000000
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// 10=000000000010 11=111111444444 12=444444111111 13=777777444444
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// 14=444444777777 15=777777777777 16=777777777777 17=000000000000
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//
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0o515040170600, // 000117: HRLZI 1,170600
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0o135100000001, // 000120: LDB 2,1
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0o270000000000, // 000121: ADD 0,0
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0o265040000123, // 000122: JSP 1,.+1
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0o270000000000, // 000123: ADD 0,0
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0o265040000125, // 000124: JSP 1,.+1
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0o255740000126, // 000125: JFCL 17,126
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0o224100000002, // 000126: MUL 2,2
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]
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}
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62
apps/pdp10/tests/opcodes/OPTEST01.simh
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62
apps/pdp10/tests/opcodes/OPTEST01.simh
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dep 100 HRLI 1,111111
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dep 101 HRRI 1,444444
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dep 102 HLR 2,1
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dep 103 HRL 2,1
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dep 104 HRRE 3,1
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dep 105 HLLE 4,2
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dep 106 HLR 5,3
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dep 107 HRL 6,4
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dep 110 HRRES 0,5
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dep 111 HLLES 0,6
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dep 112 HRRI 0,10
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dep 113 BLT 0,17
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dep 114 HLRES 1,2
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dep 115 PUSH 5,11
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dep 116 POP 5,5
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dep 117 HRLZI 1,170600
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dep 120 LDB 2,1
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dep 121 ADD 0,0
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dep 122 JSP 1,123
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dep 123 ADD 0,0
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dep 124 JSP 1,125
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dep 125 JFCL 17,126
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dep 126 MUL 2,2
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ex -m 100-116
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dep pc 100
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step 11
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ex 0-17
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;
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echo Execute BLT 8 times (note the weird value that SIMH moves on the first iteration (ie, from AC 0 to AC 10)
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;
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step
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ex 0-17
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step
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ex 0-17
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step
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ex 0-17
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step
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ex 0-17
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step
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ex 0-17
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step
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ex 0-17
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step
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ex 0-17
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step
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ex 0-17
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;
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echo Execute HLRES 1,2
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;
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step 1
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ex 0-17
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;
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echo Execute PUSH 5,11
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;
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step 1
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ex 0-17
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;
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echo Execute POP 5,5
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;
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dep 5 1000000
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step 1
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ex 0-17
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123
apps/pdp10/tests/opcodes/README.md
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123
apps/pdp10/tests/opcodes/README.md
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---
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layout: page
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title: PDPjs PDP-10 Opcode Tests
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permalink: /apps/pdp10/tests/opcodes/
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machines:
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- id: testka10
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type: pdp10
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config: /devices/pdp10/machine/ka10/test/debugger/machine.xml
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debugger: true
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---
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PDPjs PDP-10 Opcode Tests
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-------------------------
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The PDP-10 machine below loads the following PDPjs opcode test:
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- [PDP-10 Half-Word Opcode Test](OPTEST01.json)
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Details on how to run and modify the test, and perform similar tests in [SIMH](https://github.com/simh/simh),
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are provided below.
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{% include machine.html id="testka10" %}
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The [PDP-10 Half-Word Opcode Test](OPTEST01.json) file specifies that the following words:
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0o505040111111, // HRLI 1,111111
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0o541040444444, // HRRI 1,444444
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0o544100000001, // HLR 2,1
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0o504100000001, // HRL 2,1
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...
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should be loaded at address 0o100, and that the program counter (PC register) should be set to 0o100. The embedded
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comments display the instructions that correspond to each word.
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If you want to alter or add new instructions, the PDP-10 Debugger now includes a rudimentary assembler. Using the `a` command,
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along with an optional start address, you can enter "assembler mode". For example, here's how the first four instructions from
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the [PDP-10 Half-Word Opcode Test](OPTEST01.json) could be entered by hand:
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>> a 100
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begin assemble at 000100
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>> hrli 1,111111
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000100: 505040 111111 HRLI 1,111111
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>> hrri 1,444444
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000101: 541040 444444 HRRI 1,444444
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>> hlr 2,1
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000102: 544100 000001 HLR 2,1
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>> hrl 2,1
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000103: 504100 000001 HRL 2,1
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ended assemble at 000104
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Entering a blank line exits "assembler mode". To disassemble the four instructions, use `u 100 l4`:
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>> u 100 l4
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000100: 505040 111111 HRLI 1,111111
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000101: 541040 444444 HRRI 1,444444
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000102: 544100 000001 HLR 2,1
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000103: 504100 000001 HRL 2,1
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You can also copy-and-paste a series of instructions into the PDPjs Debugger, as long as each command ends
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with a semicolon:
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a 100;
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hrli 1,111111;
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hrri 1,444444;
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hlr 2,1;
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hrl 2,1;
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end
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Individual instructions can also be assembled *without* entering "assembler mode", as long as you precede
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each instruction with the `a` command and a specific address:
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a 100 hrli 1,111111;
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a 101 hrri 1,444444;
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a 102 hlr 2,1;
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a 103 hrl 2,1
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Individual instructions can be executed with the `t` command and memory can be dumped with the `d` command.
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After executing the first four instructions and using the `d 0 l4` command to dump first four words of memory
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(also known as AC registers 0-3), you should see the following output:
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>> r
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000100: 505040 111111 HRLI 1,111111
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>> t
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000101: 541040 444444 HRRI 1,444444
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>> t
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000102: 544100 000001 HLR 2,1
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>> t
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000103: 504100 000001 HRL 2,1
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>> t
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000104: 000000 000000 UUO 0,0
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>> d 0 l4
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000000: 000000 000000 111111 444444 444444 111111 000000 000000
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To assemble and test the same instructions in [SIMH](https://github.com/simh/simh), using the `pdp10` binary:
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sim> dep 100 505040111111
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sim> dep 101 541040444444
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sim> dep 102 544100000001
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sim> dep 103 504100000001
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sim> ex -m 100-103
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100: HRLI 1,111111
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101: HRRI 1,444444
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102: HLR 2,1
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103: HRL 2,1
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sim> dep pc 100
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sim> step
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Step expired, PC: 000101 (HRRI 1,444444)
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sim> step
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Step expired, PC: 000102 (HLR 2,1)
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sim> step
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Step expired, PC: 000103 (HRL 2,1)
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sim> step
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Step expired, PC: 000104 (000000000000)
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sim> ex 0-3
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0: 000000000000
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1: 111111444444
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2: 444444111111
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3: 000000000000
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